xref: /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcmnsp/reset.c (revision 562f01a2baff4b454864c3d3d67fb315cf67adfa)
1*562f01a2SScott Branden /*
2*562f01a2SScott Branden  * Copyright 2014 Broadcom Corporation.
3*562f01a2SScott Branden  *
4*562f01a2SScott Branden  * SPDX-License-Identifier:	GPL-2.0+
5*562f01a2SScott Branden  */
6*562f01a2SScott Branden 
7*562f01a2SScott Branden #include <common.h>
8*562f01a2SScott Branden #include <asm/io.h>
9*562f01a2SScott Branden 
10*562f01a2SScott Branden #define CRU_RESET_OFFSET	0x1803F184
11*562f01a2SScott Branden 
reset_cpu(ulong ignored)12*562f01a2SScott Branden void reset_cpu(ulong ignored)
13*562f01a2SScott Branden {
14*562f01a2SScott Branden 	/* Reset the cpu by setting software reset request bit */
15*562f01a2SScott Branden 	writel(0x1, CRU_RESET_OFFSET);
16*562f01a2SScott Branden 
17*562f01a2SScott Branden 	while (1)
18*562f01a2SScott Branden 		;	/* loop forever till reset */
19*562f01a2SScott Branden }
20