1/* 2 * armboot - Startup Code for ARM926EJS CPU-core 3 * 4 * Copyright (c) 2003 Texas Instruments 5 * 6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 7 * 8 * Copyright (c) 2001 Marius Gr�ger <mag@sysgo.de> 9 * Copyright (c) 2002 Alex Z�pke <azu@sysgo.de> 10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 12 * Copyright (c) 2003 Kshitij <kshitij@ti.com> 13 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr> 14 * 15 * See file CREDITS for list of people who contributed to this 16 * project. 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License as 20 * published by the Free Software Foundation; either version 2 of 21 * the License, or (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 31 * MA 02111-1307 USA 32 */ 33 34#include <asm-offsets.h> 35#include <config.h> 36#include <common.h> 37#include <version.h> 38 39#if defined(CONFIG_OMAP1610) 40#include <./configs/omap1510.h> 41#elif defined(CONFIG_OMAP730) 42#include <./configs/omap730.h> 43#endif 44 45/* 46 ************************************************************************* 47 * 48 * Jump vector table as in table 3.1 in [1] 49 * 50 ************************************************************************* 51 */ 52 53 54.globl _start 55_start: 56 b reset 57#ifdef CONFIG_PRELOADER 58/* No exception handlers in preloader */ 59 ldr pc, _hang 60 ldr pc, _hang 61 ldr pc, _hang 62 ldr pc, _hang 63 ldr pc, _hang 64 ldr pc, _hang 65 ldr pc, _hang 66 67_hang: 68 .word do_hang 69/* pad to 64 byte boundary */ 70 .word 0x12345678 71 .word 0x12345678 72 .word 0x12345678 73 .word 0x12345678 74 .word 0x12345678 75 .word 0x12345678 76 .word 0x12345678 77#else 78 ldr pc, _undefined_instruction 79 ldr pc, _software_interrupt 80 ldr pc, _prefetch_abort 81 ldr pc, _data_abort 82 ldr pc, _not_used 83 ldr pc, _irq 84 ldr pc, _fiq 85 86_undefined_instruction: 87 .word undefined_instruction 88_software_interrupt: 89 .word software_interrupt 90_prefetch_abort: 91 .word prefetch_abort 92_data_abort: 93 .word data_abort 94_not_used: 95 .word not_used 96_irq: 97 .word irq 98_fiq: 99 .word fiq 100 101#endif /* CONFIG_PRELOADER */ 102 .balignl 16,0xdeadbeef 103 104 105/* 106 ************************************************************************* 107 * 108 * Startup Code (reset vector) 109 * 110 * do important init only if we don't start from memory! 111 * setup Memory and board specific bits prior to relocation. 112 * relocate armboot to ram 113 * setup stack 114 * 115 ************************************************************************* 116 */ 117 118.globl _TEXT_BASE 119_TEXT_BASE: 120 .word CONFIG_SYS_TEXT_BASE 121 122/* 123 * These are defined in the board-specific linker script. 124 * Subtracting _start from them lets the linker put their 125 * relative position in the executable instead of leaving 126 * them null. 127 */ 128.globl _bss_start_ofs 129_bss_start_ofs: 130 .word __bss_start - _start 131 132.globl _bss_end_ofs 133_bss_end_ofs: 134 .word _end - _start 135 136#ifdef CONFIG_USE_IRQ 137/* IRQ stack memory (calculated at run-time) */ 138.globl IRQ_STACK_START 139IRQ_STACK_START: 140 .word 0x0badc0de 141 142/* IRQ stack memory (calculated at run-time) */ 143.globl FIQ_STACK_START 144FIQ_STACK_START: 145 .word 0x0badc0de 146#endif 147 148/* IRQ stack memory (calculated at run-time) + 8 bytes */ 149.globl IRQ_STACK_START_IN 150IRQ_STACK_START_IN: 151 .word 0x0badc0de 152 153/* 154 * the actual reset code 155 */ 156 157reset: 158 /* 159 * set the cpu to SVC32 mode 160 */ 161 mrs r0,cpsr 162 bic r0,r0,#0x1f 163 orr r0,r0,#0xd3 164 msr cpsr,r0 165 166 /* 167 * we do sys-critical inits only at reboot, 168 * not when booting from ram! 169 */ 170#ifndef CONFIG_SKIP_LOWLEVEL_INIT 171 bl cpu_init_crit 172#endif 173 174/* Set stackpointer in internal RAM to call board_init_f */ 175call_board_init_f: 176 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 177 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 178 ldr r0,=0x00000000 179 bl board_init_f 180 181/*------------------------------------------------------------------------------*/ 182 183/* 184 * void relocate_code (addr_sp, gd, addr_moni) 185 * 186 * This "function" does not return, instead it continues in RAM 187 * after relocating the monitor code. 188 * 189 */ 190 .globl relocate_code 191relocate_code: 192 mov r4, r0 /* save addr_sp */ 193 mov r5, r1 /* save addr of gd */ 194 mov r6, r2 /* save addr of destination */ 195 196 /* Set up the stack */ 197stack_setup: 198 mov sp, r4 199 200 adr r0, _start 201 cmp r0, r6 202 beq clear_bss /* skip relocation */ 203 mov r1, r6 /* r1 <- scratch for copy loop */ 204 ldr r3, _bss_start_ofs 205 add r2, r0, r3 /* r2 <- source end address */ 206 207copy_loop: 208 ldmia r0!, {r9-r10} /* copy from source address [r0] */ 209 stmia r1!, {r9-r10} /* copy to target address [r1] */ 210 cmp r0, r2 /* until source end address [r2] */ 211 blo copy_loop 212 213#ifndef CONFIG_PRELOADER 214 /* 215 * fix .rel.dyn relocations 216 */ 217 ldr r0, _TEXT_BASE /* r0 <- Text base */ 218 sub r9, r6, r0 /* r9 <- relocation offset */ 219 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 220 add r10, r10, r0 /* r10 <- sym table in FLASH */ 221 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 222 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 223 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 224 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 225fixloop: 226 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 227 add r0, r0, r9 /* r0 <- location to fix up in RAM */ 228 ldr r1, [r2, #4] 229 and r7, r1, #0xff 230 cmp r7, #23 /* relative fixup? */ 231 beq fixrel 232 cmp r7, #2 /* absolute fixup? */ 233 beq fixabs 234 /* ignore unknown type of fixup */ 235 b fixnext 236fixabs: 237 /* absolute fix: set location to (offset) symbol value */ 238 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 239 add r1, r10, r1 /* r1 <- address of symbol in table */ 240 ldr r1, [r1, #4] /* r1 <- symbol value */ 241 add r1, r1, r9 /* r1 <- relocated sym addr */ 242 b fixnext 243fixrel: 244 /* relative fix: increase location by offset */ 245 ldr r1, [r0] 246 add r1, r1, r9 247fixnext: 248 str r1, [r0] 249 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 250 cmp r2, r3 251 blo fixloop 252#endif 253 254clear_bss: 255#ifndef CONFIG_PRELOADER 256 ldr r0, _bss_start_ofs 257 ldr r1, _bss_end_ofs 258 mov r4, r6 /* reloc addr */ 259 add r0, r0, r4 260 add r1, r1, r4 261 mov r2, #0x00000000 /* clear */ 262 263clbss_l:str r2, [r0] /* clear loop... */ 264 add r0, r0, #4 265 cmp r0, r1 266 bne clbss_l 267 268 bl coloured_LED_init 269 bl red_LED_on 270#endif 271 272/* 273 * We are done. Do not return, instead branch to second part of board 274 * initialization, now running from RAM. 275 */ 276#ifdef CONFIG_NAND_SPL 277 ldr r0, _nand_boot_ofs 278 mov pc, r0 279 280_nand_boot_ofs: 281 .word nand_boot 282#else 283 ldr r0, _board_init_r_ofs 284 ldr r1, _TEXT_BASE 285 add lr, r0, r1 286 add lr, lr, r9 287 /* setup parameters for board_init_r */ 288 mov r0, r5 /* gd_t */ 289 mov r1, r6 /* dest_addr */ 290 /* jump to it ... */ 291 mov pc, lr 292 293_board_init_r_ofs: 294 .word board_init_r - _start 295#endif 296 297_rel_dyn_start_ofs: 298 .word __rel_dyn_start - _start 299_rel_dyn_end_ofs: 300 .word __rel_dyn_end - _start 301_dynsym_start_ofs: 302 .word __dynsym_start - _start 303 304/* 305 ************************************************************************* 306 * 307 * CPU_init_critical registers 308 * 309 * setup important registers 310 * setup memory timing 311 * 312 ************************************************************************* 313 */ 314#ifndef CONFIG_SKIP_LOWLEVEL_INIT 315cpu_init_crit: 316 /* 317 * flush v4 I/D caches 318 */ 319 mov r0, #0 320 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 321 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 322 323 /* 324 * disable MMU stuff and caches 325 */ 326 mrc p15, 0, r0, c1, c0, 0 327 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 328 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 329 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 330 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 331 mcr p15, 0, r0, c1, c0, 0 332 333 /* 334 * Go setup Memory and board specific bits prior to relocation. 335 */ 336 mov ip, lr /* perserve link reg across call */ 337 bl lowlevel_init /* go setup pll,mux,memory */ 338 mov lr, ip /* restore link */ 339 mov pc, lr /* back to my caller */ 340#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 341 342#ifndef CONFIG_PRELOADER 343/* 344 ************************************************************************* 345 * 346 * Interrupt handling 347 * 348 ************************************************************************* 349 */ 350 351@ 352@ IRQ stack frame. 353@ 354#define S_FRAME_SIZE 72 355 356#define S_OLD_R0 68 357#define S_PSR 64 358#define S_PC 60 359#define S_LR 56 360#define S_SP 52 361 362#define S_IP 48 363#define S_FP 44 364#define S_R10 40 365#define S_R9 36 366#define S_R8 32 367#define S_R7 28 368#define S_R6 24 369#define S_R5 20 370#define S_R4 16 371#define S_R3 12 372#define S_R2 8 373#define S_R1 4 374#define S_R0 0 375 376#define MODE_SVC 0x13 377#define I_BIT 0x80 378 379/* 380 * use bad_save_user_regs for abort/prefetch/undef/swi ... 381 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 382 */ 383 384 .macro bad_save_user_regs 385 @ carve out a frame on current user stack 386 sub sp, sp, #S_FRAME_SIZE 387 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 388 ldr r2, IRQ_STACK_START_IN 389 @ get values for "aborted" pc and cpsr (into parm regs) 390 ldmia r2, {r2 - r3} 391 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 392 add r5, sp, #S_SP 393 mov r1, lr 394 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 395 mov r0, sp @ save current stack into r0 (param register) 396 .endm 397 398 .macro irq_save_user_regs 399 sub sp, sp, #S_FRAME_SIZE 400 stmia sp, {r0 - r12} @ Calling r0-r12 401 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 402 add r8, sp, #S_PC 403 stmdb r8, {sp, lr}^ @ Calling SP, LR 404 str lr, [r8, #0] @ Save calling PC 405 mrs r6, spsr 406 str r6, [r8, #4] @ Save CPSR 407 str r0, [r8, #8] @ Save OLD_R0 408 mov r0, sp 409 .endm 410 411 .macro irq_restore_user_regs 412 ldmia sp, {r0 - lr}^ @ Calling r0 - lr 413 mov r0, r0 414 ldr lr, [sp, #S_PC] @ Get PC 415 add sp, sp, #S_FRAME_SIZE 416 subs pc, lr, #4 @ return & move spsr_svc into cpsr 417 .endm 418 419 .macro get_bad_stack 420 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 421 422 str lr, [r13] @ save caller lr in position 0 of saved stack 423 mrs lr, spsr @ get the spsr 424 str lr, [r13, #4] @ save spsr in position 1 of saved stack 425 mov r13, #MODE_SVC @ prepare SVC-Mode 426 @ msr spsr_c, r13 427 msr spsr, r13 @ switch modes, make sure moves will execute 428 mov lr, pc @ capture return pc 429 movs pc, lr @ jump to next instruction & switch modes. 430 .endm 431 432 .macro get_irq_stack @ setup IRQ stack 433 ldr sp, IRQ_STACK_START 434 .endm 435 436 .macro get_fiq_stack @ setup FIQ stack 437 ldr sp, FIQ_STACK_START 438 .endm 439#endif /* CONFIG_PRELOADER */ 440 441/* 442 * exception handlers 443 */ 444#ifdef CONFIG_PRELOADER 445 .align 5 446do_hang: 447 ldr sp, _TEXT_BASE /* switch to abort stack */ 4481: 449 bl 1b /* hang and never return */ 450#else /* !CONFIG_PRELOADER */ 451 .align 5 452undefined_instruction: 453 get_bad_stack 454 bad_save_user_regs 455 bl do_undefined_instruction 456 457 .align 5 458software_interrupt: 459 get_bad_stack 460 bad_save_user_regs 461 bl do_software_interrupt 462 463 .align 5 464prefetch_abort: 465 get_bad_stack 466 bad_save_user_regs 467 bl do_prefetch_abort 468 469 .align 5 470data_abort: 471 get_bad_stack 472 bad_save_user_regs 473 bl do_data_abort 474 475 .align 5 476not_used: 477 get_bad_stack 478 bad_save_user_regs 479 bl do_not_used 480 481#ifdef CONFIG_USE_IRQ 482 483 .align 5 484irq: 485 get_irq_stack 486 irq_save_user_regs 487 bl do_irq 488 irq_restore_user_regs 489 490 .align 5 491fiq: 492 get_fiq_stack 493 /* someone ought to write a more effiction fiq_save_user_regs */ 494 irq_save_user_regs 495 bl do_fiq 496 irq_restore_user_regs 497 498#else 499 500 .align 5 501irq: 502 get_bad_stack 503 bad_save_user_regs 504 bl do_irq 505 506 .align 5 507fiq: 508 get_bad_stack 509 bad_save_user_regs 510 bl do_fiq 511 512#endif 513#endif /* CONFIG_PRELOADER */ 514