xref: /rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/spear/reset.c (revision 326ea986ac150acdc7656d57fca647db80b50158)
184ad6884SPeter Tyser /*
284ad6884SPeter Tyser  * (C) Copyright 2009
384ad6884SPeter Tyser  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
484ad6884SPeter Tyser  *
5*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
684ad6884SPeter Tyser  */
784ad6884SPeter Tyser 
884ad6884SPeter Tyser #include <common.h>
984ad6884SPeter Tyser #include <asm/io.h>
1084ad6884SPeter Tyser #include <asm/arch/hardware.h>
1184ad6884SPeter Tyser #include <asm/arch/spr_syscntl.h>
1284ad6884SPeter Tyser 
reset_cpu(ulong ignored)1384ad6884SPeter Tyser void reset_cpu(ulong ignored)
1484ad6884SPeter Tyser {
1584ad6884SPeter Tyser 	struct syscntl_regs *syscntl_regs_p =
1684ad6884SPeter Tyser 	    (struct syscntl_regs *)CONFIG_SPEAR_SYSCNTLBASE;
1784ad6884SPeter Tyser 
1884ad6884SPeter Tyser 	printf("System is going to reboot ...\n");
1984ad6884SPeter Tyser 
2084ad6884SPeter Tyser 	/*
2184ad6884SPeter Tyser 	 * This 1 second delay will allow the above message
2284ad6884SPeter Tyser 	 * to be printed before reset
2384ad6884SPeter Tyser 	 */
2484ad6884SPeter Tyser 	udelay((1000 * 1000));
2584ad6884SPeter Tyser 
2684ad6884SPeter Tyser 	/* Going into slow mode before resetting SOC */
2784ad6884SPeter Tyser 	writel(0x02, &syscntl_regs_p->scctrl);
2884ad6884SPeter Tyser 
2984ad6884SPeter Tyser 	/*
3084ad6884SPeter Tyser 	 * Writing any value to the system status register will
3184ad6884SPeter Tyser 	 * reset the SoC
3284ad6884SPeter Tyser 	 */
3384ad6884SPeter Tyser 	writel(0x00, &syscntl_regs_p->scsysstat);
3484ad6884SPeter Tyser 
3584ad6884SPeter Tyser 	/* system will restart */
3684ad6884SPeter Tyser 	while (1)
3784ad6884SPeter Tyser 		;
3884ad6884SPeter Tyser }
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