1*9608e7deSAlbert ARIBAUD/* 2*9608e7deSAlbert ARIBAUD * (C) Copyright 2014 Albert ARIBAUD <albert.u.boot@aribaud.net> 3*9608e7deSAlbert ARIBAUD * 4*9608e7deSAlbert ARIBAUD * Based on: 5*9608e7deSAlbert ARIBAUD * 6*9608e7deSAlbert ARIBAUD * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 7*9608e7deSAlbert ARIBAUD * Tom Cubie <tangliang@allwinnertech.com> 8*9608e7deSAlbert ARIBAUD * 9*9608e7deSAlbert ARIBAUD * Based on omap-common/u-boot-spl.lds: 10*9608e7deSAlbert ARIBAUD * 11*9608e7deSAlbert ARIBAUD * (C) Copyright 2002 12*9608e7deSAlbert ARIBAUD * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 13*9608e7deSAlbert ARIBAUD * 14*9608e7deSAlbert ARIBAUD * (C) Copyright 2010 15*9608e7deSAlbert ARIBAUD * Texas Instruments, <www.ti.com> 16*9608e7deSAlbert ARIBAUD * Aneesh V <aneesh@ti.com> 17*9608e7deSAlbert ARIBAUD * 18*9608e7deSAlbert ARIBAUD * SPDX-License-Identifier: GPL-2.0+ 19*9608e7deSAlbert ARIBAUD */ 20*9608e7deSAlbert ARIBAUDMEMORY { .nor : ORIGIN = CONFIG_SPL_TEXT_BASE,\ 21*9608e7deSAlbert ARIBAUD LENGTH = CONFIG_SPL_MAX_SIZE } 22*9608e7deSAlbert ARIBAUDMEMORY { .bss : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ 23*9608e7deSAlbert ARIBAUD LENGTH = CONFIG_SPL_BSS_MAX_SIZE } 24*9608e7deSAlbert ARIBAUD 25*9608e7deSAlbert ARIBAUDOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 26*9608e7deSAlbert ARIBAUDOUTPUT_ARCH(arm) 27*9608e7deSAlbert ARIBAUDENTRY(_start) 28*9608e7deSAlbert ARIBAUDSECTIONS 29*9608e7deSAlbert ARIBAUD{ 30*9608e7deSAlbert ARIBAUD .text : 31*9608e7deSAlbert ARIBAUD { 32*9608e7deSAlbert ARIBAUD __start = .; 33*9608e7deSAlbert ARIBAUD *(.vectors) 34*9608e7deSAlbert ARIBAUD CPUDIR/start.o (.text) 35*9608e7deSAlbert ARIBAUD *(.text*) 36*9608e7deSAlbert ARIBAUD } > .nor 37*9608e7deSAlbert ARIBAUD 38*9608e7deSAlbert ARIBAUD . = ALIGN(4); 39*9608e7deSAlbert ARIBAUD .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.nor 40*9608e7deSAlbert ARIBAUD 41*9608e7deSAlbert ARIBAUD . = ALIGN(4); 42*9608e7deSAlbert ARIBAUD .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.nor 43*9608e7deSAlbert ARIBAUD 44*9608e7deSAlbert ARIBAUD . = ALIGN(4); 45*9608e7deSAlbert ARIBAUD .u_boot_list : { 46*9608e7deSAlbert ARIBAUD KEEP(*(SORT(.u_boot_list*))); 47*9608e7deSAlbert ARIBAUD } > .nor 48*9608e7deSAlbert ARIBAUD 49*9608e7deSAlbert ARIBAUD . = ALIGN(4); 50*9608e7deSAlbert ARIBAUD __image_copy_end = .; 51*9608e7deSAlbert ARIBAUD _end = .; 52*9608e7deSAlbert ARIBAUD 53*9608e7deSAlbert ARIBAUD .bss : 54*9608e7deSAlbert ARIBAUD { 55*9608e7deSAlbert ARIBAUD . = ALIGN(4); 56*9608e7deSAlbert ARIBAUD __bss_start = .; 57*9608e7deSAlbert ARIBAUD *(.bss*) 58*9608e7deSAlbert ARIBAUD . = ALIGN(4); 59*9608e7deSAlbert ARIBAUD __bss_end = .; 60*9608e7deSAlbert ARIBAUD } > .bss 61*9608e7deSAlbert ARIBAUD} 62