1*db544b96SAlbert ARIBAUD/* 2*db544b96SAlbert ARIBAUD * relocate - i.MX27-specific vector relocation 3*db544b96SAlbert ARIBAUD * 4*db544b96SAlbert ARIBAUD * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net> 5*db544b96SAlbert ARIBAUD * 6*db544b96SAlbert ARIBAUD * SPDX-License-Identifier: GPL-2.0+ 7*db544b96SAlbert ARIBAUD */ 8*db544b96SAlbert ARIBAUD 9*db544b96SAlbert ARIBAUD#include <asm-offsets.h> 10*db544b96SAlbert ARIBAUD#include <config.h> 11*db544b96SAlbert ARIBAUD#include <linux/linkage.h> 12*db544b96SAlbert ARIBAUD 13*db544b96SAlbert ARIBAUD/* 14*db544b96SAlbert ARIBAUD * The i.MX27 SoC is very specific with respect to exceptions: it 15*db544b96SAlbert ARIBAUD * does not provide RAM at the high vectors address (0xFFFF0000), 16*db544b96SAlbert ARIBAUD * thus only the low address (0x00000000) is useable; but that is 17*db544b96SAlbert ARIBAUD * in ROM. Therefore, vectors cannot be changed at all. 18*db544b96SAlbert ARIBAUD * 19*db544b96SAlbert ARIBAUD * However, these ROM-based vectors actually just perform indirect 20*db544b96SAlbert ARIBAUD * calls through pointers located in RAM at SoC-specific addresses, 21*db544b96SAlbert ARIBAUD * as follows: 22*db544b96SAlbert ARIBAUD * 23*db544b96SAlbert ARIBAUD * Offset Exception Use by ROM code 24*db544b96SAlbert ARIBAUD * 0x00000000 reset indirect branch to [0x00000014] 25*db544b96SAlbert ARIBAUD * 0x00000004 undefined instruction indirect branch to [0xfffffef0] 26*db544b96SAlbert ARIBAUD * 0x00000008 software interrupt indirect branch to [0xfffffef4] 27*db544b96SAlbert ARIBAUD * 0x0000000c prefetch abort indirect branch to [0xfffffef8] 28*db544b96SAlbert ARIBAUD * 0x00000010 data abort indirect branch to [0xfffffefc] 29*db544b96SAlbert ARIBAUD * 0x00000014 (reserved in ARMv5) vector to ROM reset: 0xc0000000 30*db544b96SAlbert ARIBAUD * 0x00000018 IRQ indirect branch to [0xffffff00] 31*db544b96SAlbert ARIBAUD * 0x0000001c FIQ indirect branch to [0xffffff04] 32*db544b96SAlbert ARIBAUD * 33*db544b96SAlbert ARIBAUD * In order to initialize exceptions on i.MX27, we must copy U-Boot's 34*db544b96SAlbert ARIBAUD * indirect (not exception!) vector table into 0xfffffef0..0xffffff04 35*db544b96SAlbert ARIBAUD * taking care not to copy vectors number 5 (reserved exception). 36*db544b96SAlbert ARIBAUD */ 37*db544b96SAlbert ARIBAUD 38*db544b96SAlbert ARIBAUD .section .text.relocate_vectors,"ax",%progbits 39*db544b96SAlbert ARIBAUD 40*db544b96SAlbert ARIBAUDENTRY(relocate_vectors) 41*db544b96SAlbert ARIBAUD 42*db544b96SAlbert ARIBAUD ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */ 43*db544b96SAlbert ARIBAUD ldr r1, =32 /* size of vector table */ 44*db544b96SAlbert ARIBAUD add r0, r0, r1 /* skip to indirect table */ 45*db544b96SAlbert ARIBAUD ldr r1, =0xFFFFFEF0 /* i.MX27 indirect table */ 46*db544b96SAlbert ARIBAUD ldmia r0!, {r2-r8} /* load indirect vectors 1..7 */ 47*db544b96SAlbert ARIBAUD stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */ 48*db544b96SAlbert ARIBAUD 49*db544b96SAlbert ARIBAUD bx lr 50*db544b96SAlbert ARIBAUD 51*db544b96SAlbert ARIBAUDENDPROC(relocate_vectors) 52