1 /* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Alex Zuepke <azu@sysgo.de> 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #include <common.h> 30 #include <clps7111.h> 31 #include <asm/proc-armv/ptrace.h> 32 #include <asm/hardware.h> 33 34 #ifndef CONFIG_NETARM 35 /* we always count down the max. */ 36 #define TIMER_LOAD_VAL 0xffff 37 /* macro to read the 16 bit timer */ 38 #define READ_TIMER (IO_TC1D & 0xffff) 39 40 #else 41 #define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE)) 42 #define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL)) 43 #define TM2STAT (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_STATUS)) 44 #define TIMER_LOAD_VAL NETARM_GEN_TSTAT_CTC_MASK 45 #define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK) 46 #endif 47 48 #ifdef CONFIG_USE_IRQ 49 void do_irq (struct pt_regs *pt_regs) 50 { 51 #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) 52 /* No do_irq() for IntegratorAP/CM720T as yet */ 53 #else 54 #error do_irq() not defined for this CPU type 55 #endif 56 } 57 #endif 58 59 #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) 60 /* Use IntegratorAP routines in board/integratorap.c */ 61 #else 62 63 static ulong timestamp; 64 static ulong lastdec; 65 66 int timer_init (void) 67 { 68 #if defined(CONFIG_NETARM) 69 /* disable all interrupts */ 70 IRQEN = 0; 71 72 /* operate timer 2 in non-prescale mode */ 73 TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) | 74 NETARM_GEN_TCTL_ENABLE | 75 NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL)); 76 77 /* set timer 2 counter */ 78 lastdec = TIMER_LOAD_VAL; 79 #elif defined(CONFIG_TEGRA) 80 /* No timer routines for tegra as yet */ 81 lastdec = 0; 82 #else 83 #error No timer_init() defined for this CPU type 84 #endif 85 timestamp = 0; 86 87 return (0); 88 } 89 90 #endif /* ! IntegratorAP */ 91 92 /* 93 * timer without interrupts 94 */ 95 96 97 #if defined(CONFIG_NETARM) 98 99 ulong get_timer (ulong base) 100 { 101 return get_timer_masked () - base; 102 } 103 104 void __udelay (unsigned long usec) 105 { 106 ulong tmo; 107 108 tmo = usec / 1000; 109 tmo *= CONFIG_SYS_HZ; 110 tmo /= 1000; 111 112 tmo += get_timer (0); 113 114 while (get_timer_masked () < tmo) 115 } 116 117 ulong get_timer_masked (void) 118 { 119 ulong now = READ_TIMER; 120 121 if (lastdec >= now) { 122 /* normal mode */ 123 timestamp += lastdec - now; 124 } else { 125 /* we have an overflow ... */ 126 timestamp += lastdec + TIMER_LOAD_VAL - now; 127 } 128 lastdec = now; 129 130 return timestamp; 131 } 132 133 void udelay_masked (unsigned long usec) 134 { 135 ulong tmo; 136 ulong endtime; 137 signed long diff; 138 139 if (usec >= 1000) { 140 tmo = usec / 1000; 141 tmo *= CONFIG_SYS_HZ; 142 tmo /= 1000; 143 } else { 144 tmo = usec * CONFIG_SYS_HZ; 145 tmo /= (1000*1000); 146 } 147 148 endtime = get_timer_masked () + tmo; 149 150 do { 151 ulong now = get_timer_masked (); 152 diff = endtime - now; 153 } while (diff >= 0); 154 } 155 156 #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) 157 /* No timer routines for IntegratorAP/CM720T as yet */ 158 #elif defined(CONFIG_TEGRA) 159 /* No timer routines for tegra as yet */ 160 #else 161 #error Timer routines not defined for this CPU type 162 #endif 163