1*7c760f60SVlad Zakharov/* 2*7c760f60SVlad Zakharov * Copyright (C) 2017 Synopsys, Inc. All rights reserved. 3*7c760f60SVlad Zakharov * 4*7c760f60SVlad Zakharov * SPDX-License-Identifier: GPL-2.0+ 5*7c760f60SVlad Zakharov */ 6*7c760f60SVlad Zakharov 7*7c760f60SVlad Zakharov/ { 8*7c760f60SVlad Zakharov axs10x_mb@e0000000 { 9*7c760f60SVlad Zakharov compatible = "simple-bus"; 10*7c760f60SVlad Zakharov #address-cells = <1>; 11*7c760f60SVlad Zakharov #size-cells = <1>; 12*7c760f60SVlad Zakharov ranges = <0x00000000 0xe0000000 0x10000000>; 13*7c760f60SVlad Zakharov u-boot,dm-pre-reloc; 14*7c760f60SVlad Zakharov 15*7c760f60SVlad Zakharov clocks { 16*7c760f60SVlad Zakharov compatible = "simple-bus"; 17*7c760f60SVlad Zakharov u-boot,dm-pre-reloc; 18*7c760f60SVlad Zakharov 19*7c760f60SVlad Zakharov apbclk: apbclk { 20*7c760f60SVlad Zakharov compatible = "fixed-clock"; 21*7c760f60SVlad Zakharov clock-frequency = <50000000>; 22*7c760f60SVlad Zakharov #clock-cells = <0>; 23*7c760f60SVlad Zakharov }; 24*7c760f60SVlad Zakharov 25*7c760f60SVlad Zakharov uartclk: uartclk { 26*7c760f60SVlad Zakharov compatible = "fixed-clock"; 27*7c760f60SVlad Zakharov clock-frequency = <33333333>; 28*7c760f60SVlad Zakharov #clock-cells = <0>; 29*7c760f60SVlad Zakharov u-boot,dm-pre-reloc; 30*7c760f60SVlad Zakharov }; 31*7c760f60SVlad Zakharov }; 32*7c760f60SVlad Zakharov 33*7c760f60SVlad Zakharov ethernet@18000 { 34*7c760f60SVlad Zakharov #interrupt-cells = <1>; 35*7c760f60SVlad Zakharov compatible = "altr,socfpga-stmmac"; 36*7c760f60SVlad Zakharov reg = < 0x18000 0x2000 >; 37*7c760f60SVlad Zakharov interrupts = < 25 >; 38*7c760f60SVlad Zakharov interrupt-names = "macirq"; 39*7c760f60SVlad Zakharov phy-mode = "gmii"; 40*7c760f60SVlad Zakharov snps,pbl = < 32 >; 41*7c760f60SVlad Zakharov clocks = <&apbclk>; 42*7c760f60SVlad Zakharov clock-names = "stmmaceth"; 43*7c760f60SVlad Zakharov max-speed = <100>; 44*7c760f60SVlad Zakharov }; 45*7c760f60SVlad Zakharov 46*7c760f60SVlad Zakharov ehci@0x40000 { 47*7c760f60SVlad Zakharov compatible = "generic-ehci"; 48*7c760f60SVlad Zakharov reg = < 0x40000 0x100 >; 49*7c760f60SVlad Zakharov interrupts = < 8 >; 50*7c760f60SVlad Zakharov }; 51*7c760f60SVlad Zakharov 52*7c760f60SVlad Zakharov ohci@0x60000 { 53*7c760f60SVlad Zakharov compatible = "generic-ohci"; 54*7c760f60SVlad Zakharov reg = < 0x60000 0x100 >; 55*7c760f60SVlad Zakharov interrupts = < 8 >; 56*7c760f60SVlad Zakharov }; 57*7c760f60SVlad Zakharov 58*7c760f60SVlad Zakharov uart0: serial0@22000 { 59*7c760f60SVlad Zakharov compatible = "snps,dw-apb-uart"; 60*7c760f60SVlad Zakharov reg = <0x22000 0x100>; 61*7c760f60SVlad Zakharov clocks = <&uartclk>; 62*7c760f60SVlad Zakharov reg-shift = <2>; 63*7c760f60SVlad Zakharov reg-io-width = <4>; 64*7c760f60SVlad Zakharov }; 65*7c760f60SVlad Zakharov }; 66*7c760f60SVlad Zakharov}; 67