xref: /rk3399_rockchip-uboot/arch/arc/dts/abilis_tb100.dts (revision 7c760f6021b7a7a37f8a4b8741ce032bb0afc620)
109424d11SAlexey Brodkin/*
209424d11SAlexey Brodkin * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
309424d11SAlexey Brodkin *
409424d11SAlexey Brodkin * SPDX-License-Identifier:	GPL-2.0+
509424d11SAlexey Brodkin */
609424d11SAlexey Brodkin/dts-v1/;
709424d11SAlexey Brodkin
809424d11SAlexey Brodkin#include "skeleton.dtsi"
909424d11SAlexey Brodkin
1009424d11SAlexey Brodkin/ {
1109424d11SAlexey Brodkin	aliases {
1209424d11SAlexey Brodkin		console = &uart0;
1309424d11SAlexey Brodkin	};
1409424d11SAlexey Brodkin
15*7c760f60SVlad Zakharov	cpu_card {
16*7c760f60SVlad Zakharov		core_clk: core_clk {
17*7c760f60SVlad Zakharov			#clock-cells = <0>;
18*7c760f60SVlad Zakharov			compatible = "fixed-clock";
19*7c760f60SVlad Zakharov			clock-frequency = <500000000>;
20*7c760f60SVlad Zakharov			u-boot,dm-pre-reloc;
21*7c760f60SVlad Zakharov		};
22*7c760f60SVlad Zakharov	};
23*7c760f60SVlad Zakharov
2409424d11SAlexey Brodkin	uart0: serial@ff100000 {
2509424d11SAlexey Brodkin			compatible = "snps,dw-apb-uart";
2609424d11SAlexey Brodkin			reg = <0xff100000 0x1000>;
2709424d11SAlexey Brodkin			reg-shift = <2>;
2809424d11SAlexey Brodkin			reg-io-width = <4>;
2909424d11SAlexey Brodkin	};
3009424d11SAlexey Brodkin};
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