xref: /rk3399_rockchip-uboot/arch/arc/cpu/arcv1/ivt.S (revision b491d9757d14415edcb1468ed896a704d0f0cfe7)
1*4d93617dSAlexey Brodkin/*
2*4d93617dSAlexey Brodkin * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3*4d93617dSAlexey Brodkin *
4*4d93617dSAlexey Brodkin * SPDX-License-Identifier:	GPL-2.0+
5*4d93617dSAlexey Brodkin */
6*4d93617dSAlexey Brodkin
7*4d93617dSAlexey Brodkin.section .ivt, "ax",@progbits
8*4d93617dSAlexey Brodkin.align 4
9*4d93617dSAlexey Brodkin_ivt:
10*4d93617dSAlexey Brodkin	/* Critical system events */
11*4d93617dSAlexey Brodkin	j	_start			/* 0 - 0x000 */
12*4d93617dSAlexey Brodkin	j	memory_error		/* 1 - 0x008 */
13*4d93617dSAlexey Brodkin	j	instruction_error	/* 2 - 0x010 */
14*4d93617dSAlexey Brodkin
15*4d93617dSAlexey Brodkin	/* Device interrupts */
16*4d93617dSAlexey Brodkin.rept	29
17*4d93617dSAlexey Brodkin	j	interrupt_handler	/* 3:31 - 0x018:0xF8 */
18*4d93617dSAlexey Brodkin.endr
19*4d93617dSAlexey Brodkin	/* Exceptions */
20*4d93617dSAlexey Brodkin	j	EV_MachineCheck		/* 0x100, Fatal Machine check  (0x20) */
21*4d93617dSAlexey Brodkin	j	EV_TLBMissI		/* 0x108, Intruction TLB miss  (0x21) */
22*4d93617dSAlexey Brodkin	j	EV_TLBMissD		/* 0x110, Data TLB miss        (0x22) */
23*4d93617dSAlexey Brodkin	j	EV_TLBProtV		/* 0x118, Protection Violation (0x23)
24*4d93617dSAlexey Brodkin							or Misaligned Access  */
25*4d93617dSAlexey Brodkin	j	EV_PrivilegeV		/* 0x120, Privilege Violation  (0x24) */
26*4d93617dSAlexey Brodkin	j	EV_Trap			/* 0x128, Trap exception       (0x25) */
27*4d93617dSAlexey Brodkin	j	EV_Extension		/* 0x130, Extn Intruction Excp (0x26) */
28