1a47a12beSStefan Roese /* 2a47a12beSStefan Roese * (C) Copyright 2007 Semihalf 3a47a12beSStefan Roese * 4a47a12beSStefan Roese * Written by: Rafal Jaworowski <raj@semihalf.com> 5a47a12beSStefan Roese * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7a47a12beSStefan Roese * 8a47a12beSStefan Roese * This file contains routines that fetch data from PowerPC-dependent sources 9a47a12beSStefan Roese * (bd_info etc.) 10a47a12beSStefan Roese */ 11a47a12beSStefan Roese 12a47a12beSStefan Roese #include <config.h> 13a47a12beSStefan Roese #include <linux/types.h> 14a47a12beSStefan Roese #include <api_public.h> 15a47a12beSStefan Roese 16a47a12beSStefan Roese #include <asm/u-boot.h> 17a47a12beSStefan Roese #include <asm/global_data.h> 18a47a12beSStefan Roese 19a47a12beSStefan Roese #include "api_private.h" 20a47a12beSStefan Roese 21a47a12beSStefan Roese DECLARE_GLOBAL_DATA_PTR; 22a47a12beSStefan Roese 23a47a12beSStefan Roese /* 24a47a12beSStefan Roese * Important notice: handling of individual fields MUST be kept in sync with 25a47a12beSStefan Roese * include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes 26a47a12beSStefan Roese * need to reflect their current state and layout of structures involved! 27a47a12beSStefan Roese */ 28a47a12beSStefan Roese int platform_sys_info(struct sys_info *si) 29a47a12beSStefan Roese { 30a47a12beSStefan Roese si->clk_bus = gd->bus_clk; 31a47a12beSStefan Roese si->clk_cpu = gd->cpu_clk; 32a47a12beSStefan Roese 33a47a12beSStefan Roese #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \ 34a47a12beSStefan Roese defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 35a47a12beSStefan Roese #define bi_bar bi_immr_base 36a47a12beSStefan Roese #elif defined(CONFIG_MPC5xxx) 37a47a12beSStefan Roese #define bi_bar bi_mbar_base 38a47a12beSStefan Roese #elif defined(CONFIG_MPC83xx) 39a47a12beSStefan Roese #define bi_bar bi_immrbar 40a47a12beSStefan Roese #endif 41a47a12beSStefan Roese 42a47a12beSStefan Roese #if defined(bi_bar) 43a47a12beSStefan Roese si->bar = gd->bd->bi_bar; 44a47a12beSStefan Roese #undef bi_bar 45a47a12beSStefan Roese #else 46a47a12beSStefan Roese si->bar = 0; 47a47a12beSStefan Roese #endif 48a47a12beSStefan Roese 49a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM); 50a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH); 51a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM); 52a47a12beSStefan Roese 53a47a12beSStefan Roese return 1; 54a47a12beSStefan Roese } 55