xref: /rk3399_ARM-atf/tools/fiptool/plat_fiptool/st/plat_def_uuid_config.c (revision 10327628cae3db9bcf2e92c6cde46b3658e9c242) 
1*e494afc0SYann Gautier /*
2*e494afc0SYann Gautier  * Copyright (c) 2022-2024, STMicroelectronics - All Rights Reserved
3*e494afc0SYann Gautier  *
4*e494afc0SYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
5*e494afc0SYann Gautier  */
6*e494afc0SYann Gautier 
7*e494afc0SYann Gautier #include <stddef.h>
8*e494afc0SYann Gautier 
9*e494afc0SYann Gautier #include <firmware_image_package.h>
10*e494afc0SYann Gautier 
11*e494afc0SYann Gautier #include "tbbr_config.h"
12*e494afc0SYann Gautier 
13*e494afc0SYann Gautier toc_entry_t plat_def_toc_entries[] = {
14*e494afc0SYann Gautier 	{
15*e494afc0SYann Gautier 		.name = "DDR_FW",
16*e494afc0SYann Gautier 		.uuid = UUID_DDR_FW,
17*e494afc0SYann Gautier 		.cmdline_name = "ddr-fw"
18*e494afc0SYann Gautier 	},
19*e494afc0SYann Gautier 	{
20*e494afc0SYann Gautier 		.name = "STM32MP CONFIG CERT",
21*e494afc0SYann Gautier 		.uuid = UUID_STM32MP_CONFIG_CERT,
22*e494afc0SYann Gautier 		.cmdline_name = "stm32mp-cfg-cert"
23*e494afc0SYann Gautier 	},
24*e494afc0SYann Gautier 
25*e494afc0SYann Gautier 	{
26*e494afc0SYann Gautier 		.name = NULL,
27*e494afc0SYann Gautier 		.uuid = { {0} },
28*e494afc0SYann Gautier 		.cmdline_name = NULL,
29*e494afc0SYann Gautier 	}
30*e494afc0SYann Gautier };
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