xref: /rk3399_ARM-atf/services/std_svc/spmd/spmd_private.h (revision f0b64e507e9105813d9a5d16f70101cf0d8ca5a4)
1bdd2596dSAchin Gupta /*
2*f0b64e50SMadhukar Pappireddy  * Copyright (c) 2019-2023, Arm Limited and Contributors. All rights reserved.
3bdd2596dSAchin Gupta  *
4bdd2596dSAchin Gupta  * SPDX-License-Identifier: BSD-3-Clause
5bdd2596dSAchin Gupta  */
6bdd2596dSAchin Gupta 
7bdd2596dSAchin Gupta #ifndef SPMD_PRIVATE_H
8bdd2596dSAchin Gupta #define SPMD_PRIVATE_H
9bdd2596dSAchin Gupta 
10885e2683SClaus Pedersen #include <common/bl_common.h>
11bdd2596dSAchin Gupta #include <context.h>
12bdd2596dSAchin Gupta 
13bdd2596dSAchin Gupta /*******************************************************************************
14bdd2596dSAchin Gupta  * Constants that allow assembler code to preserve callee-saved registers of the
15bdd2596dSAchin Gupta  * C runtime context while performing a security state switch.
16bdd2596dSAchin Gupta  ******************************************************************************/
17bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X19		0x0
18bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X20		0x8
19bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X21		0x10
20bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X22		0x18
21bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X23		0x20
22bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X24		0x28
23bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X25		0x30
24bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X26		0x38
25bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X27		0x40
26bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X28		0x48
27bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X29		0x50
28bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_X30		0x58
29bdd2596dSAchin Gupta 
30bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_SIZE		0x60
31bdd2596dSAchin Gupta #define SPMD_C_RT_CTX_ENTRIES		(SPMD_C_RT_CTX_SIZE >> DWORD_SHIFT)
32bdd2596dSAchin Gupta 
33bdd2596dSAchin Gupta #ifndef __ASSEMBLER__
34bdd2596dSAchin Gupta #include <stdint.h>
35a334c4e6SOlivier Deprez #include <lib/psci/psci_lib.h>
36a334c4e6SOlivier Deprez #include <plat/common/platform.h>
37a334c4e6SOlivier Deprez #include <services/ffa_svc.h>
38bdd2596dSAchin Gupta 
39bdd2596dSAchin Gupta typedef enum spmc_state {
40bdd2596dSAchin Gupta 	SPMC_STATE_RESET = 0,
419dcf63ddSOlivier Deprez 	SPMC_STATE_OFF,
429dcf63ddSOlivier Deprez 	SPMC_STATE_ON_PENDING,
439dcf63ddSOlivier Deprez 	SPMC_STATE_ON
44bdd2596dSAchin Gupta } spmc_state_t;
45bdd2596dSAchin Gupta 
46bdd2596dSAchin Gupta /*
47bdd2596dSAchin Gupta  * Data structure used by the SPM dispatcher (SPMD) in EL3 to track context of
48bdd2596dSAchin Gupta  * the SPM core (SPMC) at the next lower EL.
49bdd2596dSAchin Gupta  */
50bdd2596dSAchin Gupta typedef struct spmd_spm_core_context {
51bdd2596dSAchin Gupta 	uint64_t c_rt_ctx;
52bdd2596dSAchin Gupta 	cpu_context_t cpu_ctx;
53bdd2596dSAchin Gupta 	spmc_state_t state;
548cb99c3fSOlivier Deprez 	bool secure_interrupt_ongoing;
55bdd2596dSAchin Gupta } spmd_spm_core_context_t;
56bdd2596dSAchin Gupta 
57bdd2596dSAchin Gupta /*
58662af36dSJ-Alves  * Reserve ID for NS physical FFA Endpoint.
59ac03ac5eSMax Shvetsov  */
60662af36dSJ-Alves #define FFA_NS_ENDPOINT_ID			U(0)
61ac03ac5eSMax Shvetsov 
629944f557SDaniel Boulby /* Define SPMD target function IDs for framework messages to the SPMC */
639944f557SDaniel Boulby #define SPMD_FWK_MSG_FFA_VERSION_REQ		U(0x8)
649944f557SDaniel Boulby #define SPMD_FWK_MSG_FFA_VERSION_RESP		U(0x9)
659944f557SDaniel Boulby 
669944f557SDaniel Boulby /* Function to build SPMD to SPMC message */
679944f557SDaniel Boulby void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target,
689944f557SDaniel Boulby 			     unsigned long long message);
699944f557SDaniel Boulby 
7052696946SOlivier Deprez /* Functions used to enter/exit SPMC synchronously */
71bdd2596dSAchin Gupta uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *ctx);
72bdd2596dSAchin Gupta __dead2 void spmd_spm_core_sync_exit(uint64_t rc);
73bdd2596dSAchin Gupta 
74bdd2596dSAchin Gupta /* Assembly helpers */
75bdd2596dSAchin Gupta uint64_t spmd_spm_core_enter(uint64_t *c_rt_ctx);
76bdd2596dSAchin Gupta void __dead2 spmd_spm_core_exit(uint64_t c_rt_ctx, uint64_t ret);
77bdd2596dSAchin Gupta 
78a334c4e6SOlivier Deprez /* SPMD SPD power management handlers */
79a334c4e6SOlivier Deprez extern const spd_pm_ops_t spmd_pm;
80a334c4e6SOlivier Deprez 
81c0267cc9SOlivier Deprez /* SPMC entry point information helper */
82c0267cc9SOlivier Deprez entry_point_info_t *spmd_spmc_ep_info_get(void);
83c0267cc9SOlivier Deprez 
84a92bc73bSOlivier Deprez /* SPMC ID getter */
85a92bc73bSOlivier Deprez uint16_t spmd_spmc_id_get(void);
86a92bc73bSOlivier Deprez 
8702d50bb0SOlivier Deprez /* SPMC context on CPU based on mpidr */
8802d50bb0SOlivier Deprez spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr);
8902d50bb0SOlivier Deprez 
9052696946SOlivier Deprez /* SPMC context on current CPU get helper */
9152696946SOlivier Deprez spmd_spm_core_context_t *spmd_get_context(void);
9252696946SOlivier Deprez 
93cdb49d47SOlivier Deprez int spmd_pm_secondary_ep_register(uintptr_t entry_point);
94f0d743dbSOlivier Deprez bool spmd_check_address_in_binary_image(uint64_t address);
95f0d743dbSOlivier Deprez 
96*f0b64e50SMadhukar Pappireddy /*
97*f0b64e50SMadhukar Pappireddy  * Platform hook in EL3 firmware to handle for Group0 secure interrupt.
98*f0b64e50SMadhukar Pappireddy  * Return values:
99*f0b64e50SMadhukar Pappireddy  *  0 = success
100*f0b64e50SMadhukar Pappireddy  *  otherwise it returns a negative value
101*f0b64e50SMadhukar Pappireddy  */
102*f0b64e50SMadhukar Pappireddy int plat_spmd_handle_group0_interrupt(uint32_t id);
103bdd2596dSAchin Gupta #endif /* __ASSEMBLER__ */
104bdd2596dSAchin Gupta 
105bdd2596dSAchin Gupta #endif /* SPMD_PRIVATE_H */
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