1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <string.h> 10 11 #include <arch_helpers.h> 12 #include <arch/aarch64/arch_features.h> 13 #include <bl31/bl31.h> 14 #include <common/debug.h> 15 #include <common/runtime_svc.h> 16 #include <lib/el3_runtime/context_mgmt.h> 17 #include <lib/smccc.h> 18 #include <lib/spinlock.h> 19 #include <lib/utils.h> 20 #include <plat/common/common_def.h> 21 #include <plat/common/platform.h> 22 #include <platform_def.h> 23 #include <services/ffa_svc.h> 24 #include <services/spmd_svc.h> 25 #include <smccc_helpers.h> 26 #include "spmd_private.h" 27 28 /******************************************************************************* 29 * SPM Core context information. 30 ******************************************************************************/ 31 static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 32 33 /******************************************************************************* 34 * SPM Core attribute information read from its manifest. 35 ******************************************************************************/ 36 static spmc_manifest_attribute_t spmc_attrs; 37 38 /******************************************************************************* 39 * SPM Core entry point information. Discovered on the primary core and reused 40 * on secondary cores. 41 ******************************************************************************/ 42 static entry_point_info_t *spmc_ep_info; 43 44 /******************************************************************************* 45 * SPM Core context on current CPU get helper. 46 ******************************************************************************/ 47 spmd_spm_core_context_t *spmd_get_context(void) 48 { 49 unsigned int linear_id = plat_my_core_pos(); 50 51 return &spm_core_context[linear_id]; 52 } 53 54 /******************************************************************************* 55 * SPM Core entry point information get helper. 56 ******************************************************************************/ 57 entry_point_info_t *spmd_spmc_ep_info_get(void) 58 { 59 return spmc_ep_info; 60 } 61 62 /******************************************************************************* 63 * Static function declaration. 64 ******************************************************************************/ 65 static int32_t spmd_init(void); 66 static int spmd_spmc_init(void *pm_addr); 67 static uint64_t spmd_ffa_error_return(void *handle, 68 int error_code); 69 static uint64_t spmd_smc_forward(uint32_t smc_fid, 70 bool secure_origin, 71 uint64_t x1, 72 uint64_t x2, 73 uint64_t x3, 74 uint64_t x4, 75 void *handle); 76 77 /******************************************************************************* 78 * This function takes an SPMC context pointer and performs a synchronous 79 * SPMC entry. 80 ******************************************************************************/ 81 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 82 { 83 uint64_t rc; 84 85 assert(spmc_ctx != NULL); 86 87 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 88 89 /* Restore the context assigned above */ 90 cm_el1_sysregs_context_restore(SECURE); 91 #if SPMD_SPM_AT_SEL2 92 cm_el2_sysregs_context_restore(SECURE); 93 #endif 94 cm_set_next_eret_context(SECURE); 95 96 /* Enter SPMC */ 97 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 98 99 /* Save secure state */ 100 cm_el1_sysregs_context_save(SECURE); 101 #if SPMD_SPM_AT_SEL2 102 cm_el2_sysregs_context_save(SECURE); 103 #endif 104 105 return rc; 106 } 107 108 /******************************************************************************* 109 * This function returns to the place where spmd_spm_core_sync_entry() was 110 * called originally. 111 ******************************************************************************/ 112 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 113 { 114 spmd_spm_core_context_t *ctx = spmd_get_context(); 115 116 /* Get current CPU context from SPMC context */ 117 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 118 119 /* 120 * The SPMD must have initiated the original request through a 121 * synchronous entry into SPMC. Jump back to the original C runtime 122 * context with the value of rc in x0; 123 */ 124 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 125 126 panic(); 127 } 128 129 /******************************************************************************* 130 * Jump to the SPM Core for the first time. 131 ******************************************************************************/ 132 static int32_t spmd_init(void) 133 { 134 spmd_spm_core_context_t *ctx = spmd_get_context(); 135 uint64_t rc; 136 unsigned int linear_id = plat_my_core_pos(); 137 unsigned int core_id; 138 139 VERBOSE("SPM Core init start.\n"); 140 ctx->state = SPMC_STATE_ON_PENDING; 141 142 /* Set the SPMC context state on other CPUs to OFF */ 143 for (core_id = 0; core_id < PLATFORM_CORE_COUNT; core_id++) { 144 if (core_id != linear_id) { 145 spm_core_context[core_id].state = SPMC_STATE_OFF; 146 } 147 } 148 149 rc = spmd_spm_core_sync_entry(ctx); 150 if (rc != 0ULL) { 151 ERROR("SPMC initialisation failed 0x%llx\n", rc); 152 return 0; 153 } 154 155 ctx->state = SPMC_STATE_ON; 156 157 VERBOSE("SPM Core init end.\n"); 158 159 return 1; 160 } 161 162 /******************************************************************************* 163 * Loads SPMC manifest and inits SPMC. 164 ******************************************************************************/ 165 static int spmd_spmc_init(void *pm_addr) 166 { 167 spmd_spm_core_context_t *spm_ctx = spmd_get_context(); 168 uint32_t ep_attr; 169 int rc; 170 171 /* Load the SPM Core manifest */ 172 rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr); 173 if (rc != 0) { 174 WARN("No or invalid SPM Core manifest image provided by BL2\n"); 175 return rc; 176 } 177 178 /* 179 * Ensure that the SPM Core version is compatible with the SPM 180 * Dispatcher version. 181 */ 182 if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) || 183 (spmc_attrs.minor_version > FFA_VERSION_MINOR)) { 184 WARN("Unsupported FFA version (%u.%u)\n", 185 spmc_attrs.major_version, spmc_attrs.minor_version); 186 return -EINVAL; 187 } 188 189 VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version, 190 spmc_attrs.minor_version); 191 192 VERBOSE("SPM Core run time EL%x.\n", 193 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1); 194 195 /* Validate the SPMC ID, Ensure high bit is set */ 196 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) & 197 SPMC_SECURE_ID_MASK) == 0U) { 198 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id); 199 return -EINVAL; 200 } 201 202 /* Validate the SPM Core execution state */ 203 if ((spmc_attrs.exec_state != MODE_RW_64) && 204 (spmc_attrs.exec_state != MODE_RW_32)) { 205 WARN("Unsupported %s%x.\n", "SPM Core execution state 0x", 206 spmc_attrs.exec_state); 207 return -EINVAL; 208 } 209 210 VERBOSE("%s%x.\n", "SPM Core execution state 0x", 211 spmc_attrs.exec_state); 212 213 #if SPMD_SPM_AT_SEL2 214 /* Ensure manifest has not requested AArch32 state in S-EL2 */ 215 if (spmc_attrs.exec_state == MODE_RW_32) { 216 WARN("AArch32 state at S-EL2 is not supported.\n"); 217 return -EINVAL; 218 } 219 220 /* 221 * Check if S-EL2 is supported on this system if S-EL2 222 * is required for SPM 223 */ 224 if (!is_armv8_4_sel2_present()) { 225 WARN("SPM Core run time S-EL2 is not supported.\n"); 226 return -EINVAL; 227 } 228 #endif /* SPMD_SPM_AT_SEL2 */ 229 230 /* Initialise an entrypoint to set up the CPU context */ 231 ep_attr = SECURE | EP_ST_ENABLE; 232 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) { 233 ep_attr |= EP_EE_BIG; 234 } 235 236 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 237 assert(spmc_ep_info->pc == BL32_BASE); 238 239 /* 240 * Populate SPSR for SPM Core based upon validated parameters from the 241 * manifest. 242 */ 243 if (spmc_attrs.exec_state == MODE_RW_32) { 244 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 245 SPSR_E_LITTLE, 246 DAIF_FIQ_BIT | 247 DAIF_IRQ_BIT | 248 DAIF_ABT_BIT); 249 } else { 250 251 #if SPMD_SPM_AT_SEL2 252 static const uint32_t runtime_el = MODE_EL2; 253 #else 254 static const uint32_t runtime_el = MODE_EL1; 255 #endif 256 spmc_ep_info->spsr = SPSR_64(runtime_el, 257 MODE_SP_ELX, 258 DISABLE_ALL_EXCEPTIONS); 259 } 260 261 /* Initialise SPM Core context with this entry point information */ 262 cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info); 263 264 /* Reuse PSCI affinity states to mark this SPMC context as off */ 265 spm_ctx->state = AFF_STATE_OFF; 266 267 INFO("SPM Core setup done.\n"); 268 269 /* Register init function for deferred init. */ 270 bl31_register_bl32_init(&spmd_init); 271 272 return 0; 273 } 274 275 /******************************************************************************* 276 * Initialize context of SPM Core. 277 ******************************************************************************/ 278 int spmd_setup(void) 279 { 280 void *spmc_manifest; 281 int rc; 282 283 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 284 if (spmc_ep_info == NULL) { 285 WARN("No SPM Core image provided by BL2 boot loader.\n"); 286 return -EINVAL; 287 } 288 289 /* Under no circumstances will this parameter be 0 */ 290 assert(spmc_ep_info->pc != 0ULL); 291 292 /* 293 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 294 * be used as a manifest for the SPM Core at the next lower EL/mode. 295 */ 296 spmc_manifest = (void *)spmc_ep_info->args.arg0; 297 if (spmc_manifest == NULL) { 298 ERROR("Invalid or absent SPM Core manifest.\n"); 299 return -EINVAL; 300 } 301 302 /* Load manifest, init SPMC */ 303 rc = spmd_spmc_init(spmc_manifest); 304 if (rc != 0) { 305 WARN("Booting device without SPM initialization.\n"); 306 } 307 308 return rc; 309 } 310 311 /******************************************************************************* 312 * Forward SMC to the other security state 313 ******************************************************************************/ 314 static uint64_t spmd_smc_forward(uint32_t smc_fid, 315 bool secure_origin, 316 uint64_t x1, 317 uint64_t x2, 318 uint64_t x3, 319 uint64_t x4, 320 void *handle) 321 { 322 uint32_t secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 323 uint32_t secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 324 325 /* Save incoming security state */ 326 cm_el1_sysregs_context_save(secure_state_in); 327 #if SPMD_SPM_AT_SEL2 328 cm_el2_sysregs_context_save(secure_state_in); 329 #endif 330 331 /* Restore outgoing security state */ 332 cm_el1_sysregs_context_restore(secure_state_out); 333 #if SPMD_SPM_AT_SEL2 334 cm_el2_sysregs_context_restore(secure_state_out); 335 #endif 336 cm_set_next_eret_context(secure_state_out); 337 338 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 339 SMC_GET_GP(handle, CTX_GPREG_X5), 340 SMC_GET_GP(handle, CTX_GPREG_X6), 341 SMC_GET_GP(handle, CTX_GPREG_X7)); 342 } 343 344 /******************************************************************************* 345 * Return FFA_ERROR with specified error code 346 ******************************************************************************/ 347 static uint64_t spmd_ffa_error_return(void *handle, int error_code) 348 { 349 SMC_RET8(handle, FFA_ERROR, 350 FFA_TARGET_INFO_MBZ, error_code, 351 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 352 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 353 } 354 355 /******************************************************************************* 356 * This function handles all SMCs in the range reserved for FFA. Each call is 357 * either forwarded to the other security state or handled by the SPM dispatcher 358 ******************************************************************************/ 359 uint64_t spmd_smc_handler(uint32_t smc_fid, 360 uint64_t x1, 361 uint64_t x2, 362 uint64_t x3, 363 uint64_t x4, 364 void *cookie, 365 void *handle, 366 uint64_t flags) 367 { 368 spmd_spm_core_context_t *ctx = spmd_get_context(); 369 bool secure_origin; 370 int32_t ret; 371 uint32_t input_version; 372 373 /* Determine which security state this SMC originated from */ 374 secure_origin = is_caller_secure(flags); 375 376 INFO("SPM: 0x%x 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx\n", 377 smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5), 378 SMC_GET_GP(handle, CTX_GPREG_X6), 379 SMC_GET_GP(handle, CTX_GPREG_X7)); 380 381 switch (smc_fid) { 382 case FFA_ERROR: 383 /* 384 * Check if this is the first invocation of this interface on 385 * this CPU. If so, then indicate that the SPM Core initialised 386 * unsuccessfully. 387 */ 388 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 389 spmd_spm_core_sync_exit(x2); 390 } 391 392 return spmd_smc_forward(smc_fid, secure_origin, 393 x1, x2, x3, x4, handle); 394 break; /* not reached */ 395 396 case FFA_VERSION: 397 input_version = (uint32_t)(0xFFFFFFFF & x1); 398 /* 399 * If caller is secure and SPMC was initialized, 400 * return FFA_VERSION of SPMD. 401 * If caller is non secure and SPMC was initialized, 402 * return SPMC's version. 403 * Sanity check to "input_version". 404 */ 405 if ((input_version & FFA_VERSION_BIT31_MASK) || 406 (ctx->state == SPMC_STATE_RESET)) { 407 ret = FFA_ERROR_NOT_SUPPORTED; 408 } else if (!secure_origin) { 409 ret = MAKE_FFA_VERSION(spmc_attrs.major_version, spmc_attrs.minor_version); 410 } else { 411 ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, FFA_VERSION_MINOR); 412 } 413 414 SMC_RET8(handle, ret, FFA_TARGET_INFO_MBZ, FFA_TARGET_INFO_MBZ, 415 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 416 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 417 break; /* not reached */ 418 419 case FFA_FEATURES: 420 /* 421 * This is an optional interface. Do the minimal checks and 422 * forward to SPM Core which will handle it if implemented. 423 */ 424 425 /* 426 * Check if x1 holds a valid FFA fid. This is an 427 * optimization. 428 */ 429 if (!is_ffa_fid(x1)) { 430 return spmd_ffa_error_return(handle, 431 FFA_ERROR_NOT_SUPPORTED); 432 } 433 434 /* Forward SMC from Normal world to the SPM Core */ 435 if (!secure_origin) { 436 return spmd_smc_forward(smc_fid, secure_origin, 437 x1, x2, x3, x4, handle); 438 } 439 440 /* 441 * Return success if call was from secure world i.e. all 442 * FFA functions are supported. This is essentially a 443 * nop. 444 */ 445 SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4, 446 SMC_GET_GP(handle, CTX_GPREG_X5), 447 SMC_GET_GP(handle, CTX_GPREG_X6), 448 SMC_GET_GP(handle, CTX_GPREG_X7)); 449 450 break; /* not reached */ 451 452 case FFA_ID_GET: 453 /* 454 * Returns the ID of the calling FFA component. 455 */ 456 if (!secure_origin) { 457 SMC_RET8(handle, FFA_SUCCESS_SMC32, 458 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID, 459 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 460 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 461 FFA_PARAM_MBZ); 462 } 463 464 SMC_RET8(handle, FFA_SUCCESS_SMC32, 465 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 466 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 467 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 468 FFA_PARAM_MBZ); 469 470 break; /* not reached */ 471 472 case FFA_RX_RELEASE: 473 case FFA_RXTX_MAP_SMC32: 474 case FFA_RXTX_MAP_SMC64: 475 case FFA_RXTX_UNMAP: 476 case FFA_MSG_RUN: 477 /* This interface must be invoked only by the Normal world */ 478 if (secure_origin) { 479 return spmd_ffa_error_return(handle, 480 FFA_ERROR_NOT_SUPPORTED); 481 } 482 483 /* Fall through to forward the call to the other world */ 484 485 case FFA_PARTITION_INFO_GET: 486 case FFA_MSG_SEND: 487 case FFA_MSG_SEND_DIRECT_REQ_SMC32: 488 case FFA_MSG_SEND_DIRECT_REQ_SMC64: 489 case FFA_MSG_SEND_DIRECT_RESP_SMC32: 490 case FFA_MSG_SEND_DIRECT_RESP_SMC64: 491 case FFA_MEM_DONATE_SMC32: 492 case FFA_MEM_DONATE_SMC64: 493 case FFA_MEM_LEND_SMC32: 494 case FFA_MEM_LEND_SMC64: 495 case FFA_MEM_SHARE_SMC32: 496 case FFA_MEM_SHARE_SMC64: 497 case FFA_MEM_RETRIEVE_REQ_SMC32: 498 case FFA_MEM_RETRIEVE_REQ_SMC64: 499 case FFA_MEM_RETRIEVE_RESP: 500 case FFA_MEM_RELINQUISH: 501 case FFA_MEM_RECLAIM: 502 case FFA_SUCCESS_SMC32: 503 case FFA_SUCCESS_SMC64: 504 /* 505 * TODO: Assume that no requests originate from EL3 at the 506 * moment. This will change if a SP service is required in 507 * response to secure interrupts targeted to EL3. Until then 508 * simply forward the call to the Normal world. 509 */ 510 511 return spmd_smc_forward(smc_fid, secure_origin, 512 x1, x2, x3, x4, handle); 513 break; /* not reached */ 514 515 case FFA_MSG_WAIT: 516 /* 517 * Check if this is the first invocation of this interface on 518 * this CPU from the Secure world. If so, then indicate that the 519 * SPM Core initialised successfully. 520 */ 521 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 522 spmd_spm_core_sync_exit(0); 523 } 524 525 /* Fall through to forward the call to the other world */ 526 527 case FFA_MSG_YIELD: 528 /* This interface must be invoked only by the Secure world */ 529 if (!secure_origin) { 530 return spmd_ffa_error_return(handle, 531 FFA_ERROR_NOT_SUPPORTED); 532 } 533 534 return spmd_smc_forward(smc_fid, secure_origin, 535 x1, x2, x3, x4, handle); 536 break; /* not reached */ 537 538 default: 539 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 540 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 541 } 542 } 543