1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <string.h> 10 11 #include <arch_helpers.h> 12 #include <bl31/bl31.h> 13 #include <common/debug.h> 14 #include <common/runtime_svc.h> 15 #include <lib/el3_runtime/context_mgmt.h> 16 #include <lib/smccc.h> 17 #include <lib/spinlock.h> 18 #include <lib/utils.h> 19 #include <lib/xlat_tables/xlat_tables_v2.h> 20 #include <plat/common/common_def.h> 21 #include <plat/common/platform.h> 22 #include <platform_def.h> 23 #include <services/spci_svc.h> 24 #include <services/spmd_svc.h> 25 #include <smccc_helpers.h> 26 #include "spmd_private.h" 27 28 /******************************************************************************* 29 * SPM Core context information. 30 ******************************************************************************/ 31 spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 32 33 /******************************************************************************* 34 * SPM Core attribute information read from its manifest. 35 ******************************************************************************/ 36 static spmc_manifest_sect_attribute_t spmc_attrs; 37 38 /******************************************************************************* 39 * SPM Core entry point information. Discovered on the primary core and reused 40 * on secondary cores. 41 ******************************************************************************/ 42 static entry_point_info_t *spmc_ep_info; 43 44 /******************************************************************************* 45 * Static function declaration. 46 ******************************************************************************/ 47 static int32_t spmd_init(void); 48 static int spmd_spmc_init(void *rd_base, size_t rd_size); 49 static uint64_t spmd_spci_error_return(void *handle, int error_code); 50 static uint64_t spmd_smc_forward(uint32_t smc_fid, bool secure_origin, 51 uint64_t x1, uint64_t x2, uint64_t x3, 52 uint64_t x4, void *handle); 53 54 /******************************************************************************* 55 * This function takes an SP context pointer and performs a synchronous entry 56 * into it. 57 ******************************************************************************/ 58 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 59 { 60 uint64_t rc; 61 62 assert(spmc_ctx != NULL); 63 64 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 65 66 /* Restore the context assigned above */ 67 cm_el1_sysregs_context_restore(SECURE); 68 cm_el2_sysregs_context_restore(SECURE); 69 cm_set_next_eret_context(SECURE); 70 71 /* Invalidate TLBs at EL1. */ 72 tlbivmalle1(); 73 dsbish(); 74 75 /* Enter Secure Partition */ 76 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 77 78 /* Save secure state */ 79 cm_el1_sysregs_context_save(SECURE); 80 cm_el2_sysregs_context_save(SECURE); 81 82 return rc; 83 } 84 85 /******************************************************************************* 86 * This function returns to the place where spm_sp_synchronous_entry() was 87 * called originally. 88 ******************************************************************************/ 89 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 90 { 91 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 92 93 /* Get context of the SP in use by this CPU. */ 94 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 95 96 /* 97 * The SPMD must have initiated the original request through a 98 * synchronous entry into SPMC. Jump back to the original C runtime 99 * context with the value of rc in x0; 100 */ 101 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 102 103 panic(); 104 } 105 106 /******************************************************************************* 107 * Jump to the SPM core for the first time. 108 ******************************************************************************/ 109 static int32_t spmd_init(void) 110 { 111 uint64_t rc = 0; 112 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 113 114 INFO("SPM Core init start.\n"); 115 ctx->state = SPMC_STATE_RESET; 116 117 rc = spmd_spm_core_sync_entry(ctx); 118 if (rc) { 119 ERROR("SPMC initialisation failed 0x%llx\n", rc); 120 panic(); 121 } 122 123 ctx->state = SPMC_STATE_IDLE; 124 INFO("SPM Core init end.\n"); 125 126 return 1; 127 } 128 129 /******************************************************************************* 130 * Load SPMC manifest, init SPMC. 131 ******************************************************************************/ 132 static int spmd_spmc_init(void *rd_base, size_t rd_size) 133 { 134 int rc; 135 uint32_t ep_attr; 136 unsigned int linear_id = plat_my_core_pos(); 137 spmd_spm_core_context_t *spm_ctx = &spm_core_context[linear_id]; 138 139 /* Load the SPM core manifest */ 140 rc = plat_spm_core_manifest_load(&spmc_attrs, rd_base, rd_size); 141 if (rc != 0) { 142 WARN("No or invalid SPM core manifest image provided by BL2 " 143 "boot loader. "); 144 return 1; 145 } 146 147 /* 148 * Ensure that the SPM core version is compatible with the SPM 149 * dispatcher version 150 */ 151 if ((spmc_attrs.major_version != SPCI_VERSION_MAJOR) || 152 (spmc_attrs.minor_version > SPCI_VERSION_MINOR)) { 153 WARN("Unsupported SPCI version (%x.%x) specified in SPM core " 154 "manifest image provided by BL2 boot loader.\n", 155 spmc_attrs.major_version, spmc_attrs.minor_version); 156 return 1; 157 } 158 159 INFO("SPCI version (%x.%x).\n", spmc_attrs.major_version, 160 spmc_attrs.minor_version); 161 162 /* Validate the SPM core runtime EL */ 163 if ((spmc_attrs.runtime_el != MODE_EL1) && 164 (spmc_attrs.runtime_el != MODE_EL2)) { 165 WARN("Unsupported SPM core run time EL%x specified in " 166 "manifest image provided by BL2 boot loader.\n", 167 spmc_attrs.runtime_el); 168 return 1; 169 } 170 171 INFO("SPM core run time EL%x.\n", spmc_attrs.runtime_el); 172 173 /* Validate the SPM core execution state */ 174 if ((spmc_attrs.exec_state != MODE_RW_64) && 175 (spmc_attrs.exec_state != MODE_RW_32)) { 176 WARN("Unsupported SPM core execution state %x specified in " 177 "manifest image provided by BL2 boot loader.\n", 178 spmc_attrs.exec_state); 179 return 1; 180 } 181 182 INFO("SPM core execution state %x.\n", spmc_attrs.exec_state); 183 184 /* Ensure manifest has not requested S-EL2 in AArch32 state */ 185 if ((spmc_attrs.exec_state == MODE_RW_32) && 186 (spmc_attrs.runtime_el == MODE_EL2)) { 187 WARN("Invalid combination of SPM core execution state (%x) " 188 "and run time EL (%x).\n", spmc_attrs.exec_state, 189 spmc_attrs.runtime_el); 190 return 1; 191 } 192 193 /* 194 * Check if S-EL2 is supported on this system if S-EL2 195 * is required for SPM 196 */ 197 if (spmc_attrs.runtime_el == MODE_EL2) { 198 uint64_t sel2 = read_id_aa64pfr0_el1(); 199 200 sel2 >>= ID_AA64PFR0_SEL2_SHIFT; 201 sel2 &= ID_AA64PFR0_SEL2_MASK; 202 203 if (!sel2) { 204 WARN("SPM core run time EL: S-EL%x is not supported " 205 "but specified in manifest image provided by " 206 "BL2 boot loader.\n", spmc_attrs.runtime_el); 207 return 1; 208 } 209 } 210 211 /* Initialise an entrypoint to set up the CPU context */ 212 ep_attr = SECURE | EP_ST_ENABLE; 213 if (read_sctlr_el3() & SCTLR_EE_BIT) { 214 ep_attr |= EP_EE_BIG; 215 } 216 217 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 218 assert(spmc_ep_info->pc == BL32_BASE); 219 220 /* 221 * Populate SPSR for SPM core based upon validated parameters from the 222 * manifest 223 */ 224 if (spmc_attrs.exec_state == MODE_RW_32) { 225 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 226 SPSR_E_LITTLE, 227 DAIF_FIQ_BIT | 228 DAIF_IRQ_BIT | 229 DAIF_ABT_BIT); 230 } else { 231 spmc_ep_info->spsr = SPSR_64(spmc_attrs.runtime_el, 232 MODE_SP_ELX, 233 DISABLE_ALL_EXCEPTIONS); 234 } 235 236 /* Initialise SPM core context with this entry point information */ 237 cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info); 238 239 /* Reuse PSCI affinity states to mark this SPMC context as off */ 240 spm_ctx->state = AFF_STATE_OFF; 241 242 INFO("SPM core setup done.\n"); 243 244 /* Register init function for deferred init. */ 245 bl31_register_bl32_init(&spmd_init); 246 247 return 0; 248 } 249 250 /******************************************************************************* 251 * Initialize context of SPM core. 252 ******************************************************************************/ 253 int spmd_setup(void) 254 { 255 int rc; 256 void *rd_base; 257 size_t rd_size; 258 uintptr_t rd_base_align; 259 uintptr_t rd_size_align; 260 261 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 262 if (!spmc_ep_info) { 263 WARN("No SPM core image provided by BL2 boot loader, Booting " 264 "device without SP initialization. SMC`s destined for SPM " 265 "core will return SMC_UNK\n"); 266 return 1; 267 } 268 269 /* Under no circumstances will this parameter be 0 */ 270 assert(spmc_ep_info->pc != 0U); 271 272 /* 273 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 274 * be used as a manifest for the SPM core at the next lower EL/mode. 275 */ 276 if (spmc_ep_info->args.arg0 == 0U || spmc_ep_info->args.arg2 == 0U) { 277 ERROR("Invalid or absent SPM core manifest\n"); 278 panic(); 279 } 280 281 /* Obtain whereabouts of SPM core manifest */ 282 rd_base = (void *) spmc_ep_info->args.arg0; 283 rd_size = spmc_ep_info->args.arg2; 284 285 rd_base_align = page_align((uintptr_t) rd_base, DOWN); 286 rd_size_align = page_align((uintptr_t) rd_size, UP); 287 288 /* Map the manifest in the SPMD translation regime first */ 289 VERBOSE("SPM core manifest base : 0x%lx\n", rd_base_align); 290 VERBOSE("SPM core manifest size : 0x%lx\n", rd_size_align); 291 rc = mmap_add_dynamic_region((unsigned long long) rd_base_align, 292 (uintptr_t) rd_base_align, 293 rd_size_align, 294 MT_RO_DATA); 295 if (rc != 0) { 296 ERROR("Error while mapping SPM core manifest (%d).\n", rc); 297 panic(); 298 } 299 300 /* Load manifest, init SPMC */ 301 rc = spmd_spmc_init(rd_base, rd_size); 302 if (rc != 0) { 303 int mmap_rc; 304 305 WARN("Booting device without SPM initialization. " 306 "SPCI SMCs destined for SPM core will return " 307 "ENOTSUPPORTED\n"); 308 309 mmap_rc = mmap_remove_dynamic_region(rd_base_align, 310 rd_size_align); 311 if (mmap_rc != 0) { 312 ERROR("Error while unmapping SPM core manifest (%d).\n", 313 mmap_rc); 314 panic(); 315 } 316 317 return rc; 318 } 319 320 return 0; 321 } 322 323 /******************************************************************************* 324 * Forward SMC to the other security state 325 ******************************************************************************/ 326 static uint64_t spmd_smc_forward(uint32_t smc_fid, bool secure_origin, 327 uint64_t x1, uint64_t x2, uint64_t x3, 328 uint64_t x4, void *handle) 329 { 330 uint32_t secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 331 uint32_t secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 332 333 /* Save incoming security state */ 334 cm_el1_sysregs_context_save(secure_state_in); 335 cm_el2_sysregs_context_save(secure_state_in); 336 337 /* Restore outgoing security state */ 338 cm_el1_sysregs_context_restore(secure_state_out); 339 cm_el2_sysregs_context_restore(secure_state_out); 340 cm_set_next_eret_context(secure_state_out); 341 342 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 343 SMC_GET_GP(handle, CTX_GPREG_X5), 344 SMC_GET_GP(handle, CTX_GPREG_X6), 345 SMC_GET_GP(handle, CTX_GPREG_X7)); 346 } 347 348 /******************************************************************************* 349 * Return SPCI_ERROR with specified error code 350 ******************************************************************************/ 351 static uint64_t spmd_spci_error_return(void *handle, int error_code) 352 { 353 SMC_RET8(handle, SPCI_ERROR, 354 SPCI_TARGET_INFO_MBZ, error_code, 355 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 356 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ); 357 } 358 359 /******************************************************************************* 360 * This function handles all SMCs in the range reserved for SPCI. Each call is 361 * either forwarded to the other security state or handled by the SPM dispatcher 362 ******************************************************************************/ 363 uint64_t spmd_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 364 uint64_t x3, uint64_t x4, void *cookie, void *handle, 365 uint64_t flags) 366 { 367 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 368 bool secure_origin; 369 int32_t ret; 370 371 /* Determine which security state this SMC originated from */ 372 secure_origin = is_caller_secure(flags); 373 374 INFO("SPM: 0x%x, 0x%llx, 0x%llx, 0x%llx, 0x%llx, " 375 "0x%llx, 0x%llx, 0x%llx\n", 376 smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5), 377 SMC_GET_GP(handle, CTX_GPREG_X6), 378 SMC_GET_GP(handle, CTX_GPREG_X7)); 379 380 switch (smc_fid) { 381 case SPCI_ERROR: 382 /* 383 * Check if this is the first invocation of this interface on 384 * this CPU. If so, then indicate that the SPM core initialised 385 * unsuccessfully. 386 */ 387 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) { 388 spmd_spm_core_sync_exit(x2); 389 } 390 391 return spmd_smc_forward(smc_fid, secure_origin, 392 x1, x2, x3, x4, handle); 393 break; /* not reached */ 394 395 case SPCI_VERSION: 396 /* 397 * TODO: This is an optimization that the version information 398 * provided by the SPM core manifest is returned by the SPM 399 * dispatcher. It might be a better idea to simply forward this 400 * call to the SPM core and wash our hands completely. 401 */ 402 ret = MAKE_SPCI_VERSION(spmc_attrs.major_version, 403 spmc_attrs.minor_version); 404 SMC_RET8(handle, SPCI_SUCCESS_SMC32, SPCI_TARGET_INFO_MBZ, ret, 405 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 406 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ); 407 break; /* not reached */ 408 409 case SPCI_FEATURES: 410 /* 411 * This is an optional interface. Do the minimal checks and 412 * forward to SPM core which will handle it if implemented. 413 */ 414 415 /* 416 * Check if x1 holds a valid SPCI fid. This is an 417 * optimization. 418 */ 419 if (!is_spci_fid(x1)) { 420 return spmd_spci_error_return(handle, 421 SPCI_ERROR_NOT_SUPPORTED); 422 } 423 424 /* Forward SMC from Normal world to the SPM core */ 425 if (!secure_origin) { 426 return spmd_smc_forward(smc_fid, secure_origin, 427 x1, x2, x3, x4, handle); 428 } else { 429 /* 430 * Return success if call was from secure world i.e. all 431 * SPCI functions are supported. This is essentially a 432 * nop. 433 */ 434 SMC_RET8(handle, SPCI_SUCCESS_SMC32, x1, x2, x3, x4, 435 SMC_GET_GP(handle, CTX_GPREG_X5), 436 SMC_GET_GP(handle, CTX_GPREG_X6), 437 SMC_GET_GP(handle, CTX_GPREG_X7)); 438 } 439 440 break; /* not reached */ 441 442 case SPCI_RX_RELEASE: 443 case SPCI_RXTX_MAP_SMC32: 444 case SPCI_RXTX_MAP_SMC64: 445 case SPCI_RXTX_UNMAP: 446 case SPCI_MSG_RUN: 447 /* This interface must be invoked only by the Normal world */ 448 if (secure_origin) { 449 return spmd_spci_error_return(handle, 450 SPCI_ERROR_NOT_SUPPORTED); 451 } 452 453 /* Fall through to forward the call to the other world */ 454 455 case SPCI_PARTITION_INFO_GET: 456 case SPCI_MSG_SEND: 457 case SPCI_MSG_SEND_DIRECT_REQ_SMC32: 458 case SPCI_MSG_SEND_DIRECT_REQ_SMC64: 459 case SPCI_MSG_SEND_DIRECT_RESP_SMC32: 460 case SPCI_MSG_SEND_DIRECT_RESP_SMC64: 461 case SPCI_MEM_DONATE_SMC32: 462 case SPCI_MEM_DONATE_SMC64: 463 case SPCI_MEM_LEND_SMC32: 464 case SPCI_MEM_LEND_SMC64: 465 case SPCI_MEM_SHARE_SMC32: 466 case SPCI_MEM_SHARE_SMC64: 467 case SPCI_MEM_RETRIEVE_REQ_SMC32: 468 case SPCI_MEM_RETRIEVE_REQ_SMC64: 469 case SPCI_MEM_RETRIEVE_RESP: 470 case SPCI_MEM_RELINQUISH: 471 case SPCI_MEM_RECLAIM: 472 case SPCI_SUCCESS_SMC32: 473 case SPCI_SUCCESS_SMC64: 474 /* 475 * TODO: Assume that no requests originate from EL3 at the 476 * moment. This will change if a SP service is required in 477 * response to secure interrupts targeted to EL3. Until then 478 * simply forward the call to the Normal world. 479 */ 480 481 return spmd_smc_forward(smc_fid, secure_origin, 482 x1, x2, x3, x4, handle); 483 break; /* not reached */ 484 485 case SPCI_MSG_WAIT: 486 /* 487 * Check if this is the first invocation of this interface on 488 * this CPU from the Secure world. If so, then indicate that the 489 * SPM core initialised successfully. 490 */ 491 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) { 492 spmd_spm_core_sync_exit(0); 493 } 494 495 /* Fall through to forward the call to the other world */ 496 497 case SPCI_MSG_YIELD: 498 /* This interface must be invoked only by the Secure world */ 499 if (!secure_origin) { 500 return spmd_spci_error_return(handle, 501 SPCI_ERROR_NOT_SUPPORTED); 502 } 503 504 return spmd_smc_forward(smc_fid, secure_origin, 505 x1, x2, x3, x4, handle); 506 break; /* not reached */ 507 508 default: 509 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 510 return spmd_spci_error_return(handle, SPCI_ERROR_NOT_SUPPORTED); 511 } 512 } 513