1 /* 2 * Copyright (c) 2020-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch/aarch64/arch_features.h> 15 #include <bl31/bl31.h> 16 #include <bl31/interrupt_mgmt.h> 17 #include <common/debug.h> 18 #include <common/runtime_svc.h> 19 #include <common/tbbr/tbbr_img_def.h> 20 #include <lib/el3_runtime/context_mgmt.h> 21 #include <lib/fconf/fconf.h> 22 #include <lib/fconf/fconf_dyn_cfg_getter.h> 23 #include <lib/smccc.h> 24 #include <lib/spinlock.h> 25 #include <lib/utils.h> 26 #include <lib/xlat_tables/xlat_tables_v2.h> 27 #include <plat/common/common_def.h> 28 #include <plat/common/platform.h> 29 #include <platform_def.h> 30 #include <services/ffa_svc.h> 31 #include <services/spmc_svc.h> 32 #include <services/spmd_svc.h> 33 #include <smccc_helpers.h> 34 #include "spmd_private.h" 35 36 /******************************************************************************* 37 * SPM Core context information. 38 ******************************************************************************/ 39 static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 40 41 /******************************************************************************* 42 * SPM Core attribute information is read from its manifest if the SPMC is not 43 * at EL3. Else, it is populated from the SPMC directly. 44 ******************************************************************************/ 45 static spmc_manifest_attribute_t spmc_attrs; 46 47 /******************************************************************************* 48 * SPM Core entry point information. Discovered on the primary core and reused 49 * on secondary cores. 50 ******************************************************************************/ 51 static entry_point_info_t *spmc_ep_info; 52 53 /******************************************************************************* 54 * SPM Core context on CPU based on mpidr. 55 ******************************************************************************/ 56 spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr) 57 { 58 int core_idx = plat_core_pos_by_mpidr(mpidr); 59 60 if (core_idx < 0) { 61 ERROR("Invalid mpidr: %" PRIx64 ", returned ID: %d\n", mpidr, core_idx); 62 panic(); 63 } 64 65 return &spm_core_context[core_idx]; 66 } 67 68 /******************************************************************************* 69 * SPM Core context on current CPU get helper. 70 ******************************************************************************/ 71 spmd_spm_core_context_t *spmd_get_context(void) 72 { 73 return spmd_get_context_by_mpidr(read_mpidr()); 74 } 75 76 /******************************************************************************* 77 * SPM Core ID getter. 78 ******************************************************************************/ 79 uint16_t spmd_spmc_id_get(void) 80 { 81 return spmc_attrs.spmc_id; 82 } 83 84 /******************************************************************************* 85 * Static function declaration. 86 ******************************************************************************/ 87 static int32_t spmd_init(void); 88 static int spmd_spmc_init(void *pm_addr); 89 static uint64_t spmd_ffa_error_return(void *handle, 90 int error_code); 91 static uint64_t spmd_smc_forward(uint32_t smc_fid, 92 bool secure_origin, 93 uint64_t x1, 94 uint64_t x2, 95 uint64_t x3, 96 uint64_t x4, 97 void *cookie, 98 void *handle, 99 uint64_t flags); 100 101 /****************************************************************************** 102 * Builds an SPMD to SPMC direct message request. 103 *****************************************************************************/ 104 void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target_func, 105 unsigned long long message) 106 { 107 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_MSG_SEND_DIRECT_REQ_SMC32); 108 write_ctx_reg(gpregs, CTX_GPREG_X1, 109 (SPMD_DIRECT_MSG_ENDPOINT_ID << FFA_DIRECT_MSG_SOURCE_SHIFT) | 110 spmd_spmc_id_get()); 111 write_ctx_reg(gpregs, CTX_GPREG_X2, BIT(31) | target_func); 112 write_ctx_reg(gpregs, CTX_GPREG_X3, message); 113 } 114 115 116 /******************************************************************************* 117 * This function takes an SPMC context pointer and performs a synchronous 118 * SPMC entry. 119 ******************************************************************************/ 120 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 121 { 122 uint64_t rc; 123 124 assert(spmc_ctx != NULL); 125 126 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 127 128 /* Restore the context assigned above */ 129 #if SPMD_SPM_AT_SEL2 130 cm_el2_sysregs_context_restore(SECURE); 131 #else 132 cm_el1_sysregs_context_restore(SECURE); 133 #endif 134 cm_set_next_eret_context(SECURE); 135 136 /* Enter SPMC */ 137 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 138 139 /* Save secure state */ 140 #if SPMD_SPM_AT_SEL2 141 cm_el2_sysregs_context_save(SECURE); 142 #else 143 cm_el1_sysregs_context_save(SECURE); 144 #endif 145 146 return rc; 147 } 148 149 /******************************************************************************* 150 * This function returns to the place where spmd_spm_core_sync_entry() was 151 * called originally. 152 ******************************************************************************/ 153 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 154 { 155 spmd_spm_core_context_t *ctx = spmd_get_context(); 156 157 /* Get current CPU context from SPMC context */ 158 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 159 160 /* 161 * The SPMD must have initiated the original request through a 162 * synchronous entry into SPMC. Jump back to the original C runtime 163 * context with the value of rc in x0; 164 */ 165 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 166 167 panic(); 168 } 169 170 /******************************************************************************* 171 * Jump to the SPM Core for the first time. 172 ******************************************************************************/ 173 static int32_t spmd_init(void) 174 { 175 spmd_spm_core_context_t *ctx = spmd_get_context(); 176 uint64_t rc; 177 178 VERBOSE("SPM Core init start.\n"); 179 180 /* Primary boot core enters the SPMC for initialization. */ 181 ctx->state = SPMC_STATE_ON_PENDING; 182 183 rc = spmd_spm_core_sync_entry(ctx); 184 if (rc != 0ULL) { 185 ERROR("SPMC initialisation failed 0x%" PRIx64 "\n", rc); 186 return 0; 187 } 188 189 ctx->state = SPMC_STATE_ON; 190 191 VERBOSE("SPM Core init end.\n"); 192 193 return 1; 194 } 195 196 /******************************************************************************* 197 * spmd_secure_interrupt_handler 198 * Enter the SPMC for further handling of the secure interrupt by the SPMC 199 * itself or a Secure Partition. 200 ******************************************************************************/ 201 static uint64_t spmd_secure_interrupt_handler(uint32_t id, 202 uint32_t flags, 203 void *handle, 204 void *cookie) 205 { 206 spmd_spm_core_context_t *ctx = spmd_get_context(); 207 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 208 unsigned int linear_id = plat_my_core_pos(); 209 int64_t rc; 210 211 /* Sanity check the security state when the exception was generated */ 212 assert(get_interrupt_src_ss(flags) == NON_SECURE); 213 214 /* Sanity check the pointer to this cpu's context */ 215 assert(handle == cm_get_context(NON_SECURE)); 216 217 /* Save the non-secure context before entering SPMC */ 218 cm_el1_sysregs_context_save(NON_SECURE); 219 #if SPMD_SPM_AT_SEL2 220 cm_el2_sysregs_context_save(NON_SECURE); 221 #endif 222 223 /* Convey the event to the SPMC through the FFA_INTERRUPT interface. */ 224 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_INTERRUPT); 225 write_ctx_reg(gpregs, CTX_GPREG_X1, 0); 226 write_ctx_reg(gpregs, CTX_GPREG_X2, 0); 227 write_ctx_reg(gpregs, CTX_GPREG_X3, 0); 228 write_ctx_reg(gpregs, CTX_GPREG_X4, 0); 229 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 230 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 231 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 232 233 /* Mark current core as handling a secure interrupt. */ 234 ctx->secure_interrupt_ongoing = true; 235 236 rc = spmd_spm_core_sync_entry(ctx); 237 if (rc != 0ULL) { 238 ERROR("%s failed (%" PRId64 ") on CPU%u\n", __func__, rc, linear_id); 239 } 240 241 ctx->secure_interrupt_ongoing = false; 242 243 cm_el1_sysregs_context_restore(NON_SECURE); 244 #if SPMD_SPM_AT_SEL2 245 cm_el2_sysregs_context_restore(NON_SECURE); 246 #endif 247 cm_set_next_eret_context(NON_SECURE); 248 249 SMC_RET0(&ctx->cpu_ctx); 250 } 251 252 #if (EL3_EXCEPTION_HANDLING == 0) 253 /******************************************************************************* 254 * spmd_group0_interrupt_handler_nwd 255 * Group0 secure interrupt in the normal world are trapped to EL3. Delegate the 256 * handling of the interrupt to the platform handler, and return only upon 257 * successfully handling the Group0 interrupt. 258 ******************************************************************************/ 259 static uint64_t spmd_group0_interrupt_handler_nwd(uint32_t id, 260 uint32_t flags, 261 void *handle, 262 void *cookie) 263 { 264 uint32_t intid; 265 266 /* Sanity check the security state when the exception was generated. */ 267 assert(get_interrupt_src_ss(flags) == NON_SECURE); 268 269 /* Sanity check the pointer to this cpu's context. */ 270 assert(handle == cm_get_context(NON_SECURE)); 271 272 assert(id == INTR_ID_UNAVAILABLE); 273 274 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 275 276 intid = plat_ic_get_pending_interrupt_id(); 277 278 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 279 ERROR("Group0 interrupt %u not handled\n", intid); 280 panic(); 281 } 282 283 return 0U; 284 } 285 #endif 286 287 /******************************************************************************* 288 * spmd_handle_group0_intr_swd 289 * SPMC delegates handling of Group0 secure interrupt to EL3 firmware using 290 * FFA_EL3_INTR_HANDLE SMC call. Further, SPMD delegates the handling of the 291 * interrupt to the platform handler, and returns only upon successfully 292 * handling the Group0 interrupt. 293 ******************************************************************************/ 294 static uint64_t spmd_handle_group0_intr_swd(void *handle) 295 { 296 uint32_t intid; 297 298 /* Sanity check the pointer to this cpu's context */ 299 assert(handle == cm_get_context(SECURE)); 300 301 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 302 303 intid = plat_ic_get_pending_interrupt_id(); 304 305 /* 306 * TODO: Currently due to a limitation in SPMD implementation, the 307 * platform handler is expected to not delegate handling to NWd while 308 * processing Group0 secure interrupt. 309 */ 310 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 311 /* Group0 interrupt was not handled by the platform. */ 312 ERROR("Group0 interrupt %u not handled\n", intid); 313 panic(); 314 } 315 316 /* Return success. */ 317 SMC_RET8(handle, FFA_SUCCESS_SMC32, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 318 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 319 FFA_PARAM_MBZ); 320 } 321 322 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 323 static int spmd_dynamic_map_mem(uintptr_t base_addr, size_t size, 324 unsigned int attr, uintptr_t *align_addr, 325 size_t *align_size) 326 { 327 uintptr_t base_addr_align; 328 size_t mapped_size_align; 329 int rc; 330 331 /* Page aligned address and size if necessary */ 332 base_addr_align = page_align(base_addr, DOWN); 333 mapped_size_align = page_align(size, UP); 334 335 if ((base_addr != base_addr_align) && 336 (size == mapped_size_align)) { 337 mapped_size_align += PAGE_SIZE; 338 } 339 340 /* 341 * Map dynamically given region with its aligned base address and 342 * size 343 */ 344 rc = mmap_add_dynamic_region((unsigned long long)base_addr_align, 345 base_addr_align, 346 mapped_size_align, 347 attr); 348 if (rc == 0) { 349 *align_addr = base_addr_align; 350 *align_size = mapped_size_align; 351 } 352 353 return rc; 354 } 355 356 static void spmd_do_sec_cpy(uintptr_t root_base_addr, uintptr_t sec_base_addr, 357 size_t size) 358 { 359 uintptr_t root_base_addr_align, sec_base_addr_align; 360 size_t root_mapped_size_align, sec_mapped_size_align; 361 int rc; 362 363 assert(root_base_addr != 0UL); 364 assert(sec_base_addr != 0UL); 365 assert(size != 0UL); 366 367 /* Map the memory with required attributes */ 368 rc = spmd_dynamic_map_mem(root_base_addr, size, MT_RO_DATA | MT_ROOT, 369 &root_base_addr_align, 370 &root_mapped_size_align); 371 if (rc != 0) { 372 ERROR("%s %s %lu (%d)\n", "Error while mapping", "root region", 373 root_base_addr, rc); 374 panic(); 375 } 376 377 rc = spmd_dynamic_map_mem(sec_base_addr, size, MT_RW_DATA | MT_SECURE, 378 &sec_base_addr_align, &sec_mapped_size_align); 379 if (rc != 0) { 380 ERROR("%s %s %lu (%d)\n", "Error while mapping", 381 "secure region", sec_base_addr, rc); 382 panic(); 383 } 384 385 /* Do copy operation */ 386 (void)memcpy((void *)sec_base_addr, (void *)root_base_addr, size); 387 388 /* Unmap root memory region */ 389 rc = mmap_remove_dynamic_region(root_base_addr_align, 390 root_mapped_size_align); 391 if (rc != 0) { 392 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 393 "root region", root_base_addr_align, rc); 394 panic(); 395 } 396 397 /* Unmap secure memory region */ 398 rc = mmap_remove_dynamic_region(sec_base_addr_align, 399 sec_mapped_size_align); 400 if (rc != 0) { 401 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 402 "secure region", sec_base_addr_align, rc); 403 panic(); 404 } 405 } 406 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 407 408 /******************************************************************************* 409 * Loads SPMC manifest and inits SPMC. 410 ******************************************************************************/ 411 static int spmd_spmc_init(void *pm_addr) 412 { 413 cpu_context_t *cpu_ctx; 414 unsigned int core_id; 415 uint32_t ep_attr, flags; 416 int rc; 417 const struct dyn_cfg_dtb_info_t *image_info __unused; 418 419 /* Load the SPM Core manifest */ 420 rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr); 421 if (rc != 0) { 422 WARN("No or invalid SPM Core manifest image provided by BL2\n"); 423 return rc; 424 } 425 426 /* 427 * Ensure that the SPM Core version is compatible with the SPM 428 * Dispatcher version. 429 */ 430 if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) || 431 (spmc_attrs.minor_version > FFA_VERSION_MINOR)) { 432 WARN("Unsupported FFA version (%u.%u)\n", 433 spmc_attrs.major_version, spmc_attrs.minor_version); 434 return -EINVAL; 435 } 436 437 VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version, 438 spmc_attrs.minor_version); 439 440 VERBOSE("SPM Core run time EL%x.\n", 441 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1); 442 443 /* Validate the SPMC ID, Ensure high bit is set */ 444 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) & 445 SPMC_SECURE_ID_MASK) == 0U) { 446 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id); 447 return -EINVAL; 448 } 449 450 /* Validate the SPM Core execution state */ 451 if ((spmc_attrs.exec_state != MODE_RW_64) && 452 (spmc_attrs.exec_state != MODE_RW_32)) { 453 WARN("Unsupported %s%x.\n", "SPM Core execution state 0x", 454 spmc_attrs.exec_state); 455 return -EINVAL; 456 } 457 458 VERBOSE("%s%x.\n", "SPM Core execution state 0x", 459 spmc_attrs.exec_state); 460 461 #if SPMD_SPM_AT_SEL2 462 /* Ensure manifest has not requested AArch32 state in S-EL2 */ 463 if (spmc_attrs.exec_state == MODE_RW_32) { 464 WARN("AArch32 state at S-EL2 is not supported.\n"); 465 return -EINVAL; 466 } 467 468 /* 469 * Check if S-EL2 is supported on this system if S-EL2 470 * is required for SPM 471 */ 472 if (!is_feat_sel2_supported()) { 473 WARN("SPM Core run time S-EL2 is not supported.\n"); 474 return -EINVAL; 475 } 476 #endif /* SPMD_SPM_AT_SEL2 */ 477 478 /* Initialise an entrypoint to set up the CPU context */ 479 ep_attr = SECURE | EP_ST_ENABLE; 480 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) { 481 ep_attr |= EP_EE_BIG; 482 } 483 484 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 485 486 /* 487 * Populate SPSR for SPM Core based upon validated parameters from the 488 * manifest. 489 */ 490 if (spmc_attrs.exec_state == MODE_RW_32) { 491 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 492 SPSR_E_LITTLE, 493 DAIF_FIQ_BIT | 494 DAIF_IRQ_BIT | 495 DAIF_ABT_BIT); 496 } else { 497 498 #if SPMD_SPM_AT_SEL2 499 static const uint32_t runtime_el = MODE_EL2; 500 #else 501 static const uint32_t runtime_el = MODE_EL1; 502 #endif 503 spmc_ep_info->spsr = SPSR_64(runtime_el, 504 MODE_SP_ELX, 505 DISABLE_ALL_EXCEPTIONS); 506 } 507 508 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 509 image_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID); 510 assert(image_info != NULL); 511 512 if ((image_info->config_addr == 0UL) || 513 (image_info->secondary_config_addr == 0UL) || 514 (image_info->config_max_size == 0UL)) { 515 return -EINVAL; 516 } 517 518 /* Copy manifest from root->secure region */ 519 spmd_do_sec_cpy(image_info->config_addr, 520 image_info->secondary_config_addr, 521 image_info->config_max_size); 522 523 /* Update ep info of BL32 */ 524 assert(spmc_ep_info != NULL); 525 spmc_ep_info->args.arg0 = image_info->secondary_config_addr; 526 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 527 528 /* Set an initial SPMC context state for all cores. */ 529 for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) { 530 spm_core_context[core_id].state = SPMC_STATE_OFF; 531 532 /* Setup an initial cpu context for the SPMC. */ 533 cpu_ctx = &spm_core_context[core_id].cpu_ctx; 534 cm_setup_context(cpu_ctx, spmc_ep_info); 535 536 /* 537 * Pass the core linear ID to the SPMC through x4. 538 * (TF-A implementation defined behavior helping 539 * a legacy TOS migration to adopt FF-A). 540 */ 541 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X4, core_id); 542 } 543 544 /* Register power management hooks with PSCI */ 545 psci_register_spd_pm_hook(&spmd_pm); 546 547 /* Register init function for deferred init. */ 548 bl31_register_bl32_init(&spmd_init); 549 550 INFO("SPM Core setup done.\n"); 551 552 /* 553 * Register an interrupt handler routing secure interrupts to SPMD 554 * while the NWd is running. 555 */ 556 flags = 0; 557 set_interrupt_rm_flag(flags, NON_SECURE); 558 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 559 spmd_secure_interrupt_handler, 560 flags); 561 if (rc != 0) { 562 panic(); 563 } 564 565 /* 566 * Permit configurations where the SPM resides at S-EL1/2 and upon a 567 * Group0 interrupt triggering while the normal world runs, the 568 * interrupt is routed either through the EHF or directly to the SPMD: 569 * 570 * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD 571 * for handling by spmd_group0_interrupt_handler_nwd. 572 * 573 * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF. 574 * 575 */ 576 #if (EL3_EXCEPTION_HANDLING == 0) 577 /* 578 * Register an interrupt handler routing Group0 interrupts to SPMD 579 * while the NWd is running. 580 */ 581 rc = register_interrupt_type_handler(INTR_TYPE_EL3, 582 spmd_group0_interrupt_handler_nwd, 583 flags); 584 if (rc != 0) { 585 panic(); 586 } 587 #endif 588 589 return 0; 590 } 591 592 /******************************************************************************* 593 * Initialize context of SPM Core. 594 ******************************************************************************/ 595 int spmd_setup(void) 596 { 597 int rc; 598 void *spmc_manifest; 599 600 /* 601 * If the SPMC is at EL3, then just initialise it directly. The 602 * shenanigans of when it is at a lower EL are not needed. 603 */ 604 if (is_spmc_at_el3()) { 605 /* Allow the SPMC to populate its attributes directly. */ 606 spmc_populate_attrs(&spmc_attrs); 607 608 rc = spmc_setup(); 609 if (rc != 0) { 610 WARN("SPMC initialisation failed 0x%x.\n", rc); 611 } 612 return 0; 613 } 614 615 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 616 if (spmc_ep_info == NULL) { 617 WARN("No SPM Core image provided by BL2 boot loader.\n"); 618 return 0; 619 } 620 621 /* Under no circumstances will this parameter be 0 */ 622 assert(spmc_ep_info->pc != 0ULL); 623 624 /* 625 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 626 * be used as a manifest for the SPM Core at the next lower EL/mode. 627 */ 628 spmc_manifest = (void *)spmc_ep_info->args.arg0; 629 if (spmc_manifest == NULL) { 630 WARN("Invalid or absent SPM Core manifest.\n"); 631 return 0; 632 } 633 634 /* Load manifest, init SPMC */ 635 rc = spmd_spmc_init(spmc_manifest); 636 if (rc != 0) { 637 WARN("Booting device without SPM initialization.\n"); 638 } 639 640 return 0; 641 } 642 643 /******************************************************************************* 644 * Forward FF-A SMCs to the other security state. 645 ******************************************************************************/ 646 uint64_t spmd_smc_switch_state(uint32_t smc_fid, 647 bool secure_origin, 648 uint64_t x1, 649 uint64_t x2, 650 uint64_t x3, 651 uint64_t x4, 652 void *handle) 653 { 654 unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 655 unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 656 657 /* Save incoming security state */ 658 #if SPMD_SPM_AT_SEL2 659 if (secure_state_in == NON_SECURE) { 660 cm_el1_sysregs_context_save(secure_state_in); 661 } 662 cm_el2_sysregs_context_save(secure_state_in); 663 #else 664 cm_el1_sysregs_context_save(secure_state_in); 665 #endif 666 667 /* Restore outgoing security state */ 668 #if SPMD_SPM_AT_SEL2 669 if (secure_state_out == NON_SECURE) { 670 cm_el1_sysregs_context_restore(secure_state_out); 671 } 672 cm_el2_sysregs_context_restore(secure_state_out); 673 #else 674 cm_el1_sysregs_context_restore(secure_state_out); 675 #endif 676 cm_set_next_eret_context(secure_state_out); 677 678 #if SPMD_SPM_AT_SEL2 679 /* 680 * If SPMC is at SEL2, save additional registers x8-x17, which may 681 * be used in FF-A calls such as FFA_PARTITION_INFO_GET_REGS. 682 * Note that technically, all SPMCs can support this, but this code is 683 * under ifdef to minimize breakage in case other SPMCs do not save 684 * and restore x8-x17. 685 * We also need to pass through these registers since not all FF-A ABIs 686 * modify x8-x17, in which case, SMCCC requires that these registers be 687 * preserved, so the SPMD passes through these registers and expects the 688 * SPMC to save and restore (potentially also modify) them. 689 */ 690 SMC_RET18(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 691 SMC_GET_GP(handle, CTX_GPREG_X5), 692 SMC_GET_GP(handle, CTX_GPREG_X6), 693 SMC_GET_GP(handle, CTX_GPREG_X7), 694 SMC_GET_GP(handle, CTX_GPREG_X8), 695 SMC_GET_GP(handle, CTX_GPREG_X9), 696 SMC_GET_GP(handle, CTX_GPREG_X10), 697 SMC_GET_GP(handle, CTX_GPREG_X11), 698 SMC_GET_GP(handle, CTX_GPREG_X12), 699 SMC_GET_GP(handle, CTX_GPREG_X13), 700 SMC_GET_GP(handle, CTX_GPREG_X14), 701 SMC_GET_GP(handle, CTX_GPREG_X15), 702 SMC_GET_GP(handle, CTX_GPREG_X16), 703 SMC_GET_GP(handle, CTX_GPREG_X17) 704 ); 705 706 #else 707 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 708 SMC_GET_GP(handle, CTX_GPREG_X5), 709 SMC_GET_GP(handle, CTX_GPREG_X6), 710 SMC_GET_GP(handle, CTX_GPREG_X7)); 711 #endif 712 } 713 714 /******************************************************************************* 715 * Forward SMCs to the other security state. 716 ******************************************************************************/ 717 static uint64_t spmd_smc_forward(uint32_t smc_fid, 718 bool secure_origin, 719 uint64_t x1, 720 uint64_t x2, 721 uint64_t x3, 722 uint64_t x4, 723 void *cookie, 724 void *handle, 725 uint64_t flags) 726 { 727 if (is_spmc_at_el3() && !secure_origin) { 728 return spmc_smc_handler(smc_fid, secure_origin, x1, x2, x3, x4, 729 cookie, handle, flags); 730 } 731 return spmd_smc_switch_state(smc_fid, secure_origin, x1, x2, x3, x4, 732 handle); 733 734 } 735 736 /******************************************************************************* 737 * Return FFA_ERROR with specified error code 738 ******************************************************************************/ 739 static uint64_t spmd_ffa_error_return(void *handle, int error_code) 740 { 741 SMC_RET8(handle, (uint32_t) FFA_ERROR, 742 FFA_TARGET_INFO_MBZ, (uint32_t)error_code, 743 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 744 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 745 } 746 747 /******************************************************************************* 748 * spmd_check_address_in_binary_image 749 ******************************************************************************/ 750 bool spmd_check_address_in_binary_image(uint64_t address) 751 { 752 assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size)); 753 754 return ((address >= spmc_attrs.load_address) && 755 (address < (spmc_attrs.load_address + spmc_attrs.binary_size))); 756 } 757 758 /****************************************************************************** 759 * spmd_is_spmc_message 760 *****************************************************************************/ 761 static bool spmd_is_spmc_message(unsigned int ep) 762 { 763 if (is_spmc_at_el3()) { 764 return false; 765 } 766 767 return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID) 768 && (ffa_endpoint_source(ep) == spmc_attrs.spmc_id)); 769 } 770 771 /****************************************************************************** 772 * spmd_handle_spmc_message 773 *****************************************************************************/ 774 static int spmd_handle_spmc_message(unsigned long long msg, 775 unsigned long long parm1, unsigned long long parm2, 776 unsigned long long parm3, unsigned long long parm4) 777 { 778 VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__, 779 msg, parm1, parm2, parm3, parm4); 780 781 return -EINVAL; 782 } 783 784 /******************************************************************************* 785 * This function forwards FF-A SMCs to either the main SPMD handler or the 786 * SPMC at EL3, depending on the origin security state, if enabled. 787 ******************************************************************************/ 788 uint64_t spmd_ffa_smc_handler(uint32_t smc_fid, 789 uint64_t x1, 790 uint64_t x2, 791 uint64_t x3, 792 uint64_t x4, 793 void *cookie, 794 void *handle, 795 uint64_t flags) 796 { 797 if (is_spmc_at_el3()) { 798 /* 799 * If we have an SPMC at EL3 allow handling of the SMC first. 800 * The SPMC will call back through to SPMD handler if required. 801 */ 802 if (is_caller_secure(flags)) { 803 return spmc_smc_handler(smc_fid, 804 is_caller_secure(flags), 805 x1, x2, x3, x4, cookie, 806 handle, flags); 807 } 808 } 809 return spmd_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 810 handle, flags); 811 } 812 813 /******************************************************************************* 814 * This function handles all SMCs in the range reserved for FFA. Each call is 815 * either forwarded to the other security state or handled by the SPM dispatcher 816 ******************************************************************************/ 817 uint64_t spmd_smc_handler(uint32_t smc_fid, 818 uint64_t x1, 819 uint64_t x2, 820 uint64_t x3, 821 uint64_t x4, 822 void *cookie, 823 void *handle, 824 uint64_t flags) 825 { 826 unsigned int linear_id = plat_my_core_pos(); 827 spmd_spm_core_context_t *ctx = spmd_get_context(); 828 bool secure_origin; 829 int32_t ret; 830 uint32_t input_version; 831 832 /* Determine which security state this SMC originated from */ 833 secure_origin = is_caller_secure(flags); 834 835 VERBOSE("SPM(%u): 0x%x 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 836 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 "\n", 837 linear_id, smc_fid, x1, x2, x3, x4, 838 SMC_GET_GP(handle, CTX_GPREG_X5), 839 SMC_GET_GP(handle, CTX_GPREG_X6), 840 SMC_GET_GP(handle, CTX_GPREG_X7)); 841 842 switch (smc_fid) { 843 case FFA_ERROR: 844 /* 845 * Check if this is the first invocation of this interface on 846 * this CPU. If so, then indicate that the SPM Core initialised 847 * unsuccessfully. 848 */ 849 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 850 spmd_spm_core_sync_exit(x2); 851 } 852 853 return spmd_smc_forward(smc_fid, secure_origin, 854 x1, x2, x3, x4, cookie, 855 handle, flags); 856 break; /* not reached */ 857 858 case FFA_VERSION: 859 input_version = (uint32_t)(0xFFFFFFFF & x1); 860 /* 861 * If caller is secure and SPMC was initialized, 862 * return FFA_VERSION of SPMD. 863 * If caller is non secure and SPMC was initialized, 864 * forward to the EL3 SPMC if enabled, otherwise return 865 * the SPMC version if implemented at a lower EL. 866 * Sanity check to "input_version". 867 * If the EL3 SPMC is enabled, ignore the SPMC state as 868 * this is not used. 869 */ 870 if ((input_version & FFA_VERSION_BIT31_MASK) || 871 (!is_spmc_at_el3() && (ctx->state == SPMC_STATE_RESET))) { 872 ret = FFA_ERROR_NOT_SUPPORTED; 873 } else if (!secure_origin) { 874 if (is_spmc_at_el3()) { 875 /* 876 * Forward the call directly to the EL3 SPMC, if 877 * enabled, as we don't need to wrap the call in 878 * a direct request. 879 */ 880 return spmd_smc_forward(smc_fid, secure_origin, 881 x1, x2, x3, x4, cookie, 882 handle, flags); 883 } 884 885 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 886 uint64_t rc; 887 888 if (spmc_attrs.major_version == 1 && 889 spmc_attrs.minor_version == 0) { 890 ret = MAKE_FFA_VERSION(spmc_attrs.major_version, 891 spmc_attrs.minor_version); 892 SMC_RET8(handle, (uint32_t)ret, 893 FFA_TARGET_INFO_MBZ, 894 FFA_TARGET_INFO_MBZ, 895 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 896 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 897 FFA_PARAM_MBZ); 898 break; 899 } 900 /* Save non-secure system registers context */ 901 cm_el1_sysregs_context_save(NON_SECURE); 902 #if SPMD_SPM_AT_SEL2 903 cm_el2_sysregs_context_save(NON_SECURE); 904 #endif 905 906 /* 907 * The incoming request has FFA_VERSION as X0 smc_fid 908 * and requested version in x1. Prepare a direct request 909 * from SPMD to SPMC with FFA_VERSION framework function 910 * identifier in X2 and requested version in X3. 911 */ 912 spmd_build_spmc_message(gpregs, 913 SPMD_FWK_MSG_FFA_VERSION_REQ, 914 input_version); 915 916 rc = spmd_spm_core_sync_entry(ctx); 917 918 if ((rc != 0ULL) || 919 (SMC_GET_GP(gpregs, CTX_GPREG_X0) != 920 FFA_MSG_SEND_DIRECT_RESP_SMC32) || 921 (SMC_GET_GP(gpregs, CTX_GPREG_X2) != 922 (FFA_FWK_MSG_BIT | 923 SPMD_FWK_MSG_FFA_VERSION_RESP))) { 924 ERROR("Failed to forward FFA_VERSION\n"); 925 ret = FFA_ERROR_NOT_SUPPORTED; 926 } else { 927 ret = SMC_GET_GP(gpregs, CTX_GPREG_X3); 928 } 929 930 /* 931 * Return here after SPMC has handled FFA_VERSION. 932 * The returned SPMC version is held in X3. 933 * Forward this version in X0 to the non-secure caller. 934 */ 935 return spmd_smc_forward(ret, true, FFA_PARAM_MBZ, 936 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 937 FFA_PARAM_MBZ, cookie, gpregs, 938 flags); 939 } else { 940 ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, 941 FFA_VERSION_MINOR); 942 } 943 944 SMC_RET8(handle, (uint32_t)ret, FFA_TARGET_INFO_MBZ, 945 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 946 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ); 947 break; /* not reached */ 948 949 case FFA_FEATURES: 950 /* 951 * This is an optional interface. Do the minimal checks and 952 * forward to SPM Core which will handle it if implemented. 953 */ 954 955 /* Forward SMC from Normal world to the SPM Core */ 956 if (!secure_origin) { 957 return spmd_smc_forward(smc_fid, secure_origin, 958 x1, x2, x3, x4, cookie, 959 handle, flags); 960 } 961 962 /* 963 * Return success if call was from secure world i.e. all 964 * FFA functions are supported. This is essentially a 965 * nop. 966 */ 967 SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4, 968 SMC_GET_GP(handle, CTX_GPREG_X5), 969 SMC_GET_GP(handle, CTX_GPREG_X6), 970 SMC_GET_GP(handle, CTX_GPREG_X7)); 971 972 break; /* not reached */ 973 974 case FFA_ID_GET: 975 /* 976 * Returns the ID of the calling FFA component. 977 */ 978 if (!secure_origin) { 979 SMC_RET8(handle, FFA_SUCCESS_SMC32, 980 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID, 981 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 982 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 983 FFA_PARAM_MBZ); 984 } 985 986 SMC_RET8(handle, FFA_SUCCESS_SMC32, 987 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 988 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 989 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 990 FFA_PARAM_MBZ); 991 992 break; /* not reached */ 993 994 case FFA_SECONDARY_EP_REGISTER_SMC64: 995 if (secure_origin) { 996 ret = spmd_pm_secondary_ep_register(x1); 997 998 if (ret < 0) { 999 SMC_RET8(handle, FFA_ERROR_SMC64, 1000 FFA_TARGET_INFO_MBZ, ret, 1001 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1002 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1003 FFA_PARAM_MBZ); 1004 } else { 1005 SMC_RET8(handle, FFA_SUCCESS_SMC64, 1006 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, 1007 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1008 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1009 FFA_PARAM_MBZ); 1010 } 1011 } 1012 1013 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1014 break; /* Not reached */ 1015 1016 case FFA_SPM_ID_GET: 1017 if (MAKE_FFA_VERSION(1, 1) > FFA_VERSION_COMPILED) { 1018 return spmd_ffa_error_return(handle, 1019 FFA_ERROR_NOT_SUPPORTED); 1020 } 1021 /* 1022 * Returns the ID of the SPMC or SPMD depending on the FF-A 1023 * instance where this function is invoked 1024 */ 1025 if (!secure_origin) { 1026 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1027 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 1028 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1029 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1030 FFA_PARAM_MBZ); 1031 } 1032 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1033 FFA_TARGET_INFO_MBZ, SPMD_DIRECT_MSG_ENDPOINT_ID, 1034 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1035 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1036 FFA_PARAM_MBZ); 1037 1038 break; /* not reached */ 1039 1040 case FFA_MSG_SEND_DIRECT_REQ_SMC32: 1041 case FFA_MSG_SEND_DIRECT_REQ_SMC64: 1042 if (!secure_origin) { 1043 /* Validate source endpoint is non-secure for non-secure caller. */ 1044 if (ffa_is_secure_world_id(ffa_endpoint_source(x1))) { 1045 return spmd_ffa_error_return(handle, 1046 FFA_ERROR_INVALID_PARAMETER); 1047 } 1048 } 1049 if (secure_origin && spmd_is_spmc_message(x1)) { 1050 ret = spmd_handle_spmc_message(x3, x4, 1051 SMC_GET_GP(handle, CTX_GPREG_X5), 1052 SMC_GET_GP(handle, CTX_GPREG_X6), 1053 SMC_GET_GP(handle, CTX_GPREG_X7)); 1054 1055 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1056 FFA_TARGET_INFO_MBZ, ret, 1057 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1058 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1059 FFA_PARAM_MBZ); 1060 } else { 1061 /* Forward direct message to the other world */ 1062 return spmd_smc_forward(smc_fid, secure_origin, 1063 x1, x2, x3, x4, cookie, 1064 handle, flags); 1065 } 1066 break; /* Not reached */ 1067 1068 case FFA_MSG_SEND_DIRECT_RESP_SMC32: 1069 if (secure_origin && spmd_is_spmc_message(x1)) { 1070 spmd_spm_core_sync_exit(0ULL); 1071 } else { 1072 /* Forward direct message to the other world */ 1073 return spmd_smc_forward(smc_fid, secure_origin, 1074 x1, x2, x3, x4, cookie, 1075 handle, flags); 1076 } 1077 break; /* Not reached */ 1078 1079 case FFA_RX_RELEASE: 1080 case FFA_RXTX_MAP_SMC32: 1081 case FFA_RXTX_MAP_SMC64: 1082 case FFA_RXTX_UNMAP: 1083 case FFA_PARTITION_INFO_GET: 1084 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1085 case FFA_NOTIFICATION_BITMAP_CREATE: 1086 case FFA_NOTIFICATION_BITMAP_DESTROY: 1087 case FFA_NOTIFICATION_BIND: 1088 case FFA_NOTIFICATION_UNBIND: 1089 case FFA_NOTIFICATION_SET: 1090 case FFA_NOTIFICATION_GET: 1091 case FFA_NOTIFICATION_INFO_GET: 1092 case FFA_NOTIFICATION_INFO_GET_SMC64: 1093 case FFA_MSG_SEND2: 1094 case FFA_RX_ACQUIRE: 1095 #endif 1096 case FFA_MSG_RUN: 1097 /* 1098 * Above calls should be invoked only by the Normal world and 1099 * must not be forwarded from Secure world to Normal world. 1100 */ 1101 if (secure_origin) { 1102 return spmd_ffa_error_return(handle, 1103 FFA_ERROR_NOT_SUPPORTED); 1104 } 1105 1106 /* Forward the call to the other world */ 1107 /* fallthrough */ 1108 case FFA_MSG_SEND: 1109 case FFA_MSG_SEND_DIRECT_RESP_SMC64: 1110 case FFA_MEM_DONATE_SMC32: 1111 case FFA_MEM_DONATE_SMC64: 1112 case FFA_MEM_LEND_SMC32: 1113 case FFA_MEM_LEND_SMC64: 1114 case FFA_MEM_SHARE_SMC32: 1115 case FFA_MEM_SHARE_SMC64: 1116 case FFA_MEM_RETRIEVE_REQ_SMC32: 1117 case FFA_MEM_RETRIEVE_REQ_SMC64: 1118 case FFA_MEM_RETRIEVE_RESP: 1119 case FFA_MEM_RELINQUISH: 1120 case FFA_MEM_RECLAIM: 1121 case FFA_MEM_FRAG_TX: 1122 case FFA_MEM_FRAG_RX: 1123 case FFA_SUCCESS_SMC32: 1124 case FFA_SUCCESS_SMC64: 1125 /* 1126 * TODO: Assume that no requests originate from EL3 at the 1127 * moment. This will change if a SP service is required in 1128 * response to secure interrupts targeted to EL3. Until then 1129 * simply forward the call to the Normal world. 1130 */ 1131 1132 return spmd_smc_forward(smc_fid, secure_origin, 1133 x1, x2, x3, x4, cookie, 1134 handle, flags); 1135 break; /* not reached */ 1136 1137 case FFA_MSG_WAIT: 1138 /* 1139 * Check if this is the first invocation of this interface on 1140 * this CPU from the Secure world. If so, then indicate that the 1141 * SPM Core initialised successfully. 1142 */ 1143 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 1144 spmd_spm_core_sync_exit(0ULL); 1145 } 1146 1147 /* Forward the call to the other world */ 1148 /* fallthrough */ 1149 case FFA_INTERRUPT: 1150 case FFA_MSG_YIELD: 1151 /* This interface must be invoked only by the Secure world */ 1152 if (!secure_origin) { 1153 return spmd_ffa_error_return(handle, 1154 FFA_ERROR_NOT_SUPPORTED); 1155 } 1156 1157 return spmd_smc_forward(smc_fid, secure_origin, 1158 x1, x2, x3, x4, cookie, 1159 handle, flags); 1160 break; /* not reached */ 1161 1162 case FFA_NORMAL_WORLD_RESUME: 1163 if (secure_origin && ctx->secure_interrupt_ongoing) { 1164 spmd_spm_core_sync_exit(0ULL); 1165 } else { 1166 return spmd_ffa_error_return(handle, FFA_ERROR_DENIED); 1167 } 1168 break; /* Not reached */ 1169 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1170 case FFA_PARTITION_INFO_GET_REGS_SMC64: 1171 if (secure_origin) { 1172 /* TODO: Future patches to enable support for this */ 1173 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1174 } 1175 1176 /* Call only supported with SMCCC 1.2+ */ 1177 if (MAKE_SMCCC_VERSION(SMCCC_MAJOR_VERSION, SMCCC_MINOR_VERSION) < 0x10002) { 1178 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1179 } 1180 1181 return spmd_smc_forward(smc_fid, secure_origin, 1182 x1, x2, x3, x4, cookie, 1183 handle, flags); 1184 break; /* Not reached */ 1185 #endif 1186 case FFA_EL3_INTR_HANDLE: 1187 if (secure_origin) { 1188 return spmd_handle_group0_intr_swd(handle); 1189 } else { 1190 return spmd_ffa_error_return(handle, FFA_ERROR_DENIED); 1191 } 1192 default: 1193 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 1194 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1195 } 1196 } 1197