1 /* 2 * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch/aarch64/arch_features.h> 15 #include <bl31/bl31.h> 16 #include <bl31/interrupt_mgmt.h> 17 #include <common/debug.h> 18 #include <common/runtime_svc.h> 19 #include <common/tbbr/tbbr_img_def.h> 20 #include <lib/el3_runtime/context_mgmt.h> 21 #include <lib/fconf/fconf.h> 22 #include <lib/fconf/fconf_dyn_cfg_getter.h> 23 #include <lib/smccc.h> 24 #include <lib/spinlock.h> 25 #include <lib/utils.h> 26 #include <lib/xlat_tables/xlat_tables_v2.h> 27 #include <plat/common/common_def.h> 28 #include <plat/common/platform.h> 29 #include <platform_def.h> 30 #include <services/el3_spmd_logical_sp.h> 31 #include <services/ffa_svc.h> 32 #include <services/spmc_svc.h> 33 #include <services/spmd_svc.h> 34 #include <smccc_helpers.h> 35 #include "spmd_private.h" 36 37 /******************************************************************************* 38 * SPM Core context information. 39 ******************************************************************************/ 40 static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 41 42 /******************************************************************************* 43 * SPM Core attribute information is read from its manifest if the SPMC is not 44 * at EL3. Else, it is populated from the SPMC directly. 45 ******************************************************************************/ 46 static spmc_manifest_attribute_t spmc_attrs; 47 48 /******************************************************************************* 49 * SPM Core entry point information. Discovered on the primary core and reused 50 * on secondary cores. 51 ******************************************************************************/ 52 static entry_point_info_t *spmc_ep_info; 53 54 /******************************************************************************* 55 * SPM Core context on CPU based on mpidr. 56 ******************************************************************************/ 57 spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr) 58 { 59 int core_idx = plat_core_pos_by_mpidr(mpidr); 60 61 if (core_idx < 0) { 62 ERROR("Invalid mpidr: %" PRIx64 ", returned ID: %d\n", mpidr, core_idx); 63 panic(); 64 } 65 66 return &spm_core_context[core_idx]; 67 } 68 69 /******************************************************************************* 70 * SPM Core context on current CPU get helper. 71 ******************************************************************************/ 72 spmd_spm_core_context_t *spmd_get_context(void) 73 { 74 return spmd_get_context_by_mpidr(read_mpidr()); 75 } 76 77 /******************************************************************************* 78 * SPM Core ID getter. 79 ******************************************************************************/ 80 uint16_t spmd_spmc_id_get(void) 81 { 82 return spmc_attrs.spmc_id; 83 } 84 85 /******************************************************************************* 86 * Static function declaration. 87 ******************************************************************************/ 88 static int32_t spmd_init(void); 89 static int spmd_spmc_init(void *pm_addr); 90 91 static uint64_t spmd_smc_forward(uint32_t smc_fid, 92 bool secure_origin, 93 uint64_t x1, 94 uint64_t x2, 95 uint64_t x3, 96 uint64_t x4, 97 void *cookie, 98 void *handle, 99 uint64_t flags); 100 101 /****************************************************************************** 102 * Builds an SPMD to SPMC direct message request. 103 *****************************************************************************/ 104 void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target_func, 105 unsigned long long message) 106 { 107 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_MSG_SEND_DIRECT_REQ_SMC32); 108 write_ctx_reg(gpregs, CTX_GPREG_X1, 109 (SPMD_DIRECT_MSG_ENDPOINT_ID << FFA_DIRECT_MSG_SOURCE_SHIFT) | 110 spmd_spmc_id_get()); 111 write_ctx_reg(gpregs, CTX_GPREG_X2, BIT(31) | target_func); 112 write_ctx_reg(gpregs, CTX_GPREG_X3, message); 113 114 /* Zero out x4-x7 for the direct request emitted towards the SPMC. */ 115 write_ctx_reg(gpregs, CTX_GPREG_X4, 0); 116 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 117 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 118 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 119 } 120 121 122 /******************************************************************************* 123 * This function takes an SPMC context pointer and performs a synchronous 124 * SPMC entry. 125 ******************************************************************************/ 126 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 127 { 128 uint64_t rc; 129 130 assert(spmc_ctx != NULL); 131 132 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 133 134 /* Restore the context assigned above */ 135 #if SPMD_SPM_AT_SEL2 136 cm_el2_sysregs_context_restore(SECURE); 137 #else 138 cm_el1_sysregs_context_restore(SECURE); 139 #endif 140 cm_set_next_eret_context(SECURE); 141 142 /* Enter SPMC */ 143 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 144 145 /* Save secure state */ 146 #if SPMD_SPM_AT_SEL2 147 cm_el2_sysregs_context_save(SECURE); 148 #else 149 cm_el1_sysregs_context_save(SECURE); 150 #endif 151 152 return rc; 153 } 154 155 /******************************************************************************* 156 * This function returns to the place where spmd_spm_core_sync_entry() was 157 * called originally. 158 ******************************************************************************/ 159 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 160 { 161 spmd_spm_core_context_t *ctx = spmd_get_context(); 162 163 /* Get current CPU context from SPMC context */ 164 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 165 166 /* 167 * The SPMD must have initiated the original request through a 168 * synchronous entry into SPMC. Jump back to the original C runtime 169 * context with the value of rc in x0; 170 */ 171 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 172 173 panic(); 174 } 175 176 /******************************************************************************* 177 * Jump to the SPM Core for the first time. 178 ******************************************************************************/ 179 static int32_t spmd_init(void) 180 { 181 spmd_spm_core_context_t *ctx = spmd_get_context(); 182 uint64_t rc; 183 184 VERBOSE("SPM Core init start.\n"); 185 186 /* Primary boot core enters the SPMC for initialization. */ 187 ctx->state = SPMC_STATE_ON_PENDING; 188 189 rc = spmd_spm_core_sync_entry(ctx); 190 if (rc != 0ULL) { 191 ERROR("SPMC initialisation failed 0x%" PRIx64 "\n", rc); 192 return 0; 193 } 194 195 ctx->state = SPMC_STATE_ON; 196 197 VERBOSE("SPM Core init end.\n"); 198 199 spmd_logical_sp_set_spmc_initialized(); 200 rc = spmd_logical_sp_init(); 201 if (rc != 0) { 202 WARN("SPMD Logical partitions failed init.\n"); 203 } 204 205 return 1; 206 } 207 208 /******************************************************************************* 209 * spmd_secure_interrupt_handler 210 * Enter the SPMC for further handling of the secure interrupt by the SPMC 211 * itself or a Secure Partition. 212 ******************************************************************************/ 213 static uint64_t spmd_secure_interrupt_handler(uint32_t id, 214 uint32_t flags, 215 void *handle, 216 void *cookie) 217 { 218 spmd_spm_core_context_t *ctx = spmd_get_context(); 219 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 220 unsigned int linear_id = plat_my_core_pos(); 221 int64_t rc; 222 223 /* Sanity check the security state when the exception was generated */ 224 assert(get_interrupt_src_ss(flags) == NON_SECURE); 225 226 /* Sanity check the pointer to this cpu's context */ 227 assert(handle == cm_get_context(NON_SECURE)); 228 229 /* Save the non-secure context before entering SPMC */ 230 cm_el1_sysregs_context_save(NON_SECURE); 231 #if SPMD_SPM_AT_SEL2 232 cm_el2_sysregs_context_save(NON_SECURE); 233 #endif 234 235 /* Convey the event to the SPMC through the FFA_INTERRUPT interface. */ 236 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_INTERRUPT); 237 write_ctx_reg(gpregs, CTX_GPREG_X1, 0); 238 write_ctx_reg(gpregs, CTX_GPREG_X2, 0); 239 write_ctx_reg(gpregs, CTX_GPREG_X3, 0); 240 write_ctx_reg(gpregs, CTX_GPREG_X4, 0); 241 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 242 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 243 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 244 245 /* Mark current core as handling a secure interrupt. */ 246 ctx->secure_interrupt_ongoing = true; 247 248 rc = spmd_spm_core_sync_entry(ctx); 249 if (rc != 0ULL) { 250 ERROR("%s failed (%" PRId64 ") on CPU%u\n", __func__, rc, linear_id); 251 } 252 253 ctx->secure_interrupt_ongoing = false; 254 255 cm_el1_sysregs_context_restore(NON_SECURE); 256 #if SPMD_SPM_AT_SEL2 257 cm_el2_sysregs_context_restore(NON_SECURE); 258 #endif 259 cm_set_next_eret_context(NON_SECURE); 260 261 SMC_RET0(&ctx->cpu_ctx); 262 } 263 264 #if (EL3_EXCEPTION_HANDLING == 0) 265 /******************************************************************************* 266 * spmd_group0_interrupt_handler_nwd 267 * Group0 secure interrupt in the normal world are trapped to EL3. Delegate the 268 * handling of the interrupt to the platform handler, and return only upon 269 * successfully handling the Group0 interrupt. 270 ******************************************************************************/ 271 static uint64_t spmd_group0_interrupt_handler_nwd(uint32_t id, 272 uint32_t flags, 273 void *handle, 274 void *cookie) 275 { 276 uint32_t intid; 277 278 /* Sanity check the security state when the exception was generated. */ 279 assert(get_interrupt_src_ss(flags) == NON_SECURE); 280 281 /* Sanity check the pointer to this cpu's context. */ 282 assert(handle == cm_get_context(NON_SECURE)); 283 284 assert(id == INTR_ID_UNAVAILABLE); 285 286 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 287 288 intid = plat_ic_acknowledge_interrupt(); 289 290 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 291 ERROR("Group0 interrupt %u not handled\n", intid); 292 panic(); 293 } 294 295 /* Deactivate the corresponding Group0 interrupt. */ 296 plat_ic_end_of_interrupt(intid); 297 298 return 0U; 299 } 300 #endif 301 302 /******************************************************************************* 303 * spmd_handle_group0_intr_swd 304 * SPMC delegates handling of Group0 secure interrupt to EL3 firmware using 305 * FFA_EL3_INTR_HANDLE SMC call. Further, SPMD delegates the handling of the 306 * interrupt to the platform handler, and returns only upon successfully 307 * handling the Group0 interrupt. 308 ******************************************************************************/ 309 static uint64_t spmd_handle_group0_intr_swd(void *handle) 310 { 311 uint32_t intid; 312 313 /* Sanity check the pointer to this cpu's context */ 314 assert(handle == cm_get_context(SECURE)); 315 316 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 317 318 intid = plat_ic_acknowledge_interrupt(); 319 320 /* 321 * TODO: Currently due to a limitation in SPMD implementation, the 322 * platform handler is expected to not delegate handling to NWd while 323 * processing Group0 secure interrupt. 324 */ 325 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 326 /* Group0 interrupt was not handled by the platform. */ 327 ERROR("Group0 interrupt %u not handled\n", intid); 328 panic(); 329 } 330 331 /* Deactivate the corresponding Group0 interrupt. */ 332 plat_ic_end_of_interrupt(intid); 333 334 /* Return success. */ 335 SMC_RET8(handle, FFA_SUCCESS_SMC32, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 336 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 337 FFA_PARAM_MBZ); 338 } 339 340 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 341 static int spmd_dynamic_map_mem(uintptr_t base_addr, size_t size, 342 unsigned int attr, uintptr_t *align_addr, 343 size_t *align_size) 344 { 345 uintptr_t base_addr_align; 346 size_t mapped_size_align; 347 int rc; 348 349 /* Page aligned address and size if necessary */ 350 base_addr_align = page_align(base_addr, DOWN); 351 mapped_size_align = page_align(size, UP); 352 353 if ((base_addr != base_addr_align) && 354 (size == mapped_size_align)) { 355 mapped_size_align += PAGE_SIZE; 356 } 357 358 /* 359 * Map dynamically given region with its aligned base address and 360 * size 361 */ 362 rc = mmap_add_dynamic_region((unsigned long long)base_addr_align, 363 base_addr_align, 364 mapped_size_align, 365 attr); 366 if (rc == 0) { 367 *align_addr = base_addr_align; 368 *align_size = mapped_size_align; 369 } 370 371 return rc; 372 } 373 374 static void spmd_do_sec_cpy(uintptr_t root_base_addr, uintptr_t sec_base_addr, 375 size_t size) 376 { 377 uintptr_t root_base_addr_align, sec_base_addr_align; 378 size_t root_mapped_size_align, sec_mapped_size_align; 379 int rc; 380 381 assert(root_base_addr != 0UL); 382 assert(sec_base_addr != 0UL); 383 assert(size != 0UL); 384 385 /* Map the memory with required attributes */ 386 rc = spmd_dynamic_map_mem(root_base_addr, size, MT_RO_DATA | MT_ROOT, 387 &root_base_addr_align, 388 &root_mapped_size_align); 389 if (rc != 0) { 390 ERROR("%s %s %lu (%d)\n", "Error while mapping", "root region", 391 root_base_addr, rc); 392 panic(); 393 } 394 395 rc = spmd_dynamic_map_mem(sec_base_addr, size, MT_RW_DATA | MT_SECURE, 396 &sec_base_addr_align, &sec_mapped_size_align); 397 if (rc != 0) { 398 ERROR("%s %s %lu (%d)\n", "Error while mapping", 399 "secure region", sec_base_addr, rc); 400 panic(); 401 } 402 403 /* Do copy operation */ 404 (void)memcpy((void *)sec_base_addr, (void *)root_base_addr, size); 405 406 /* Unmap root memory region */ 407 rc = mmap_remove_dynamic_region(root_base_addr_align, 408 root_mapped_size_align); 409 if (rc != 0) { 410 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 411 "root region", root_base_addr_align, rc); 412 panic(); 413 } 414 415 /* Unmap secure memory region */ 416 rc = mmap_remove_dynamic_region(sec_base_addr_align, 417 sec_mapped_size_align); 418 if (rc != 0) { 419 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 420 "secure region", sec_base_addr_align, rc); 421 panic(); 422 } 423 } 424 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 425 426 /******************************************************************************* 427 * Loads SPMC manifest and inits SPMC. 428 ******************************************************************************/ 429 static int spmd_spmc_init(void *pm_addr) 430 { 431 cpu_context_t *cpu_ctx; 432 unsigned int core_id; 433 uint32_t ep_attr, flags; 434 int rc; 435 const struct dyn_cfg_dtb_info_t *image_info __unused; 436 437 /* Load the SPM Core manifest */ 438 rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr); 439 if (rc != 0) { 440 WARN("No or invalid SPM Core manifest image provided by BL2\n"); 441 return rc; 442 } 443 444 /* 445 * Ensure that the SPM Core version is compatible with the SPM 446 * Dispatcher version. 447 */ 448 if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) || 449 (spmc_attrs.minor_version > FFA_VERSION_MINOR)) { 450 WARN("Unsupported FFA version (%u.%u)\n", 451 spmc_attrs.major_version, spmc_attrs.minor_version); 452 return -EINVAL; 453 } 454 455 VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version, 456 spmc_attrs.minor_version); 457 458 VERBOSE("SPM Core run time EL%x.\n", 459 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1); 460 461 /* Validate the SPMC ID, Ensure high bit is set */ 462 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) & 463 SPMC_SECURE_ID_MASK) == 0U) { 464 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id); 465 return -EINVAL; 466 } 467 468 /* Validate the SPM Core execution state */ 469 if ((spmc_attrs.exec_state != MODE_RW_64) && 470 (spmc_attrs.exec_state != MODE_RW_32)) { 471 WARN("Unsupported %s%x.\n", "SPM Core execution state 0x", 472 spmc_attrs.exec_state); 473 return -EINVAL; 474 } 475 476 VERBOSE("%s%x.\n", "SPM Core execution state 0x", 477 spmc_attrs.exec_state); 478 479 #if SPMD_SPM_AT_SEL2 480 /* Ensure manifest has not requested AArch32 state in S-EL2 */ 481 if (spmc_attrs.exec_state == MODE_RW_32) { 482 WARN("AArch32 state at S-EL2 is not supported.\n"); 483 return -EINVAL; 484 } 485 486 /* 487 * Check if S-EL2 is supported on this system if S-EL2 488 * is required for SPM 489 */ 490 if (!is_feat_sel2_supported()) { 491 WARN("SPM Core run time S-EL2 is not supported.\n"); 492 return -EINVAL; 493 } 494 #endif /* SPMD_SPM_AT_SEL2 */ 495 496 /* Initialise an entrypoint to set up the CPU context */ 497 ep_attr = SECURE | EP_ST_ENABLE; 498 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) { 499 ep_attr |= EP_EE_BIG; 500 } 501 502 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 503 504 /* 505 * Populate SPSR for SPM Core based upon validated parameters from the 506 * manifest. 507 */ 508 if (spmc_attrs.exec_state == MODE_RW_32) { 509 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 510 SPSR_E_LITTLE, 511 DAIF_FIQ_BIT | 512 DAIF_IRQ_BIT | 513 DAIF_ABT_BIT); 514 } else { 515 516 #if SPMD_SPM_AT_SEL2 517 static const uint32_t runtime_el = MODE_EL2; 518 #else 519 static const uint32_t runtime_el = MODE_EL1; 520 #endif 521 spmc_ep_info->spsr = SPSR_64(runtime_el, 522 MODE_SP_ELX, 523 DISABLE_ALL_EXCEPTIONS); 524 } 525 526 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 527 image_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID); 528 assert(image_info != NULL); 529 530 if ((image_info->config_addr == 0UL) || 531 (image_info->secondary_config_addr == 0UL) || 532 (image_info->config_max_size == 0UL)) { 533 return -EINVAL; 534 } 535 536 /* Copy manifest from root->secure region */ 537 spmd_do_sec_cpy(image_info->config_addr, 538 image_info->secondary_config_addr, 539 image_info->config_max_size); 540 541 /* Update ep info of BL32 */ 542 assert(spmc_ep_info != NULL); 543 spmc_ep_info->args.arg0 = image_info->secondary_config_addr; 544 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 545 546 /* Set an initial SPMC context state for all cores. */ 547 for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) { 548 spm_core_context[core_id].state = SPMC_STATE_OFF; 549 550 /* Setup an initial cpu context for the SPMC. */ 551 cpu_ctx = &spm_core_context[core_id].cpu_ctx; 552 cm_setup_context(cpu_ctx, spmc_ep_info); 553 554 /* 555 * Pass the core linear ID to the SPMC through x4. 556 * (TF-A implementation defined behavior helping 557 * a legacy TOS migration to adopt FF-A). 558 */ 559 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X4, core_id); 560 } 561 562 /* Register power management hooks with PSCI */ 563 psci_register_spd_pm_hook(&spmd_pm); 564 565 /* Register init function for deferred init. */ 566 bl31_register_bl32_init(&spmd_init); 567 568 INFO("SPM Core setup done.\n"); 569 570 /* 571 * Register an interrupt handler routing secure interrupts to SPMD 572 * while the NWd is running. 573 */ 574 flags = 0; 575 set_interrupt_rm_flag(flags, NON_SECURE); 576 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 577 spmd_secure_interrupt_handler, 578 flags); 579 if (rc != 0) { 580 panic(); 581 } 582 583 /* 584 * Permit configurations where the SPM resides at S-EL1/2 and upon a 585 * Group0 interrupt triggering while the normal world runs, the 586 * interrupt is routed either through the EHF or directly to the SPMD: 587 * 588 * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD 589 * for handling by spmd_group0_interrupt_handler_nwd. 590 * 591 * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF. 592 * 593 */ 594 #if (EL3_EXCEPTION_HANDLING == 0) 595 /* 596 * Register an interrupt handler routing Group0 interrupts to SPMD 597 * while the NWd is running. 598 */ 599 rc = register_interrupt_type_handler(INTR_TYPE_EL3, 600 spmd_group0_interrupt_handler_nwd, 601 flags); 602 if (rc != 0) { 603 panic(); 604 } 605 #endif 606 607 return 0; 608 } 609 610 /******************************************************************************* 611 * Initialize context of SPM Core. 612 ******************************************************************************/ 613 int spmd_setup(void) 614 { 615 int rc; 616 void *spmc_manifest; 617 618 /* 619 * If the SPMC is at EL3, then just initialise it directly. The 620 * shenanigans of when it is at a lower EL are not needed. 621 */ 622 if (is_spmc_at_el3()) { 623 /* Allow the SPMC to populate its attributes directly. */ 624 spmc_populate_attrs(&spmc_attrs); 625 626 rc = spmc_setup(); 627 if (rc != 0) { 628 WARN("SPMC initialisation failed 0x%x.\n", rc); 629 } 630 return 0; 631 } 632 633 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 634 if (spmc_ep_info == NULL) { 635 WARN("No SPM Core image provided by BL2 boot loader.\n"); 636 return 0; 637 } 638 639 /* Under no circumstances will this parameter be 0 */ 640 assert(spmc_ep_info->pc != 0ULL); 641 642 /* 643 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 644 * be used as a manifest for the SPM Core at the next lower EL/mode. 645 */ 646 spmc_manifest = (void *)spmc_ep_info->args.arg0; 647 if (spmc_manifest == NULL) { 648 WARN("Invalid or absent SPM Core manifest.\n"); 649 return 0; 650 } 651 652 /* Load manifest, init SPMC */ 653 rc = spmd_spmc_init(spmc_manifest); 654 if (rc != 0) { 655 WARN("Booting device without SPM initialization.\n"); 656 } 657 658 return 0; 659 } 660 661 /******************************************************************************* 662 * Forward FF-A SMCs to the other security state. 663 ******************************************************************************/ 664 uint64_t spmd_smc_switch_state(uint32_t smc_fid, 665 bool secure_origin, 666 uint64_t x1, 667 uint64_t x2, 668 uint64_t x3, 669 uint64_t x4, 670 void *handle, 671 uint64_t flags) 672 { 673 unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 674 unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 675 676 #if SPMD_SPM_AT_SEL2 677 if ((secure_state_out == SECURE) && (is_sve_hint_set(flags) == true)) { 678 /* 679 * Set the SVE hint bit in x0 and pass to the lower secure EL, 680 * if it was set by the caller. 681 */ 682 smc_fid |= (FUNCID_SVE_HINT_MASK << FUNCID_SVE_HINT_SHIFT); 683 } 684 #endif 685 686 /* Save incoming security state */ 687 #if SPMD_SPM_AT_SEL2 688 if (secure_state_in == NON_SECURE) { 689 cm_el1_sysregs_context_save(secure_state_in); 690 } 691 cm_el2_sysregs_context_save(secure_state_in); 692 #else 693 cm_el1_sysregs_context_save(secure_state_in); 694 #endif 695 696 /* Restore outgoing security state */ 697 #if SPMD_SPM_AT_SEL2 698 if (secure_state_out == NON_SECURE) { 699 cm_el1_sysregs_context_restore(secure_state_out); 700 } 701 cm_el2_sysregs_context_restore(secure_state_out); 702 #else 703 cm_el1_sysregs_context_restore(secure_state_out); 704 #endif 705 cm_set_next_eret_context(secure_state_out); 706 707 #if SPMD_SPM_AT_SEL2 708 /* 709 * If SPMC is at SEL2, save additional registers x8-x17, which may 710 * be used in FF-A calls such as FFA_PARTITION_INFO_GET_REGS. 711 * Note that technically, all SPMCs can support this, but this code is 712 * under ifdef to minimize breakage in case other SPMCs do not save 713 * and restore x8-x17. 714 * We also need to pass through these registers since not all FF-A ABIs 715 * modify x8-x17, in which case, SMCCC requires that these registers be 716 * preserved, so the SPMD passes through these registers and expects the 717 * SPMC to save and restore (potentially also modify) them. 718 */ 719 SMC_RET18(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 720 SMC_GET_GP(handle, CTX_GPREG_X5), 721 SMC_GET_GP(handle, CTX_GPREG_X6), 722 SMC_GET_GP(handle, CTX_GPREG_X7), 723 SMC_GET_GP(handle, CTX_GPREG_X8), 724 SMC_GET_GP(handle, CTX_GPREG_X9), 725 SMC_GET_GP(handle, CTX_GPREG_X10), 726 SMC_GET_GP(handle, CTX_GPREG_X11), 727 SMC_GET_GP(handle, CTX_GPREG_X12), 728 SMC_GET_GP(handle, CTX_GPREG_X13), 729 SMC_GET_GP(handle, CTX_GPREG_X14), 730 SMC_GET_GP(handle, CTX_GPREG_X15), 731 SMC_GET_GP(handle, CTX_GPREG_X16), 732 SMC_GET_GP(handle, CTX_GPREG_X17) 733 ); 734 735 #else 736 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 737 SMC_GET_GP(handle, CTX_GPREG_X5), 738 SMC_GET_GP(handle, CTX_GPREG_X6), 739 SMC_GET_GP(handle, CTX_GPREG_X7)); 740 #endif 741 } 742 743 /******************************************************************************* 744 * Forward SMCs to the other security state. 745 ******************************************************************************/ 746 static uint64_t spmd_smc_forward(uint32_t smc_fid, 747 bool secure_origin, 748 uint64_t x1, 749 uint64_t x2, 750 uint64_t x3, 751 uint64_t x4, 752 void *cookie, 753 void *handle, 754 uint64_t flags) 755 { 756 if (is_spmc_at_el3() && !secure_origin) { 757 return spmc_smc_handler(smc_fid, secure_origin, x1, x2, x3, x4, 758 cookie, handle, flags); 759 } 760 761 return spmd_smc_switch_state(smc_fid, secure_origin, x1, x2, x3, x4, 762 handle, flags); 763 764 } 765 766 /******************************************************************************* 767 * Return FFA_ERROR with specified error code 768 ******************************************************************************/ 769 uint64_t spmd_ffa_error_return(void *handle, int error_code) 770 { 771 SMC_RET8(handle, (uint32_t) FFA_ERROR, 772 FFA_TARGET_INFO_MBZ, (uint32_t)error_code, 773 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 774 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 775 } 776 777 /******************************************************************************* 778 * spmd_check_address_in_binary_image 779 ******************************************************************************/ 780 bool spmd_check_address_in_binary_image(uint64_t address) 781 { 782 assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size)); 783 784 return ((address >= spmc_attrs.load_address) && 785 (address < (spmc_attrs.load_address + spmc_attrs.binary_size))); 786 } 787 788 /****************************************************************************** 789 * spmd_is_spmc_message 790 *****************************************************************************/ 791 static bool spmd_is_spmc_message(unsigned int ep) 792 { 793 if (is_spmc_at_el3()) { 794 return false; 795 } 796 797 return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID) 798 && (ffa_endpoint_source(ep) == spmc_attrs.spmc_id)); 799 } 800 801 /****************************************************************************** 802 * spmd_handle_spmc_message 803 *****************************************************************************/ 804 static int spmd_handle_spmc_message(unsigned long long msg, 805 unsigned long long parm1, unsigned long long parm2, 806 unsigned long long parm3, unsigned long long parm4) 807 { 808 VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__, 809 msg, parm1, parm2, parm3, parm4); 810 811 return -EINVAL; 812 } 813 814 /******************************************************************************* 815 * This function forwards FF-A SMCs to either the main SPMD handler or the 816 * SPMC at EL3, depending on the origin security state, if enabled. 817 ******************************************************************************/ 818 uint64_t spmd_ffa_smc_handler(uint32_t smc_fid, 819 uint64_t x1, 820 uint64_t x2, 821 uint64_t x3, 822 uint64_t x4, 823 void *cookie, 824 void *handle, 825 uint64_t flags) 826 { 827 if (is_spmc_at_el3()) { 828 /* 829 * If we have an SPMC at EL3 allow handling of the SMC first. 830 * The SPMC will call back through to SPMD handler if required. 831 */ 832 if (is_caller_secure(flags)) { 833 return spmc_smc_handler(smc_fid, 834 is_caller_secure(flags), 835 x1, x2, x3, x4, cookie, 836 handle, flags); 837 } 838 } 839 return spmd_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 840 handle, flags); 841 } 842 843 /******************************************************************************* 844 * This function handles all SMCs in the range reserved for FFA. Each call is 845 * either forwarded to the other security state or handled by the SPM dispatcher 846 ******************************************************************************/ 847 uint64_t spmd_smc_handler(uint32_t smc_fid, 848 uint64_t x1, 849 uint64_t x2, 850 uint64_t x3, 851 uint64_t x4, 852 void *cookie, 853 void *handle, 854 uint64_t flags) 855 { 856 unsigned int linear_id = plat_my_core_pos(); 857 spmd_spm_core_context_t *ctx = spmd_get_context(); 858 bool secure_origin; 859 int ret; 860 uint32_t input_version; 861 862 /* Determine which security state this SMC originated from */ 863 secure_origin = is_caller_secure(flags); 864 865 VERBOSE("SPM(%u): 0x%x 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 866 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 "\n", 867 linear_id, smc_fid, x1, x2, x3, x4, 868 SMC_GET_GP(handle, CTX_GPREG_X5), 869 SMC_GET_GP(handle, CTX_GPREG_X6), 870 SMC_GET_GP(handle, CTX_GPREG_X7)); 871 872 /* 873 * If there is an on-going info regs from EL3 SPMD LP, unconditionally 874 * return, we don't expect any other FF-A ABIs to be called between 875 * calls to FFA_PARTITION_INFO_GET_REGS. 876 */ 877 if (is_spmd_logical_sp_info_regs_req_in_progress(ctx)) { 878 assert(secure_origin); 879 spmd_spm_core_sync_exit(0ULL); 880 } 881 882 switch (smc_fid) { 883 case FFA_ERROR: 884 /* 885 * Check if this is the first invocation of this interface on 886 * this CPU. If so, then indicate that the SPM Core initialised 887 * unsuccessfully. 888 */ 889 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 890 spmd_spm_core_sync_exit(x2); 891 } 892 893 /* 894 * If there was an SPMD logical partition direct request on-going, 895 * return back to the SPMD logical partition so the error can be 896 * consumed. 897 */ 898 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 899 assert(secure_origin); 900 spmd_spm_core_sync_exit(0ULL); 901 } 902 903 return spmd_smc_forward(smc_fid, secure_origin, 904 x1, x2, x3, x4, cookie, 905 handle, flags); 906 break; /* not reached */ 907 908 case FFA_VERSION: 909 input_version = (uint32_t)(0xFFFFFFFF & x1); 910 /* 911 * If caller is secure and SPMC was initialized, 912 * return FFA_VERSION of SPMD. 913 * If caller is non secure and SPMC was initialized, 914 * forward to the EL3 SPMC if enabled, otherwise return 915 * the SPMC version if implemented at a lower EL. 916 * Sanity check to "input_version". 917 * If the EL3 SPMC is enabled, ignore the SPMC state as 918 * this is not used. 919 */ 920 if ((input_version & FFA_VERSION_BIT31_MASK) || 921 (!is_spmc_at_el3() && (ctx->state == SPMC_STATE_RESET))) { 922 ret = FFA_ERROR_NOT_SUPPORTED; 923 } else if (!secure_origin) { 924 if (is_spmc_at_el3()) { 925 /* 926 * Forward the call directly to the EL3 SPMC, if 927 * enabled, as we don't need to wrap the call in 928 * a direct request. 929 */ 930 return spmd_smc_forward(smc_fid, secure_origin, 931 x1, x2, x3, x4, cookie, 932 handle, flags); 933 } 934 935 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 936 uint64_t rc; 937 938 if (spmc_attrs.major_version == 1 && 939 spmc_attrs.minor_version == 0) { 940 ret = MAKE_FFA_VERSION(spmc_attrs.major_version, 941 spmc_attrs.minor_version); 942 SMC_RET8(handle, (uint32_t)ret, 943 FFA_TARGET_INFO_MBZ, 944 FFA_TARGET_INFO_MBZ, 945 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 946 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 947 FFA_PARAM_MBZ); 948 break; 949 } 950 /* Save non-secure system registers context */ 951 cm_el1_sysregs_context_save(NON_SECURE); 952 #if SPMD_SPM_AT_SEL2 953 cm_el2_sysregs_context_save(NON_SECURE); 954 #endif 955 956 /* 957 * The incoming request has FFA_VERSION as X0 smc_fid 958 * and requested version in x1. Prepare a direct request 959 * from SPMD to SPMC with FFA_VERSION framework function 960 * identifier in X2 and requested version in X3. 961 */ 962 spmd_build_spmc_message(gpregs, 963 SPMD_FWK_MSG_FFA_VERSION_REQ, 964 input_version); 965 966 /* 967 * Ensure x8-x17 NS GP register values are untouched when returning 968 * from the SPMC. 969 */ 970 write_ctx_reg(gpregs, CTX_GPREG_X8, SMC_GET_GP(handle, CTX_GPREG_X8)); 971 write_ctx_reg(gpregs, CTX_GPREG_X9, SMC_GET_GP(handle, CTX_GPREG_X9)); 972 write_ctx_reg(gpregs, CTX_GPREG_X10, SMC_GET_GP(handle, CTX_GPREG_X10)); 973 write_ctx_reg(gpregs, CTX_GPREG_X11, SMC_GET_GP(handle, CTX_GPREG_X11)); 974 write_ctx_reg(gpregs, CTX_GPREG_X12, SMC_GET_GP(handle, CTX_GPREG_X12)); 975 write_ctx_reg(gpregs, CTX_GPREG_X13, SMC_GET_GP(handle, CTX_GPREG_X13)); 976 write_ctx_reg(gpregs, CTX_GPREG_X14, SMC_GET_GP(handle, CTX_GPREG_X14)); 977 write_ctx_reg(gpregs, CTX_GPREG_X15, SMC_GET_GP(handle, CTX_GPREG_X15)); 978 write_ctx_reg(gpregs, CTX_GPREG_X16, SMC_GET_GP(handle, CTX_GPREG_X16)); 979 write_ctx_reg(gpregs, CTX_GPREG_X17, SMC_GET_GP(handle, CTX_GPREG_X17)); 980 981 rc = spmd_spm_core_sync_entry(ctx); 982 983 if ((rc != 0ULL) || 984 (SMC_GET_GP(gpregs, CTX_GPREG_X0) != 985 FFA_MSG_SEND_DIRECT_RESP_SMC32) || 986 (SMC_GET_GP(gpregs, CTX_GPREG_X2) != 987 (FFA_FWK_MSG_BIT | 988 SPMD_FWK_MSG_FFA_VERSION_RESP))) { 989 ERROR("Failed to forward FFA_VERSION\n"); 990 ret = FFA_ERROR_NOT_SUPPORTED; 991 } else { 992 ret = SMC_GET_GP(gpregs, CTX_GPREG_X3); 993 } 994 995 /* 996 * x0-x4 are updated by spmd_smc_forward below. 997 * Zero out x5-x7 in the FFA_VERSION response. 998 */ 999 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 1000 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 1001 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 1002 1003 /* 1004 * Return here after SPMC has handled FFA_VERSION. 1005 * The returned SPMC version is held in X3. 1006 * Forward this version in X0 to the non-secure caller. 1007 */ 1008 return spmd_smc_forward(ret, true, FFA_PARAM_MBZ, 1009 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1010 FFA_PARAM_MBZ, cookie, gpregs, 1011 flags); 1012 } else { 1013 ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, 1014 FFA_VERSION_MINOR); 1015 } 1016 1017 SMC_RET8(handle, (uint32_t)ret, FFA_TARGET_INFO_MBZ, 1018 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1019 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ); 1020 break; /* not reached */ 1021 1022 case FFA_FEATURES: 1023 /* 1024 * This is an optional interface. Do the minimal checks and 1025 * forward to SPM Core which will handle it if implemented. 1026 */ 1027 1028 /* Forward SMC from Normal world to the SPM Core */ 1029 if (!secure_origin) { 1030 return spmd_smc_forward(smc_fid, secure_origin, 1031 x1, x2, x3, x4, cookie, 1032 handle, flags); 1033 } 1034 1035 /* 1036 * Return success if call was from secure world i.e. all 1037 * FFA functions are supported. This is essentially a 1038 * nop. 1039 */ 1040 SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4, 1041 SMC_GET_GP(handle, CTX_GPREG_X5), 1042 SMC_GET_GP(handle, CTX_GPREG_X6), 1043 SMC_GET_GP(handle, CTX_GPREG_X7)); 1044 1045 break; /* not reached */ 1046 1047 case FFA_ID_GET: 1048 /* 1049 * Returns the ID of the calling FFA component. 1050 */ 1051 if (!secure_origin) { 1052 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1053 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID, 1054 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1055 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1056 FFA_PARAM_MBZ); 1057 } 1058 1059 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1060 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 1061 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1062 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1063 FFA_PARAM_MBZ); 1064 1065 break; /* not reached */ 1066 1067 case FFA_SECONDARY_EP_REGISTER_SMC64: 1068 if (secure_origin) { 1069 ret = spmd_pm_secondary_ep_register(x1); 1070 1071 if (ret < 0) { 1072 SMC_RET8(handle, FFA_ERROR_SMC64, 1073 FFA_TARGET_INFO_MBZ, ret, 1074 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1075 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1076 FFA_PARAM_MBZ); 1077 } else { 1078 SMC_RET8(handle, FFA_SUCCESS_SMC64, 1079 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, 1080 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1081 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1082 FFA_PARAM_MBZ); 1083 } 1084 } 1085 1086 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1087 break; /* Not reached */ 1088 1089 case FFA_SPM_ID_GET: 1090 if (MAKE_FFA_VERSION(1, 1) > FFA_VERSION_COMPILED) { 1091 return spmd_ffa_error_return(handle, 1092 FFA_ERROR_NOT_SUPPORTED); 1093 } 1094 /* 1095 * Returns the ID of the SPMC or SPMD depending on the FF-A 1096 * instance where this function is invoked 1097 */ 1098 if (!secure_origin) { 1099 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1100 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 1101 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1102 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1103 FFA_PARAM_MBZ); 1104 } 1105 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1106 FFA_TARGET_INFO_MBZ, SPMD_DIRECT_MSG_ENDPOINT_ID, 1107 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1108 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1109 FFA_PARAM_MBZ); 1110 1111 break; /* not reached */ 1112 1113 case FFA_MSG_SEND_DIRECT_REQ_SMC32: 1114 case FFA_MSG_SEND_DIRECT_REQ_SMC64: 1115 /* 1116 * Regardless of secure_origin, SPMD logical partitions cannot 1117 * handle direct messages. They can only initiate direct 1118 * messages and consume direct responses or errors. 1119 */ 1120 if (is_spmd_lp_id(ffa_endpoint_source(x1)) || 1121 is_spmd_lp_id(ffa_endpoint_destination(x1))) { 1122 return spmd_ffa_error_return(handle, 1123 FFA_ERROR_INVALID_PARAMETER 1124 ); 1125 } 1126 1127 /* 1128 * When there is an ongoing SPMD logical partition direct 1129 * request, there cannot be another direct request. Return 1130 * error in this case. Panic'ing is an option but that does 1131 * not provide the opportunity for caller to abort based on 1132 * error codes. 1133 */ 1134 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1135 assert(secure_origin); 1136 return spmd_ffa_error_return(handle, 1137 FFA_ERROR_DENIED); 1138 } 1139 1140 if (!secure_origin) { 1141 /* Validate source endpoint is non-secure for non-secure caller. */ 1142 if (ffa_is_secure_world_id(ffa_endpoint_source(x1))) { 1143 return spmd_ffa_error_return(handle, 1144 FFA_ERROR_INVALID_PARAMETER); 1145 } 1146 } 1147 if (secure_origin && spmd_is_spmc_message(x1)) { 1148 ret = spmd_handle_spmc_message(x3, x4, 1149 SMC_GET_GP(handle, CTX_GPREG_X5), 1150 SMC_GET_GP(handle, CTX_GPREG_X6), 1151 SMC_GET_GP(handle, CTX_GPREG_X7)); 1152 1153 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1154 FFA_TARGET_INFO_MBZ, ret, 1155 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1156 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1157 FFA_PARAM_MBZ); 1158 } else { 1159 /* Forward direct message to the other world */ 1160 return spmd_smc_forward(smc_fid, secure_origin, 1161 x1, x2, x3, x4, cookie, 1162 handle, flags); 1163 } 1164 break; /* Not reached */ 1165 1166 case FFA_MSG_SEND_DIRECT_REQ2_SMC64: 1167 if (!secure_origin) { 1168 /* Validate source endpoint is non-secure for non-secure caller. */ 1169 if (ffa_is_secure_world_id(ffa_endpoint_source(x1))) { 1170 return spmd_ffa_error_return(handle, 1171 FFA_ERROR_INVALID_PARAMETER); 1172 } 1173 } 1174 /* FFA_MSG_SEND_DIRECT_REQ2 not used for framework messages. */ 1175 if (secure_origin && spmd_is_spmc_message(x1)) { 1176 return spmd_ffa_error_return(handle, FFA_ERROR_INVALID_PARAMETER); 1177 } else { 1178 /* Forward direct message to the other world */ 1179 return spmd_smc_forward(smc_fid, secure_origin, 1180 x1, x2, x3, x4, cookie, 1181 handle, flags); 1182 } 1183 break; /* Not reached */ 1184 1185 case FFA_MSG_SEND_DIRECT_RESP_SMC32: 1186 case FFA_MSG_SEND_DIRECT_RESP_SMC64: 1187 if (secure_origin && (spmd_is_spmc_message(x1) || 1188 is_spmd_logical_sp_dir_req_in_progress(ctx))) { 1189 spmd_spm_core_sync_exit(0ULL); 1190 } else { 1191 /* Forward direct message to the other world */ 1192 return spmd_smc_forward(smc_fid, secure_origin, 1193 x1, x2, x3, x4, cookie, 1194 handle, flags); 1195 } 1196 break; /* Not reached */ 1197 case FFA_MSG_SEND_DIRECT_RESP2_SMC64: 1198 /* Forward direct message to the other world */ 1199 return spmd_smc_forward(smc_fid, secure_origin, 1200 x1, x2, x3, x4, cookie, 1201 handle, flags); 1202 break; /* Not reached */ 1203 case FFA_RX_RELEASE: 1204 case FFA_RXTX_MAP_SMC32: 1205 case FFA_RXTX_MAP_SMC64: 1206 case FFA_RXTX_UNMAP: 1207 case FFA_PARTITION_INFO_GET: 1208 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1209 case FFA_NOTIFICATION_BITMAP_CREATE: 1210 case FFA_NOTIFICATION_BITMAP_DESTROY: 1211 case FFA_NOTIFICATION_BIND: 1212 case FFA_NOTIFICATION_UNBIND: 1213 case FFA_NOTIFICATION_SET: 1214 case FFA_NOTIFICATION_GET: 1215 case FFA_NOTIFICATION_INFO_GET: 1216 case FFA_NOTIFICATION_INFO_GET_SMC64: 1217 case FFA_MSG_SEND2: 1218 case FFA_RX_ACQUIRE: 1219 #endif 1220 case FFA_MSG_RUN: 1221 /* 1222 * Above calls should be invoked only by the Normal world and 1223 * must not be forwarded from Secure world to Normal world. 1224 */ 1225 if (secure_origin) { 1226 return spmd_ffa_error_return(handle, 1227 FFA_ERROR_NOT_SUPPORTED); 1228 } 1229 1230 /* Forward the call to the other world */ 1231 /* fallthrough */ 1232 case FFA_MSG_SEND: 1233 case FFA_MEM_DONATE_SMC32: 1234 case FFA_MEM_DONATE_SMC64: 1235 case FFA_MEM_LEND_SMC32: 1236 case FFA_MEM_LEND_SMC64: 1237 case FFA_MEM_SHARE_SMC32: 1238 case FFA_MEM_SHARE_SMC64: 1239 case FFA_MEM_RETRIEVE_REQ_SMC32: 1240 case FFA_MEM_RETRIEVE_REQ_SMC64: 1241 case FFA_MEM_RETRIEVE_RESP: 1242 case FFA_MEM_RELINQUISH: 1243 case FFA_MEM_RECLAIM: 1244 case FFA_MEM_FRAG_TX: 1245 case FFA_MEM_FRAG_RX: 1246 case FFA_SUCCESS_SMC32: 1247 case FFA_SUCCESS_SMC64: 1248 /* 1249 * If there is an ongoing direct request from an SPMD logical 1250 * partition, return an error. 1251 */ 1252 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1253 assert(secure_origin); 1254 return spmd_ffa_error_return(handle, 1255 FFA_ERROR_DENIED); 1256 } 1257 1258 return spmd_smc_forward(smc_fid, secure_origin, 1259 x1, x2, x3, x4, cookie, 1260 handle, flags); 1261 break; /* not reached */ 1262 1263 case FFA_MSG_WAIT: 1264 /* 1265 * Check if this is the first invocation of this interface on 1266 * this CPU from the Secure world. If so, then indicate that the 1267 * SPM Core initialised successfully. 1268 */ 1269 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 1270 spmd_spm_core_sync_exit(0ULL); 1271 } 1272 1273 /* Forward the call to the other world */ 1274 /* fallthrough */ 1275 case FFA_INTERRUPT: 1276 case FFA_MSG_YIELD: 1277 /* This interface must be invoked only by the Secure world */ 1278 if (!secure_origin) { 1279 return spmd_ffa_error_return(handle, 1280 FFA_ERROR_NOT_SUPPORTED); 1281 } 1282 1283 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1284 assert(secure_origin); 1285 return spmd_ffa_error_return(handle, 1286 FFA_ERROR_DENIED); 1287 } 1288 1289 return spmd_smc_forward(smc_fid, secure_origin, 1290 x1, x2, x3, x4, cookie, 1291 handle, flags); 1292 break; /* not reached */ 1293 1294 case FFA_NORMAL_WORLD_RESUME: 1295 if (secure_origin && ctx->secure_interrupt_ongoing) { 1296 spmd_spm_core_sync_exit(0ULL); 1297 } else { 1298 return spmd_ffa_error_return(handle, FFA_ERROR_DENIED); 1299 } 1300 break; /* Not reached */ 1301 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1302 case FFA_PARTITION_INFO_GET_REGS_SMC64: 1303 if (secure_origin) { 1304 return spmd_el3_populate_logical_partition_info(handle, x1, 1305 x2, x3); 1306 } 1307 1308 /* Call only supported with SMCCC 1.2+ */ 1309 if (MAKE_SMCCC_VERSION(SMCCC_MAJOR_VERSION, SMCCC_MINOR_VERSION) < 0x10002) { 1310 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1311 } 1312 1313 return spmd_smc_forward(smc_fid, secure_origin, 1314 x1, x2, x3, x4, cookie, 1315 handle, flags); 1316 break; /* Not reached */ 1317 #endif 1318 case FFA_CONSOLE_LOG_SMC32: 1319 case FFA_CONSOLE_LOG_SMC64: 1320 /* This interface must not be forwarded to other worlds. */ 1321 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1322 break; /* not reached */ 1323 1324 case FFA_EL3_INTR_HANDLE: 1325 if (secure_origin) { 1326 return spmd_handle_group0_intr_swd(handle); 1327 } else { 1328 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1329 } 1330 default: 1331 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 1332 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1333 } 1334 } 1335