1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <string.h> 10 11 #include <arch_helpers.h> 12 #include <bl31/bl31.h> 13 #include <common/debug.h> 14 #include <common/runtime_svc.h> 15 #include <lib/el3_runtime/context_mgmt.h> 16 #include <lib/smccc.h> 17 #include <lib/spinlock.h> 18 #include <lib/utils.h> 19 #include <lib/xlat_tables/xlat_tables_v2.h> 20 #include <plat/common/common_def.h> 21 #include <plat/common/platform.h> 22 #include <platform_def.h> 23 #include <services/spci_svc.h> 24 #include <services/spmd_svc.h> 25 #include <smccc_helpers.h> 26 #include "spmd_private.h" 27 28 /******************************************************************************* 29 * SPM Core context information. 30 ******************************************************************************/ 31 spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 32 33 /******************************************************************************* 34 * SPM Core attribute information read from its manifest. 35 ******************************************************************************/ 36 static spmc_manifest_sect_attribute_t spmc_attrs; 37 38 /******************************************************************************* 39 * SPM Core entry point information. Discovered on the primary core and reused 40 * on secondary cores. 41 ******************************************************************************/ 42 static entry_point_info_t *spmc_ep_info; 43 44 /******************************************************************************* 45 * Static function declaration. 46 ******************************************************************************/ 47 static int32_t spmd_init(void); 48 static int spmd_spmc_init(void *rd_base, size_t rd_size); 49 static uint64_t spmd_spci_error_return(void *handle, int error_code); 50 static uint64_t spmd_smc_forward(uint32_t smc_fid, bool secure_origin, 51 uint64_t x1, uint64_t x2, uint64_t x3, 52 uint64_t x4, void *handle); 53 54 /******************************************************************************* 55 * This function takes an SP context pointer and performs a synchronous entry 56 * into it. 57 ******************************************************************************/ 58 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 59 { 60 uint64_t rc; 61 62 assert(spmc_ctx != NULL); 63 64 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 65 66 /* Restore the context assigned above */ 67 cm_el1_sysregs_context_restore(SECURE); 68 #if SPMD_SPM_AT_SEL2 69 cm_el2_sysregs_context_restore(SECURE); 70 #endif 71 cm_set_next_eret_context(SECURE); 72 73 /* Enter SPMC */ 74 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 75 76 /* Save secure state */ 77 cm_el1_sysregs_context_save(SECURE); 78 #if SPMD_SPM_AT_SEL2 79 cm_el2_sysregs_context_save(SECURE); 80 #endif 81 82 return rc; 83 } 84 85 /******************************************************************************* 86 * This function returns to the place where spm_sp_synchronous_entry() was 87 * called originally. 88 ******************************************************************************/ 89 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 90 { 91 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 92 93 /* Get context of the SP in use by this CPU. */ 94 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 95 96 /* 97 * The SPMD must have initiated the original request through a 98 * synchronous entry into SPMC. Jump back to the original C runtime 99 * context with the value of rc in x0; 100 */ 101 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 102 103 panic(); 104 } 105 106 /******************************************************************************* 107 * Jump to the SPM core for the first time. 108 ******************************************************************************/ 109 static int32_t spmd_init(void) 110 { 111 uint64_t rc = 0; 112 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 113 114 INFO("SPM Core init start.\n"); 115 ctx->state = SPMC_STATE_RESET; 116 117 rc = spmd_spm_core_sync_entry(ctx); 118 if (rc) { 119 ERROR("SPMC initialisation failed 0x%llx\n", rc); 120 panic(); 121 } 122 123 ctx->state = SPMC_STATE_IDLE; 124 INFO("SPM Core init end.\n"); 125 126 return 1; 127 } 128 129 /******************************************************************************* 130 * Load SPMC manifest, init SPMC. 131 ******************************************************************************/ 132 static int spmd_spmc_init(void *rd_base, size_t rd_size) 133 { 134 int rc; 135 uint32_t ep_attr; 136 unsigned int linear_id = plat_my_core_pos(); 137 spmd_spm_core_context_t *spm_ctx = &spm_core_context[linear_id]; 138 139 /* Load the SPM core manifest */ 140 rc = plat_spm_core_manifest_load(&spmc_attrs, rd_base, rd_size); 141 if (rc != 0) { 142 WARN("No or invalid SPM core manifest image provided by BL2 " 143 "boot loader. "); 144 return 1; 145 } 146 147 /* 148 * Ensure that the SPM core version is compatible with the SPM 149 * dispatcher version 150 */ 151 if ((spmc_attrs.major_version != SPCI_VERSION_MAJOR) || 152 (spmc_attrs.minor_version > SPCI_VERSION_MINOR)) { 153 WARN("Unsupported SPCI version (%x.%x) specified in SPM core " 154 "manifest image provided by BL2 boot loader.\n", 155 spmc_attrs.major_version, spmc_attrs.minor_version); 156 return 1; 157 } 158 159 INFO("SPCI version (%x.%x).\n", spmc_attrs.major_version, 160 spmc_attrs.minor_version); 161 162 INFO("SPM core run time EL%x.\n", 163 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1); 164 165 /* Validate the SPMC ID, Ensure high bit is set */ 166 if (!(spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) & 167 SPMC_SECURE_ID_MASK) { 168 WARN("Invalid ID (0x%x) for SPMC.\n", 169 spmc_attrs.spmc_id); 170 return 1; 171 } 172 173 INFO("SPMC ID %x.\n", spmc_attrs.spmc_id); 174 175 /* Validate the SPM core execution state */ 176 if ((spmc_attrs.exec_state != MODE_RW_64) && 177 (spmc_attrs.exec_state != MODE_RW_32)) { 178 WARN("Unsupported SPM core execution state %x specified in " 179 "manifest image provided by BL2 boot loader.\n", 180 spmc_attrs.exec_state); 181 return 1; 182 } 183 184 INFO("SPM core execution state %x.\n", spmc_attrs.exec_state); 185 186 #if SPMD_SPM_AT_SEL2 187 /* Ensure manifest has not requested AArch32 state in S-EL2 */ 188 if (spmc_attrs.exec_state == MODE_RW_32) { 189 WARN("AArch32 state at S-EL2 is not supported.\n"); 190 return 1; 191 } 192 193 /* 194 * Check if S-EL2 is supported on this system if S-EL2 195 * is required for SPM 196 */ 197 uint64_t sel2 = read_id_aa64pfr0_el1(); 198 199 sel2 >>= ID_AA64PFR0_SEL2_SHIFT; 200 sel2 &= ID_AA64PFR0_SEL2_MASK; 201 202 if (!sel2) { 203 WARN("SPM core run time S-EL2 is not supported."); 204 return 1; 205 } 206 #endif /* SPMD_SPM_AT_SEL2 */ 207 208 /* Initialise an entrypoint to set up the CPU context */ 209 ep_attr = SECURE | EP_ST_ENABLE; 210 if (read_sctlr_el3() & SCTLR_EE_BIT) { 211 ep_attr |= EP_EE_BIG; 212 } 213 214 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 215 assert(spmc_ep_info->pc == BL32_BASE); 216 217 /* 218 * Populate SPSR for SPM core based upon validated parameters from the 219 * manifest 220 */ 221 if (spmc_attrs.exec_state == MODE_RW_32) { 222 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 223 SPSR_E_LITTLE, 224 DAIF_FIQ_BIT | 225 DAIF_IRQ_BIT | 226 DAIF_ABT_BIT); 227 } else { 228 229 #if SPMD_SPM_AT_SEL2 230 static const uint32_t runtime_el = MODE_EL2; 231 #else 232 static const uint32_t runtime_el = MODE_EL1; 233 #endif 234 spmc_ep_info->spsr = SPSR_64(runtime_el, 235 MODE_SP_ELX, 236 DISABLE_ALL_EXCEPTIONS); 237 } 238 239 /* Initialise SPM core context with this entry point information */ 240 cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info); 241 242 /* Reuse PSCI affinity states to mark this SPMC context as off */ 243 spm_ctx->state = AFF_STATE_OFF; 244 245 INFO("SPM core setup done.\n"); 246 247 /* Register init function for deferred init. */ 248 bl31_register_bl32_init(&spmd_init); 249 250 return 0; 251 } 252 253 /******************************************************************************* 254 * Initialize context of SPM core. 255 ******************************************************************************/ 256 int spmd_setup(void) 257 { 258 int rc; 259 void *rd_base; 260 size_t rd_size; 261 uintptr_t rd_base_align; 262 uintptr_t rd_size_align; 263 264 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 265 if (!spmc_ep_info) { 266 WARN("No SPM core image provided by BL2 boot loader, Booting " 267 "device without SP initialization. SMC`s destined for SPM " 268 "core will return SMC_UNK\n"); 269 return 1; 270 } 271 272 /* Under no circumstances will this parameter be 0 */ 273 assert(spmc_ep_info->pc != 0U); 274 275 /* 276 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 277 * be used as a manifest for the SPM core at the next lower EL/mode. 278 */ 279 if (spmc_ep_info->args.arg0 == 0U || spmc_ep_info->args.arg2 == 0U) { 280 ERROR("Invalid or absent SPM core manifest\n"); 281 panic(); 282 } 283 284 /* Obtain whereabouts of SPM core manifest */ 285 rd_base = (void *) spmc_ep_info->args.arg0; 286 rd_size = spmc_ep_info->args.arg2; 287 288 rd_base_align = page_align((uintptr_t) rd_base, DOWN); 289 rd_size_align = page_align((uintptr_t) rd_size, UP); 290 291 /* Map the manifest in the SPMD translation regime first */ 292 VERBOSE("SPM core manifest base : 0x%lx\n", rd_base_align); 293 VERBOSE("SPM core manifest size : 0x%lx\n", rd_size_align); 294 rc = mmap_add_dynamic_region((unsigned long long) rd_base_align, 295 (uintptr_t) rd_base_align, 296 rd_size_align, 297 MT_RO_DATA); 298 if (rc != 0) { 299 ERROR("Error while mapping SPM core manifest (%d).\n", rc); 300 panic(); 301 } 302 303 /* Load manifest, init SPMC */ 304 rc = spmd_spmc_init(rd_base, rd_size); 305 if (rc != 0) { 306 int mmap_rc; 307 308 WARN("Booting device without SPM initialization. " 309 "SPCI SMCs destined for SPM core will return " 310 "ENOTSUPPORTED\n"); 311 312 mmap_rc = mmap_remove_dynamic_region(rd_base_align, 313 rd_size_align); 314 if (mmap_rc != 0) { 315 ERROR("Error while unmapping SPM core manifest (%d).\n", 316 mmap_rc); 317 panic(); 318 } 319 320 return rc; 321 } 322 323 return 0; 324 } 325 326 /******************************************************************************* 327 * Forward SMC to the other security state 328 ******************************************************************************/ 329 static uint64_t spmd_smc_forward(uint32_t smc_fid, bool secure_origin, 330 uint64_t x1, uint64_t x2, uint64_t x3, 331 uint64_t x4, void *handle) 332 { 333 uint32_t secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 334 uint32_t secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 335 336 /* Save incoming security state */ 337 cm_el1_sysregs_context_save(secure_state_in); 338 #if SPMD_SPM_AT_SEL2 339 cm_el2_sysregs_context_save(secure_state_in); 340 #endif 341 342 /* Restore outgoing security state */ 343 cm_el1_sysregs_context_restore(secure_state_out); 344 #if SPMD_SPM_AT_SEL2 345 cm_el2_sysregs_context_restore(secure_state_out); 346 #endif 347 cm_set_next_eret_context(secure_state_out); 348 349 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4, 350 SMC_GET_GP(handle, CTX_GPREG_X5), 351 SMC_GET_GP(handle, CTX_GPREG_X6), 352 SMC_GET_GP(handle, CTX_GPREG_X7)); 353 } 354 355 /******************************************************************************* 356 * Return SPCI_ERROR with specified error code 357 ******************************************************************************/ 358 static uint64_t spmd_spci_error_return(void *handle, int error_code) 359 { 360 SMC_RET8(handle, SPCI_ERROR, 361 SPCI_TARGET_INFO_MBZ, error_code, 362 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 363 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ); 364 } 365 366 /******************************************************************************* 367 * This function handles all SMCs in the range reserved for SPCI. Each call is 368 * either forwarded to the other security state or handled by the SPM dispatcher 369 ******************************************************************************/ 370 uint64_t spmd_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 371 uint64_t x3, uint64_t x4, void *cookie, void *handle, 372 uint64_t flags) 373 { 374 spmd_spm_core_context_t *ctx = &spm_core_context[plat_my_core_pos()]; 375 bool secure_origin; 376 int32_t ret; 377 378 /* Determine which security state this SMC originated from */ 379 secure_origin = is_caller_secure(flags); 380 381 INFO("SPM: 0x%x, 0x%llx, 0x%llx, 0x%llx, 0x%llx, " 382 "0x%llx, 0x%llx, 0x%llx\n", 383 smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5), 384 SMC_GET_GP(handle, CTX_GPREG_X6), 385 SMC_GET_GP(handle, CTX_GPREG_X7)); 386 387 switch (smc_fid) { 388 case SPCI_ERROR: 389 /* 390 * Check if this is the first invocation of this interface on 391 * this CPU. If so, then indicate that the SPM core initialised 392 * unsuccessfully. 393 */ 394 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) { 395 spmd_spm_core_sync_exit(x2); 396 } 397 398 return spmd_smc_forward(smc_fid, secure_origin, 399 x1, x2, x3, x4, handle); 400 break; /* not reached */ 401 402 case SPCI_VERSION: 403 /* 404 * TODO: This is an optimization that the version information 405 * provided by the SPM core manifest is returned by the SPM 406 * dispatcher. It might be a better idea to simply forward this 407 * call to the SPM core and wash our hands completely. 408 */ 409 ret = MAKE_SPCI_VERSION(spmc_attrs.major_version, 410 spmc_attrs.minor_version); 411 SMC_RET8(handle, SPCI_SUCCESS_SMC32, SPCI_TARGET_INFO_MBZ, ret, 412 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 413 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ); 414 break; /* not reached */ 415 416 case SPCI_FEATURES: 417 /* 418 * This is an optional interface. Do the minimal checks and 419 * forward to SPM core which will handle it if implemented. 420 */ 421 422 /* 423 * Check if x1 holds a valid SPCI fid. This is an 424 * optimization. 425 */ 426 if (!is_spci_fid(x1)) { 427 return spmd_spci_error_return(handle, 428 SPCI_ERROR_NOT_SUPPORTED); 429 } 430 431 /* Forward SMC from Normal world to the SPM core */ 432 if (!secure_origin) { 433 return spmd_smc_forward(smc_fid, secure_origin, 434 x1, x2, x3, x4, handle); 435 } else { 436 /* 437 * Return success if call was from secure world i.e. all 438 * SPCI functions are supported. This is essentially a 439 * nop. 440 */ 441 SMC_RET8(handle, SPCI_SUCCESS_SMC32, x1, x2, x3, x4, 442 SMC_GET_GP(handle, CTX_GPREG_X5), 443 SMC_GET_GP(handle, CTX_GPREG_X6), 444 SMC_GET_GP(handle, CTX_GPREG_X7)); 445 } 446 447 break; /* not reached */ 448 449 case SPCI_ID_GET: 450 /* 451 * Returns the ID of the calling SPCI component. 452 */ 453 if (!secure_origin) { 454 SMC_RET8(handle, SPCI_SUCCESS_SMC32, 455 SPCI_TARGET_INFO_MBZ, SPCI_NS_ENDPOINT_ID, 456 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 457 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 458 SPCI_PARAM_MBZ); 459 } else { 460 SMC_RET8(handle, SPCI_SUCCESS_SMC32, 461 SPCI_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 462 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 463 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, 464 SPCI_PARAM_MBZ); 465 } 466 467 break; /* not reached */ 468 469 case SPCI_RX_RELEASE: 470 case SPCI_RXTX_MAP_SMC32: 471 case SPCI_RXTX_MAP_SMC64: 472 case SPCI_RXTX_UNMAP: 473 case SPCI_MSG_RUN: 474 /* This interface must be invoked only by the Normal world */ 475 if (secure_origin) { 476 return spmd_spci_error_return(handle, 477 SPCI_ERROR_NOT_SUPPORTED); 478 } 479 480 /* Fall through to forward the call to the other world */ 481 482 case SPCI_PARTITION_INFO_GET: 483 case SPCI_MSG_SEND: 484 case SPCI_MSG_SEND_DIRECT_REQ_SMC32: 485 case SPCI_MSG_SEND_DIRECT_REQ_SMC64: 486 case SPCI_MSG_SEND_DIRECT_RESP_SMC32: 487 case SPCI_MSG_SEND_DIRECT_RESP_SMC64: 488 case SPCI_MEM_DONATE_SMC32: 489 case SPCI_MEM_DONATE_SMC64: 490 case SPCI_MEM_LEND_SMC32: 491 case SPCI_MEM_LEND_SMC64: 492 case SPCI_MEM_SHARE_SMC32: 493 case SPCI_MEM_SHARE_SMC64: 494 case SPCI_MEM_RETRIEVE_REQ_SMC32: 495 case SPCI_MEM_RETRIEVE_REQ_SMC64: 496 case SPCI_MEM_RETRIEVE_RESP: 497 case SPCI_MEM_RELINQUISH: 498 case SPCI_MEM_RECLAIM: 499 case SPCI_SUCCESS_SMC32: 500 case SPCI_SUCCESS_SMC64: 501 /* 502 * TODO: Assume that no requests originate from EL3 at the 503 * moment. This will change if a SP service is required in 504 * response to secure interrupts targeted to EL3. Until then 505 * simply forward the call to the Normal world. 506 */ 507 508 return spmd_smc_forward(smc_fid, secure_origin, 509 x1, x2, x3, x4, handle); 510 break; /* not reached */ 511 512 case SPCI_MSG_WAIT: 513 /* 514 * Check if this is the first invocation of this interface on 515 * this CPU from the Secure world. If so, then indicate that the 516 * SPM core initialised successfully. 517 */ 518 if (secure_origin && (ctx->state == SPMC_STATE_RESET)) { 519 spmd_spm_core_sync_exit(0); 520 } 521 522 /* Fall through to forward the call to the other world */ 523 524 case SPCI_MSG_YIELD: 525 /* This interface must be invoked only by the Secure world */ 526 if (!secure_origin) { 527 return spmd_spci_error_return(handle, 528 SPCI_ERROR_NOT_SUPPORTED); 529 } 530 531 return spmd_smc_forward(smc_fid, secure_origin, 532 x1, x2, x3, x4, handle); 533 break; /* not reached */ 534 535 default: 536 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 537 return spmd_spci_error_return(handle, SPCI_ERROR_NOT_SUPPORTED); 538 } 539 } 540