1 /* 2 * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch/aarch64/arch_features.h> 15 #include <bl31/bl31.h> 16 #include <bl31/interrupt_mgmt.h> 17 #include <common/debug.h> 18 #include <common/runtime_svc.h> 19 #include <common/tbbr/tbbr_img_def.h> 20 #include <lib/el3_runtime/context_mgmt.h> 21 #include <lib/fconf/fconf.h> 22 #include <lib/fconf/fconf_dyn_cfg_getter.h> 23 #include <lib/smccc.h> 24 #include <lib/spinlock.h> 25 #include <lib/utils.h> 26 #include <lib/xlat_tables/xlat_tables_v2.h> 27 #include <plat/common/common_def.h> 28 #include <plat/common/platform.h> 29 #include <platform_def.h> 30 #include <services/el3_spmd_logical_sp.h> 31 #include <services/ffa_svc.h> 32 #include <services/spmc_svc.h> 33 #include <services/spmd_svc.h> 34 #include <smccc_helpers.h> 35 #include "spmd_private.h" 36 37 /******************************************************************************* 38 * SPM Core context information. 39 ******************************************************************************/ 40 static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT]; 41 42 /******************************************************************************* 43 * SPM Core attribute information is read from its manifest if the SPMC is not 44 * at EL3. Else, it is populated from the SPMC directly. 45 ******************************************************************************/ 46 static spmc_manifest_attribute_t spmc_attrs; 47 48 /******************************************************************************* 49 * SPM Core entry point information. Discovered on the primary core and reused 50 * on secondary cores. 51 ******************************************************************************/ 52 static entry_point_info_t *spmc_ep_info; 53 54 /******************************************************************************* 55 * SPM Core context on current CPU get helper. 56 ******************************************************************************/ 57 spmd_spm_core_context_t *spmd_get_context(void) 58 { 59 return &spm_core_context[plat_my_core_pos()]; 60 } 61 62 /******************************************************************************* 63 * SPM Core ID getter. 64 ******************************************************************************/ 65 uint16_t spmd_spmc_id_get(void) 66 { 67 return spmc_attrs.spmc_id; 68 } 69 70 /******************************************************************************* 71 * Static function declaration. 72 ******************************************************************************/ 73 static int32_t spmd_init(void); 74 static int spmd_spmc_init(void *pm_addr); 75 76 static uint64_t spmd_smc_forward(uint32_t smc_fid, 77 bool secure_origin, 78 uint64_t x1, 79 uint64_t x2, 80 uint64_t x3, 81 uint64_t x4, 82 void *cookie, 83 void *handle, 84 uint64_t flags); 85 86 /****************************************************************************** 87 * Builds an SPMD to SPMC direct message request. 88 *****************************************************************************/ 89 void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target_func, 90 unsigned long long message) 91 { 92 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_MSG_SEND_DIRECT_REQ_SMC32); 93 write_ctx_reg(gpregs, CTX_GPREG_X1, 94 (SPMD_DIRECT_MSG_ENDPOINT_ID << FFA_DIRECT_MSG_SOURCE_SHIFT) | 95 spmd_spmc_id_get()); 96 write_ctx_reg(gpregs, CTX_GPREG_X2, BIT(31) | target_func); 97 write_ctx_reg(gpregs, CTX_GPREG_X3, message); 98 99 /* Zero out x4-x7 for the direct request emitted towards the SPMC. */ 100 write_ctx_reg(gpregs, CTX_GPREG_X4, 0); 101 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 102 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 103 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 104 } 105 106 107 /******************************************************************************* 108 * This function takes an SPMC context pointer and performs a synchronous 109 * SPMC entry. 110 ******************************************************************************/ 111 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx) 112 { 113 uint64_t rc; 114 115 assert(spmc_ctx != NULL); 116 117 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE); 118 119 /* Restore the context assigned above */ 120 #if SPMD_SPM_AT_SEL2 121 cm_el2_sysregs_context_restore(SECURE); 122 #else 123 cm_el1_sysregs_context_restore(SECURE); 124 #endif 125 cm_set_next_eret_context(SECURE); 126 127 /* Enter SPMC */ 128 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx); 129 130 /* Save secure state */ 131 #if SPMD_SPM_AT_SEL2 132 cm_el2_sysregs_context_save(SECURE); 133 #else 134 cm_el1_sysregs_context_save(SECURE); 135 #endif 136 137 return rc; 138 } 139 140 /******************************************************************************* 141 * This function returns to the place where spmd_spm_core_sync_entry() was 142 * called originally. 143 ******************************************************************************/ 144 __dead2 void spmd_spm_core_sync_exit(uint64_t rc) 145 { 146 spmd_spm_core_context_t *ctx = spmd_get_context(); 147 148 /* Get current CPU context from SPMC context */ 149 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx)); 150 151 /* 152 * The SPMD must have initiated the original request through a 153 * synchronous entry into SPMC. Jump back to the original C runtime 154 * context with the value of rc in x0; 155 */ 156 spmd_spm_core_exit(ctx->c_rt_ctx, rc); 157 158 panic(); 159 } 160 161 /******************************************************************************* 162 * Jump to the SPM Core for the first time. 163 ******************************************************************************/ 164 static int32_t spmd_init(void) 165 { 166 spmd_spm_core_context_t *ctx = spmd_get_context(); 167 uint64_t rc; 168 169 VERBOSE("SPM Core init start.\n"); 170 171 /* Primary boot core enters the SPMC for initialization. */ 172 ctx->state = SPMC_STATE_ON_PENDING; 173 174 rc = spmd_spm_core_sync_entry(ctx); 175 if (rc != 0ULL) { 176 ERROR("SPMC initialisation failed 0x%" PRIx64 "\n", rc); 177 return 0; 178 } 179 180 ctx->state = SPMC_STATE_ON; 181 182 VERBOSE("SPM Core init end.\n"); 183 184 spmd_logical_sp_set_spmc_initialized(); 185 rc = spmd_logical_sp_init(); 186 if (rc != 0) { 187 WARN("SPMD Logical partitions failed init.\n"); 188 } 189 190 return 1; 191 } 192 193 /******************************************************************************* 194 * spmd_secure_interrupt_handler 195 * Enter the SPMC for further handling of the secure interrupt by the SPMC 196 * itself or a Secure Partition. 197 ******************************************************************************/ 198 static uint64_t spmd_secure_interrupt_handler(uint32_t id, 199 uint32_t flags, 200 void *handle, 201 void *cookie) 202 { 203 spmd_spm_core_context_t *ctx = spmd_get_context(); 204 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 205 unsigned int linear_id = plat_my_core_pos(); 206 int64_t rc; 207 208 /* Sanity check the security state when the exception was generated */ 209 assert(get_interrupt_src_ss(flags) == NON_SECURE); 210 211 /* Sanity check the pointer to this cpu's context */ 212 assert(handle == cm_get_context(NON_SECURE)); 213 214 /* Save the non-secure context before entering SPMC */ 215 #if SPMD_SPM_AT_SEL2 216 cm_el2_sysregs_context_save(NON_SECURE); 217 #else 218 cm_el1_sysregs_context_save(NON_SECURE); 219 #endif 220 221 /* Convey the event to the SPMC through the FFA_INTERRUPT interface. */ 222 write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_INTERRUPT); 223 write_ctx_reg(gpregs, CTX_GPREG_X1, 0); 224 write_ctx_reg(gpregs, CTX_GPREG_X2, 0); 225 write_ctx_reg(gpregs, CTX_GPREG_X3, 0); 226 write_ctx_reg(gpregs, CTX_GPREG_X4, 0); 227 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 228 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 229 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 230 231 /* Mark current core as handling a secure interrupt. */ 232 ctx->secure_interrupt_ongoing = true; 233 234 rc = spmd_spm_core_sync_entry(ctx); 235 if (rc != 0ULL) { 236 ERROR("%s failed (%" PRId64 ") on CPU%u\n", __func__, rc, linear_id); 237 } 238 239 ctx->secure_interrupt_ongoing = false; 240 241 #if SPMD_SPM_AT_SEL2 242 cm_el2_sysregs_context_restore(NON_SECURE); 243 #else 244 cm_el1_sysregs_context_restore(NON_SECURE); 245 #endif 246 cm_set_next_eret_context(NON_SECURE); 247 248 SMC_RET0(&ctx->cpu_ctx); 249 } 250 251 #if (EL3_EXCEPTION_HANDLING == 0) 252 /******************************************************************************* 253 * spmd_group0_interrupt_handler_nwd 254 * Group0 secure interrupt in the normal world are trapped to EL3. Delegate the 255 * handling of the interrupt to the platform handler, and return only upon 256 * successfully handling the Group0 interrupt. 257 ******************************************************************************/ 258 static uint64_t spmd_group0_interrupt_handler_nwd(uint32_t id, 259 uint32_t flags, 260 void *handle, 261 void *cookie) 262 { 263 uint32_t intid; 264 265 /* Sanity check the security state when the exception was generated. */ 266 assert(get_interrupt_src_ss(flags) == NON_SECURE); 267 268 /* Sanity check the pointer to this cpu's context. */ 269 assert(handle == cm_get_context(NON_SECURE)); 270 271 assert(id == INTR_ID_UNAVAILABLE); 272 273 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 274 275 intid = plat_ic_acknowledge_interrupt(); 276 277 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 278 ERROR("Group0 interrupt %u not handled\n", intid); 279 panic(); 280 } 281 282 /* Deactivate the corresponding Group0 interrupt. */ 283 plat_ic_end_of_interrupt(intid); 284 285 return 0U; 286 } 287 #endif 288 289 /******************************************************************************* 290 * spmd_handle_group0_intr_swd 291 * SPMC delegates handling of Group0 secure interrupt to EL3 firmware using 292 * FFA_EL3_INTR_HANDLE SMC call. Further, SPMD delegates the handling of the 293 * interrupt to the platform handler, and returns only upon successfully 294 * handling the Group0 interrupt. 295 ******************************************************************************/ 296 static uint64_t spmd_handle_group0_intr_swd(void *handle) 297 { 298 uint32_t intid; 299 300 /* Sanity check the pointer to this cpu's context */ 301 assert(handle == cm_get_context(SECURE)); 302 303 assert(plat_ic_get_pending_interrupt_type() == INTR_TYPE_EL3); 304 305 intid = plat_ic_acknowledge_interrupt(); 306 307 /* 308 * TODO: Currently due to a limitation in SPMD implementation, the 309 * platform handler is expected to not delegate handling to NWd while 310 * processing Group0 secure interrupt. 311 */ 312 if (plat_spmd_handle_group0_interrupt(intid) < 0) { 313 /* Group0 interrupt was not handled by the platform. */ 314 ERROR("Group0 interrupt %u not handled\n", intid); 315 panic(); 316 } 317 318 /* Deactivate the corresponding Group0 interrupt. */ 319 plat_ic_end_of_interrupt(intid); 320 321 /* Return success. */ 322 SMC_RET8(handle, FFA_SUCCESS_SMC32, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 323 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 324 FFA_PARAM_MBZ); 325 } 326 327 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 328 static int spmd_dynamic_map_mem(uintptr_t base_addr, size_t size, 329 unsigned int attr, uintptr_t *align_addr, 330 size_t *align_size) 331 { 332 uintptr_t base_addr_align; 333 size_t mapped_size_align; 334 int rc; 335 336 /* Page aligned address and size if necessary */ 337 base_addr_align = page_align(base_addr, DOWN); 338 mapped_size_align = page_align(size, UP); 339 340 if ((base_addr != base_addr_align) && 341 (size == mapped_size_align)) { 342 mapped_size_align += PAGE_SIZE; 343 } 344 345 /* 346 * Map dynamically given region with its aligned base address and 347 * size 348 */ 349 rc = mmap_add_dynamic_region((unsigned long long)base_addr_align, 350 base_addr_align, 351 mapped_size_align, 352 attr); 353 if (rc == 0) { 354 *align_addr = base_addr_align; 355 *align_size = mapped_size_align; 356 } 357 358 return rc; 359 } 360 361 static void spmd_do_sec_cpy(uintptr_t root_base_addr, uintptr_t sec_base_addr, 362 size_t size) 363 { 364 uintptr_t root_base_addr_align, sec_base_addr_align; 365 size_t root_mapped_size_align, sec_mapped_size_align; 366 int rc; 367 368 assert(root_base_addr != 0UL); 369 assert(sec_base_addr != 0UL); 370 assert(size != 0UL); 371 372 /* Map the memory with required attributes */ 373 rc = spmd_dynamic_map_mem(root_base_addr, size, MT_RO_DATA | MT_ROOT, 374 &root_base_addr_align, 375 &root_mapped_size_align); 376 if (rc != 0) { 377 ERROR("%s %s %lu (%d)\n", "Error while mapping", "root region", 378 root_base_addr, rc); 379 panic(); 380 } 381 382 rc = spmd_dynamic_map_mem(sec_base_addr, size, MT_RW_DATA | MT_SECURE, 383 &sec_base_addr_align, &sec_mapped_size_align); 384 if (rc != 0) { 385 ERROR("%s %s %lu (%d)\n", "Error while mapping", 386 "secure region", sec_base_addr, rc); 387 panic(); 388 } 389 390 /* Do copy operation */ 391 (void)memcpy((void *)sec_base_addr, (void *)root_base_addr, size); 392 393 /* Unmap root memory region */ 394 rc = mmap_remove_dynamic_region(root_base_addr_align, 395 root_mapped_size_align); 396 if (rc != 0) { 397 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 398 "root region", root_base_addr_align, rc); 399 panic(); 400 } 401 402 /* Unmap secure memory region */ 403 rc = mmap_remove_dynamic_region(sec_base_addr_align, 404 sec_mapped_size_align); 405 if (rc != 0) { 406 ERROR("%s %s %lu (%d)\n", "Error while unmapping", 407 "secure region", sec_base_addr_align, rc); 408 panic(); 409 } 410 } 411 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 412 413 /******************************************************************************* 414 * Loads SPMC manifest and inits SPMC. 415 ******************************************************************************/ 416 static int spmd_spmc_init(void *pm_addr) 417 { 418 cpu_context_t *cpu_ctx; 419 unsigned int core_id; 420 uint32_t ep_attr, flags; 421 int rc; 422 const struct dyn_cfg_dtb_info_t *image_info __unused; 423 424 /* Load the SPM Core manifest */ 425 rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr); 426 if (rc != 0) { 427 WARN("No or invalid SPM Core manifest image provided by BL2\n"); 428 return rc; 429 } 430 431 /* 432 * Ensure that the SPM Core version is compatible with the SPM 433 * Dispatcher version. 434 */ 435 if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) || 436 (spmc_attrs.minor_version > FFA_VERSION_MINOR)) { 437 WARN("Unsupported FFA version (%u.%u)\n", 438 spmc_attrs.major_version, spmc_attrs.minor_version); 439 return -EINVAL; 440 } 441 442 VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version, 443 spmc_attrs.minor_version); 444 445 VERBOSE("SPM Core run time EL%x.\n", 446 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1); 447 448 /* Validate the SPMC ID, Ensure high bit is set */ 449 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) & 450 SPMC_SECURE_ID_MASK) == 0U) { 451 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id); 452 return -EINVAL; 453 } 454 455 /* Validate the SPM Core execution state */ 456 if ((spmc_attrs.exec_state != MODE_RW_64) && 457 (spmc_attrs.exec_state != MODE_RW_32)) { 458 WARN("Unsupported %s%x.\n", "SPM Core execution state 0x", 459 spmc_attrs.exec_state); 460 return -EINVAL; 461 } 462 463 VERBOSE("%s%x.\n", "SPM Core execution state 0x", 464 spmc_attrs.exec_state); 465 466 #if SPMD_SPM_AT_SEL2 467 /* Ensure manifest has not requested AArch32 state in S-EL2 */ 468 if (spmc_attrs.exec_state == MODE_RW_32) { 469 WARN("AArch32 state at S-EL2 is not supported.\n"); 470 return -EINVAL; 471 } 472 473 /* 474 * Check if S-EL2 is supported on this system if S-EL2 475 * is required for SPM 476 */ 477 if (!is_feat_sel2_supported()) { 478 WARN("SPM Core run time S-EL2 is not supported.\n"); 479 return -EINVAL; 480 } 481 #endif /* SPMD_SPM_AT_SEL2 */ 482 483 /* Initialise an entrypoint to set up the CPU context */ 484 ep_attr = SECURE | EP_ST_ENABLE; 485 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) { 486 ep_attr |= EP_EE_BIG; 487 } 488 489 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr); 490 491 /* 492 * Populate SPSR for SPM Core based upon validated parameters from the 493 * manifest. 494 */ 495 if (spmc_attrs.exec_state == MODE_RW_32) { 496 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 497 SPSR_E_LITTLE, 498 DAIF_FIQ_BIT | 499 DAIF_IRQ_BIT | 500 DAIF_ABT_BIT); 501 } else { 502 503 #if SPMD_SPM_AT_SEL2 504 static const uint32_t runtime_el = MODE_EL2; 505 #else 506 static const uint32_t runtime_el = MODE_EL1; 507 #endif 508 spmc_ep_info->spsr = SPSR_64(runtime_el, 509 MODE_SP_ELX, 510 DISABLE_ALL_EXCEPTIONS); 511 } 512 513 #if ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 514 image_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, TOS_FW_CONFIG_ID); 515 assert(image_info != NULL); 516 517 if ((image_info->config_addr == 0UL) || 518 (image_info->secondary_config_addr == 0UL) || 519 (image_info->config_max_size == 0UL)) { 520 return -EINVAL; 521 } 522 523 /* Copy manifest from root->secure region */ 524 spmd_do_sec_cpy(image_info->config_addr, 525 image_info->secondary_config_addr, 526 image_info->config_max_size); 527 528 /* Update ep info of BL32 */ 529 assert(spmc_ep_info != NULL); 530 spmc_ep_info->args.arg0 = image_info->secondary_config_addr; 531 #endif /* ENABLE_RME && SPMD_SPM_AT_SEL2 && !RESET_TO_BL31 */ 532 533 /* Set an initial SPMC context state for all cores. */ 534 for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) { 535 spm_core_context[core_id].state = SPMC_STATE_OFF; 536 537 /* Setup an initial cpu context for the SPMC. */ 538 cpu_ctx = &spm_core_context[core_id].cpu_ctx; 539 cm_setup_context(cpu_ctx, spmc_ep_info); 540 541 /* 542 * Pass the core linear ID to the SPMC through x4. 543 * (TF-A implementation defined behavior helping 544 * a legacy TOS migration to adopt FF-A). 545 */ 546 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X4, core_id); 547 } 548 549 /* Register power management hooks with PSCI */ 550 psci_register_spd_pm_hook(&spmd_pm); 551 552 /* Register init function for deferred init. */ 553 bl31_register_bl32_init(&spmd_init); 554 555 INFO("SPM Core setup done.\n"); 556 557 /* 558 * Register an interrupt handler routing secure interrupts to SPMD 559 * while the NWd is running. 560 */ 561 flags = 0; 562 set_interrupt_rm_flag(flags, NON_SECURE); 563 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 564 spmd_secure_interrupt_handler, 565 flags); 566 if (rc != 0) { 567 panic(); 568 } 569 570 /* 571 * Permit configurations where the SPM resides at S-EL1/2 and upon a 572 * Group0 interrupt triggering while the normal world runs, the 573 * interrupt is routed either through the EHF or directly to the SPMD: 574 * 575 * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD 576 * for handling by spmd_group0_interrupt_handler_nwd. 577 * 578 * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF. 579 * 580 */ 581 #if (EL3_EXCEPTION_HANDLING == 0) 582 /* 583 * If EL3 interrupts are supported by the platform, register an 584 * interrupt handler routing Group0 interrupts to SPMD while the NWd is 585 * running. 586 */ 587 if (plat_ic_has_interrupt_type(INTR_TYPE_EL3)) { 588 rc = register_interrupt_type_handler(INTR_TYPE_EL3, 589 spmd_group0_interrupt_handler_nwd, 590 flags); 591 if (rc != 0) { 592 panic(); 593 } 594 } 595 #endif 596 597 return 0; 598 } 599 600 /******************************************************************************* 601 * Initialize context of SPM Core. 602 ******************************************************************************/ 603 int spmd_setup(void) 604 { 605 int rc; 606 void *spmc_manifest; 607 608 /* 609 * If the SPMC is at EL3, then just initialise it directly. The 610 * shenanigans of when it is at a lower EL are not needed. 611 */ 612 if (is_spmc_at_el3()) { 613 /* Allow the SPMC to populate its attributes directly. */ 614 spmc_populate_attrs(&spmc_attrs); 615 616 rc = spmc_setup(); 617 if (rc != 0) { 618 WARN("SPMC initialisation failed 0x%x.\n", rc); 619 } 620 return 0; 621 } 622 623 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 624 if (spmc_ep_info == NULL) { 625 WARN("No SPM Core image provided by BL2 boot loader.\n"); 626 return 0; 627 } 628 629 /* Under no circumstances will this parameter be 0 */ 630 assert(spmc_ep_info->pc != 0ULL); 631 632 /* 633 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will 634 * be used as a manifest for the SPM Core at the next lower EL/mode. 635 */ 636 spmc_manifest = (void *)spmc_ep_info->args.arg0; 637 if (spmc_manifest == NULL) { 638 WARN("Invalid or absent SPM Core manifest.\n"); 639 return 0; 640 } 641 642 /* Load manifest, init SPMC */ 643 rc = spmd_spmc_init(spmc_manifest); 644 if (rc != 0) { 645 WARN("Booting device without SPM initialization.\n"); 646 } 647 648 return 0; 649 } 650 651 /******************************************************************************* 652 * Forward FF-A SMCs to the other security state. 653 ******************************************************************************/ 654 uint64_t spmd_smc_switch_state(uint32_t smc_fid, 655 bool secure_origin, 656 uint64_t x1, 657 uint64_t x2, 658 uint64_t x3, 659 uint64_t x4, 660 void *handle, 661 uint64_t flags) 662 { 663 unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE; 664 unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE; 665 void *ctx_out; 666 667 #if SPMD_SPM_AT_SEL2 668 if ((secure_state_out == SECURE) && (is_sve_hint_set(flags) == true)) { 669 /* 670 * Set the SVE hint bit in x0 and pass to the lower secure EL, 671 * if it was set by the caller. 672 */ 673 smc_fid |= (FUNCID_SVE_HINT_MASK << FUNCID_SVE_HINT_SHIFT); 674 } 675 #endif 676 677 /* Save incoming security state */ 678 #if SPMD_SPM_AT_SEL2 679 cm_el2_sysregs_context_save(secure_state_in); 680 #else 681 cm_el1_sysregs_context_save(secure_state_in); 682 #endif 683 684 /* Restore outgoing security state */ 685 #if SPMD_SPM_AT_SEL2 686 cm_el2_sysregs_context_restore(secure_state_out); 687 #else 688 cm_el1_sysregs_context_restore(secure_state_out); 689 #endif 690 cm_set_next_eret_context(secure_state_out); 691 692 ctx_out = cm_get_context(secure_state_out); 693 #if SPMD_SPM_AT_SEL2 694 /* 695 * If SPMC is at SEL2, save additional registers x8-x17, which may 696 * be used in FF-A calls such as FFA_PARTITION_INFO_GET_REGS. 697 * Note that technically, all SPMCs can support this, but this code is 698 * under ifdef to minimize breakage in case other SPMCs do not save 699 * and restore x8-x17. 700 * We also need to pass through these registers since not all FF-A ABIs 701 * modify x8-x17, in which case, SMCCC requires that these registers be 702 * preserved, so the SPMD passes through these registers and expects the 703 * SPMC to save and restore (potentially also modify) them. 704 */ 705 SMC_RET18(ctx_out, smc_fid, x1, x2, x3, x4, 706 SMC_GET_GP(handle, CTX_GPREG_X5), 707 SMC_GET_GP(handle, CTX_GPREG_X6), 708 SMC_GET_GP(handle, CTX_GPREG_X7), 709 SMC_GET_GP(handle, CTX_GPREG_X8), 710 SMC_GET_GP(handle, CTX_GPREG_X9), 711 SMC_GET_GP(handle, CTX_GPREG_X10), 712 SMC_GET_GP(handle, CTX_GPREG_X11), 713 SMC_GET_GP(handle, CTX_GPREG_X12), 714 SMC_GET_GP(handle, CTX_GPREG_X13), 715 SMC_GET_GP(handle, CTX_GPREG_X14), 716 SMC_GET_GP(handle, CTX_GPREG_X15), 717 SMC_GET_GP(handle, CTX_GPREG_X16), 718 SMC_GET_GP(handle, CTX_GPREG_X17) 719 ); 720 721 #else 722 SMC_RET8(ctx_out, smc_fid, x1, x2, x3, x4, 723 SMC_GET_GP(handle, CTX_GPREG_X5), 724 SMC_GET_GP(handle, CTX_GPREG_X6), 725 SMC_GET_GP(handle, CTX_GPREG_X7)); 726 #endif 727 } 728 729 /******************************************************************************* 730 * Forward SMCs to the other security state. 731 ******************************************************************************/ 732 static uint64_t spmd_smc_forward(uint32_t smc_fid, 733 bool secure_origin, 734 uint64_t x1, 735 uint64_t x2, 736 uint64_t x3, 737 uint64_t x4, 738 void *cookie, 739 void *handle, 740 uint64_t flags) 741 { 742 if (is_spmc_at_el3() && !secure_origin) { 743 return spmc_smc_handler(smc_fid, secure_origin, x1, x2, x3, x4, 744 cookie, handle, flags); 745 } 746 747 return spmd_smc_switch_state(smc_fid, secure_origin, x1, x2, x3, x4, 748 handle, flags); 749 750 } 751 752 /******************************************************************************* 753 * Return FFA_ERROR with specified error code 754 ******************************************************************************/ 755 uint64_t spmd_ffa_error_return(void *handle, int error_code) 756 { 757 SMC_RET8(handle, (uint32_t) FFA_ERROR, 758 FFA_TARGET_INFO_MBZ, (uint32_t)error_code, 759 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 760 FFA_PARAM_MBZ, FFA_PARAM_MBZ); 761 } 762 763 /******************************************************************************* 764 * spmd_check_address_in_binary_image 765 ******************************************************************************/ 766 bool spmd_check_address_in_binary_image(uint64_t address) 767 { 768 assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size)); 769 770 return ((address >= spmc_attrs.load_address) && 771 (address < (spmc_attrs.load_address + spmc_attrs.binary_size))); 772 } 773 774 /****************************************************************************** 775 * spmd_is_spmc_message 776 *****************************************************************************/ 777 static bool spmd_is_spmc_message(unsigned int ep) 778 { 779 if (is_spmc_at_el3()) { 780 return false; 781 } 782 783 return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID) 784 && (ffa_endpoint_source(ep) == spmc_attrs.spmc_id)); 785 } 786 787 /****************************************************************************** 788 * spmd_handle_spmc_message 789 *****************************************************************************/ 790 static int spmd_handle_spmc_message(unsigned long long msg, 791 unsigned long long parm1, unsigned long long parm2, 792 unsigned long long parm3, unsigned long long parm4) 793 { 794 VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__, 795 msg, parm1, parm2, parm3, parm4); 796 797 return -EINVAL; 798 } 799 800 /******************************************************************************* 801 * This function forwards FF-A SMCs to either the main SPMD handler or the 802 * SPMC at EL3, depending on the origin security state, if enabled. 803 ******************************************************************************/ 804 uint64_t spmd_ffa_smc_handler(uint32_t smc_fid, 805 uint64_t x1, 806 uint64_t x2, 807 uint64_t x3, 808 uint64_t x4, 809 void *cookie, 810 void *handle, 811 uint64_t flags) 812 { 813 if (is_spmc_at_el3()) { 814 /* 815 * If we have an SPMC at EL3 allow handling of the SMC first. 816 * The SPMC will call back through to SPMD handler if required. 817 */ 818 if (is_caller_secure(flags)) { 819 return spmc_smc_handler(smc_fid, 820 is_caller_secure(flags), 821 x1, x2, x3, x4, cookie, 822 handle, flags); 823 } 824 } 825 return spmd_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 826 handle, flags); 827 } 828 829 /******************************************************************************* 830 * This function handles all SMCs in the range reserved for FFA. Each call is 831 * either forwarded to the other security state or handled by the SPM dispatcher 832 ******************************************************************************/ 833 uint64_t spmd_smc_handler(uint32_t smc_fid, 834 uint64_t x1, 835 uint64_t x2, 836 uint64_t x3, 837 uint64_t x4, 838 void *cookie, 839 void *handle, 840 uint64_t flags) 841 { 842 unsigned int linear_id = plat_my_core_pos(); 843 spmd_spm_core_context_t *ctx = spmd_get_context(); 844 bool secure_origin; 845 int ret; 846 uint32_t input_version; 847 848 /* Determine which security state this SMC originated from */ 849 secure_origin = is_caller_secure(flags); 850 851 VERBOSE("SPM(%u): 0x%x 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 852 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 "\n", 853 linear_id, smc_fid, x1, x2, x3, x4, 854 SMC_GET_GP(handle, CTX_GPREG_X5), 855 SMC_GET_GP(handle, CTX_GPREG_X6), 856 SMC_GET_GP(handle, CTX_GPREG_X7)); 857 858 /* 859 * If there is an on-going info regs from EL3 SPMD LP, unconditionally 860 * return, we don't expect any other FF-A ABIs to be called between 861 * calls to FFA_PARTITION_INFO_GET_REGS. 862 */ 863 if (is_spmd_logical_sp_info_regs_req_in_progress(ctx)) { 864 assert(secure_origin); 865 spmd_spm_core_sync_exit(0ULL); 866 } 867 868 switch (smc_fid) { 869 case FFA_ERROR: 870 /* 871 * Check if this is the first invocation of this interface on 872 * this CPU. If so, then indicate that the SPM Core initialised 873 * unsuccessfully. 874 */ 875 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 876 spmd_spm_core_sync_exit(x2); 877 } 878 879 /* 880 * If there was an SPMD logical partition direct request on-going, 881 * return back to the SPMD logical partition so the error can be 882 * consumed. 883 */ 884 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 885 assert(secure_origin); 886 spmd_spm_core_sync_exit(0ULL); 887 } 888 889 return spmd_smc_forward(smc_fid, secure_origin, 890 x1, x2, x3, x4, cookie, 891 handle, flags); 892 break; /* not reached */ 893 894 case FFA_VERSION: 895 input_version = (uint32_t)(0xFFFFFFFF & x1); 896 /* 897 * If caller is secure and SPMC was initialized, 898 * return FFA_VERSION of SPMD. 899 * If caller is non secure and SPMC was initialized, 900 * forward to the EL3 SPMC if enabled, otherwise return 901 * the SPMC version if implemented at a lower EL. 902 * Sanity check to "input_version". 903 * If the EL3 SPMC is enabled, ignore the SPMC state as 904 * this is not used. 905 */ 906 if ((input_version & FFA_VERSION_BIT31_MASK) || 907 (!is_spmc_at_el3() && (ctx->state == SPMC_STATE_RESET))) { 908 ret = FFA_ERROR_NOT_SUPPORTED; 909 } else if (!secure_origin) { 910 if (is_spmc_at_el3()) { 911 /* 912 * Forward the call directly to the EL3 SPMC, if 913 * enabled, as we don't need to wrap the call in 914 * a direct request. 915 */ 916 return spmd_smc_forward(smc_fid, secure_origin, 917 x1, x2, x3, x4, cookie, 918 handle, flags); 919 } 920 921 gp_regs_t *gpregs = get_gpregs_ctx(&ctx->cpu_ctx); 922 uint64_t rc; 923 924 if (spmc_attrs.major_version == 1 && 925 spmc_attrs.minor_version == 0) { 926 ret = MAKE_FFA_VERSION(spmc_attrs.major_version, 927 spmc_attrs.minor_version); 928 SMC_RET8(handle, (uint32_t)ret, 929 FFA_TARGET_INFO_MBZ, 930 FFA_TARGET_INFO_MBZ, 931 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 932 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 933 FFA_PARAM_MBZ); 934 break; 935 } 936 /* Save non-secure system registers context */ 937 #if SPMD_SPM_AT_SEL2 938 cm_el2_sysregs_context_save(NON_SECURE); 939 #else 940 cm_el1_sysregs_context_save(NON_SECURE); 941 #endif 942 943 /* 944 * The incoming request has FFA_VERSION as X0 smc_fid 945 * and requested version in x1. Prepare a direct request 946 * from SPMD to SPMC with FFA_VERSION framework function 947 * identifier in X2 and requested version in X3. 948 */ 949 spmd_build_spmc_message(gpregs, 950 SPMD_FWK_MSG_FFA_VERSION_REQ, 951 input_version); 952 953 /* 954 * Ensure x8-x17 NS GP register values are untouched when returning 955 * from the SPMC. 956 */ 957 write_ctx_reg(gpregs, CTX_GPREG_X8, SMC_GET_GP(handle, CTX_GPREG_X8)); 958 write_ctx_reg(gpregs, CTX_GPREG_X9, SMC_GET_GP(handle, CTX_GPREG_X9)); 959 write_ctx_reg(gpregs, CTX_GPREG_X10, SMC_GET_GP(handle, CTX_GPREG_X10)); 960 write_ctx_reg(gpregs, CTX_GPREG_X11, SMC_GET_GP(handle, CTX_GPREG_X11)); 961 write_ctx_reg(gpregs, CTX_GPREG_X12, SMC_GET_GP(handle, CTX_GPREG_X12)); 962 write_ctx_reg(gpregs, CTX_GPREG_X13, SMC_GET_GP(handle, CTX_GPREG_X13)); 963 write_ctx_reg(gpregs, CTX_GPREG_X14, SMC_GET_GP(handle, CTX_GPREG_X14)); 964 write_ctx_reg(gpregs, CTX_GPREG_X15, SMC_GET_GP(handle, CTX_GPREG_X15)); 965 write_ctx_reg(gpregs, CTX_GPREG_X16, SMC_GET_GP(handle, CTX_GPREG_X16)); 966 write_ctx_reg(gpregs, CTX_GPREG_X17, SMC_GET_GP(handle, CTX_GPREG_X17)); 967 968 rc = spmd_spm_core_sync_entry(ctx); 969 970 if ((rc != 0ULL) || 971 (SMC_GET_GP(gpregs, CTX_GPREG_X0) != 972 FFA_MSG_SEND_DIRECT_RESP_SMC32) || 973 (SMC_GET_GP(gpregs, CTX_GPREG_X2) != 974 (FFA_FWK_MSG_BIT | 975 SPMD_FWK_MSG_FFA_VERSION_RESP))) { 976 ERROR("Failed to forward FFA_VERSION\n"); 977 ret = FFA_ERROR_NOT_SUPPORTED; 978 } else { 979 ret = SMC_GET_GP(gpregs, CTX_GPREG_X3); 980 } 981 982 /* 983 * x0-x4 are updated by spmd_smc_forward below. 984 * Zero out x5-x7 in the FFA_VERSION response. 985 */ 986 write_ctx_reg(gpregs, CTX_GPREG_X5, 0); 987 write_ctx_reg(gpregs, CTX_GPREG_X6, 0); 988 write_ctx_reg(gpregs, CTX_GPREG_X7, 0); 989 990 /* 991 * Return here after SPMC has handled FFA_VERSION. 992 * The returned SPMC version is held in X3. 993 * Forward this version in X0 to the non-secure caller. 994 */ 995 return spmd_smc_forward(ret, true, FFA_PARAM_MBZ, 996 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 997 FFA_PARAM_MBZ, cookie, gpregs, 998 flags); 999 } else { 1000 ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, 1001 FFA_VERSION_MINOR); 1002 } 1003 1004 SMC_RET8(handle, (uint32_t)ret, FFA_TARGET_INFO_MBZ, 1005 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1006 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ); 1007 break; /* not reached */ 1008 1009 case FFA_FEATURES: 1010 /* 1011 * This is an optional interface. Do the minimal checks and 1012 * forward to SPM Core which will handle it if implemented. 1013 */ 1014 1015 /* Forward SMC from Normal world to the SPM Core */ 1016 if (!secure_origin) { 1017 return spmd_smc_forward(smc_fid, secure_origin, 1018 x1, x2, x3, x4, cookie, 1019 handle, flags); 1020 } 1021 1022 /* 1023 * Return success if call was from secure world i.e. all 1024 * FFA functions are supported. This is essentially a 1025 * nop. 1026 */ 1027 SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4, 1028 SMC_GET_GP(handle, CTX_GPREG_X5), 1029 SMC_GET_GP(handle, CTX_GPREG_X6), 1030 SMC_GET_GP(handle, CTX_GPREG_X7)); 1031 1032 break; /* not reached */ 1033 1034 case FFA_ID_GET: 1035 /* 1036 * Returns the ID of the calling FFA component. 1037 */ 1038 if (!secure_origin) { 1039 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1040 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID, 1041 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1042 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1043 FFA_PARAM_MBZ); 1044 } 1045 1046 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1047 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 1048 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1049 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1050 FFA_PARAM_MBZ); 1051 1052 break; /* not reached */ 1053 1054 case FFA_SECONDARY_EP_REGISTER_SMC64: 1055 if (secure_origin) { 1056 ret = spmd_pm_secondary_ep_register(x1); 1057 1058 if (ret < 0) { 1059 SMC_RET8(handle, FFA_ERROR_SMC64, 1060 FFA_TARGET_INFO_MBZ, ret, 1061 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1062 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1063 FFA_PARAM_MBZ); 1064 } else { 1065 SMC_RET8(handle, FFA_SUCCESS_SMC64, 1066 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, 1067 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1068 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1069 FFA_PARAM_MBZ); 1070 } 1071 } 1072 1073 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1074 break; /* Not reached */ 1075 1076 case FFA_SPM_ID_GET: 1077 if (MAKE_FFA_VERSION(1, 1) > FFA_VERSION_COMPILED) { 1078 return spmd_ffa_error_return(handle, 1079 FFA_ERROR_NOT_SUPPORTED); 1080 } 1081 /* 1082 * Returns the ID of the SPMC or SPMD depending on the FF-A 1083 * instance where this function is invoked 1084 */ 1085 if (!secure_origin) { 1086 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1087 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id, 1088 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1089 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1090 FFA_PARAM_MBZ); 1091 } 1092 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1093 FFA_TARGET_INFO_MBZ, SPMD_DIRECT_MSG_ENDPOINT_ID, 1094 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1095 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1096 FFA_PARAM_MBZ); 1097 1098 break; /* not reached */ 1099 1100 case FFA_MSG_SEND_DIRECT_REQ_SMC32: 1101 case FFA_MSG_SEND_DIRECT_REQ_SMC64: 1102 /* 1103 * Regardless of secure_origin, SPMD logical partitions cannot 1104 * handle direct messages. They can only initiate direct 1105 * messages and consume direct responses or errors. 1106 */ 1107 if (is_spmd_lp_id(ffa_endpoint_source(x1)) || 1108 is_spmd_lp_id(ffa_endpoint_destination(x1))) { 1109 return spmd_ffa_error_return(handle, 1110 FFA_ERROR_INVALID_PARAMETER 1111 ); 1112 } 1113 1114 /* 1115 * When there is an ongoing SPMD logical partition direct 1116 * request, there cannot be another direct request. Return 1117 * error in this case. Panic'ing is an option but that does 1118 * not provide the opportunity for caller to abort based on 1119 * error codes. 1120 */ 1121 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1122 assert(secure_origin); 1123 return spmd_ffa_error_return(handle, 1124 FFA_ERROR_DENIED); 1125 } 1126 1127 if (!secure_origin) { 1128 /* Validate source endpoint is non-secure for non-secure caller. */ 1129 if (ffa_is_secure_world_id(ffa_endpoint_source(x1))) { 1130 return spmd_ffa_error_return(handle, 1131 FFA_ERROR_INVALID_PARAMETER); 1132 } 1133 } 1134 if (secure_origin && spmd_is_spmc_message(x1)) { 1135 ret = spmd_handle_spmc_message(x3, x4, 1136 SMC_GET_GP(handle, CTX_GPREG_X5), 1137 SMC_GET_GP(handle, CTX_GPREG_X6), 1138 SMC_GET_GP(handle, CTX_GPREG_X7)); 1139 1140 SMC_RET8(handle, FFA_SUCCESS_SMC32, 1141 FFA_TARGET_INFO_MBZ, ret, 1142 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1143 FFA_PARAM_MBZ, FFA_PARAM_MBZ, 1144 FFA_PARAM_MBZ); 1145 } else { 1146 /* Forward direct message to the other world */ 1147 return spmd_smc_forward(smc_fid, secure_origin, 1148 x1, x2, x3, x4, cookie, 1149 handle, flags); 1150 } 1151 break; /* Not reached */ 1152 1153 case FFA_MSG_SEND_DIRECT_REQ2_SMC64: 1154 if (!secure_origin) { 1155 /* Validate source endpoint is non-secure for non-secure caller. */ 1156 if (ffa_is_secure_world_id(ffa_endpoint_source(x1))) { 1157 return spmd_ffa_error_return(handle, 1158 FFA_ERROR_INVALID_PARAMETER); 1159 } 1160 } 1161 /* FFA_MSG_SEND_DIRECT_REQ2 not used for framework messages. */ 1162 if (secure_origin && spmd_is_spmc_message(x1)) { 1163 return spmd_ffa_error_return(handle, FFA_ERROR_INVALID_PARAMETER); 1164 } else { 1165 /* Forward direct message to the other world */ 1166 return spmd_smc_forward(smc_fid, secure_origin, 1167 x1, x2, x3, x4, cookie, 1168 handle, flags); 1169 } 1170 break; /* Not reached */ 1171 1172 case FFA_MSG_SEND_DIRECT_RESP_SMC32: 1173 case FFA_MSG_SEND_DIRECT_RESP_SMC64: 1174 if (secure_origin && (spmd_is_spmc_message(x1) || 1175 is_spmd_logical_sp_dir_req_in_progress(ctx))) { 1176 spmd_spm_core_sync_exit(0ULL); 1177 } else { 1178 /* Forward direct message to the other world */ 1179 return spmd_smc_forward(smc_fid, secure_origin, 1180 x1, x2, x3, x4, cookie, 1181 handle, flags); 1182 } 1183 break; /* Not reached */ 1184 case FFA_MSG_SEND_DIRECT_RESP2_SMC64: 1185 /* Forward direct message to the other world */ 1186 return spmd_smc_forward(smc_fid, secure_origin, 1187 x1, x2, x3, x4, cookie, 1188 handle, flags); 1189 break; /* Not reached */ 1190 case FFA_RX_RELEASE: 1191 case FFA_RXTX_MAP_SMC32: 1192 case FFA_RXTX_MAP_SMC64: 1193 case FFA_RXTX_UNMAP: 1194 case FFA_PARTITION_INFO_GET: 1195 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1196 case FFA_NOTIFICATION_BITMAP_CREATE: 1197 case FFA_NOTIFICATION_BITMAP_DESTROY: 1198 case FFA_NOTIFICATION_BIND: 1199 case FFA_NOTIFICATION_UNBIND: 1200 case FFA_NOTIFICATION_SET: 1201 case FFA_NOTIFICATION_GET: 1202 case FFA_NOTIFICATION_INFO_GET: 1203 case FFA_NOTIFICATION_INFO_GET_SMC64: 1204 case FFA_MSG_SEND2: 1205 case FFA_RX_ACQUIRE: 1206 #endif 1207 case FFA_MSG_RUN: 1208 /* 1209 * Above calls should be invoked only by the Normal world and 1210 * must not be forwarded from Secure world to Normal world. 1211 */ 1212 if (secure_origin) { 1213 return spmd_ffa_error_return(handle, 1214 FFA_ERROR_NOT_SUPPORTED); 1215 } 1216 1217 /* Forward the call to the other world */ 1218 /* fallthrough */ 1219 case FFA_MSG_SEND: 1220 case FFA_MEM_DONATE_SMC32: 1221 case FFA_MEM_DONATE_SMC64: 1222 case FFA_MEM_LEND_SMC32: 1223 case FFA_MEM_LEND_SMC64: 1224 case FFA_MEM_SHARE_SMC32: 1225 case FFA_MEM_SHARE_SMC64: 1226 case FFA_MEM_RETRIEVE_REQ_SMC32: 1227 case FFA_MEM_RETRIEVE_REQ_SMC64: 1228 case FFA_MEM_RETRIEVE_RESP: 1229 case FFA_MEM_RELINQUISH: 1230 case FFA_MEM_RECLAIM: 1231 case FFA_MEM_FRAG_TX: 1232 case FFA_MEM_FRAG_RX: 1233 case FFA_SUCCESS_SMC32: 1234 case FFA_SUCCESS_SMC64: 1235 /* 1236 * If there is an ongoing direct request from an SPMD logical 1237 * partition, return an error. 1238 */ 1239 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1240 assert(secure_origin); 1241 return spmd_ffa_error_return(handle, 1242 FFA_ERROR_DENIED); 1243 } 1244 1245 return spmd_smc_forward(smc_fid, secure_origin, 1246 x1, x2, x3, x4, cookie, 1247 handle, flags); 1248 break; /* not reached */ 1249 1250 case FFA_MSG_WAIT: 1251 /* 1252 * Check if this is the first invocation of this interface on 1253 * this CPU from the Secure world. If so, then indicate that the 1254 * SPM Core initialised successfully. 1255 */ 1256 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) { 1257 spmd_spm_core_sync_exit(0ULL); 1258 } 1259 1260 /* Forward the call to the other world */ 1261 /* fallthrough */ 1262 case FFA_INTERRUPT: 1263 case FFA_MSG_YIELD: 1264 /* This interface must be invoked only by the Secure world */ 1265 if (!secure_origin) { 1266 return spmd_ffa_error_return(handle, 1267 FFA_ERROR_NOT_SUPPORTED); 1268 } 1269 1270 if (is_spmd_logical_sp_dir_req_in_progress(ctx)) { 1271 assert(secure_origin); 1272 return spmd_ffa_error_return(handle, 1273 FFA_ERROR_DENIED); 1274 } 1275 1276 return spmd_smc_forward(smc_fid, secure_origin, 1277 x1, x2, x3, x4, cookie, 1278 handle, flags); 1279 break; /* not reached */ 1280 1281 case FFA_NORMAL_WORLD_RESUME: 1282 if (secure_origin && ctx->secure_interrupt_ongoing) { 1283 spmd_spm_core_sync_exit(0ULL); 1284 } else { 1285 return spmd_ffa_error_return(handle, FFA_ERROR_DENIED); 1286 } 1287 break; /* Not reached */ 1288 #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED 1289 case FFA_PARTITION_INFO_GET_REGS_SMC64: 1290 if (secure_origin) { 1291 return spmd_el3_populate_logical_partition_info(handle, x1, 1292 x2, x3); 1293 } 1294 1295 /* Call only supported with SMCCC 1.2+ */ 1296 if (MAKE_SMCCC_VERSION(SMCCC_MAJOR_VERSION, SMCCC_MINOR_VERSION) < 0x10002) { 1297 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1298 } 1299 1300 return spmd_smc_forward(smc_fid, secure_origin, 1301 x1, x2, x3, x4, cookie, 1302 handle, flags); 1303 break; /* Not reached */ 1304 #endif 1305 case FFA_CONSOLE_LOG_SMC32: 1306 case FFA_CONSOLE_LOG_SMC64: 1307 /* This interface must not be forwarded to other worlds. */ 1308 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1309 break; /* not reached */ 1310 1311 case FFA_EL3_INTR_HANDLE: 1312 if (secure_origin) { 1313 return spmd_handle_group0_intr_swd(handle); 1314 } else { 1315 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1316 } 1317 default: 1318 WARN("SPM: Unsupported call 0x%08x\n", smc_fid); 1319 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED); 1320 } 1321 } 1322