xref: /rk3399_ARM-atf/services/std_svc/spmd/spmd_main.c (revision 52696946ab3f441496436ad7223cb2bd853c8beb)
1bdd2596dSAchin Gupta /*
2bdd2596dSAchin Gupta  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3bdd2596dSAchin Gupta  *
4bdd2596dSAchin Gupta  * SPDX-License-Identifier: BSD-3-Clause
5bdd2596dSAchin Gupta  */
6bdd2596dSAchin Gupta 
7bdd2596dSAchin Gupta #include <assert.h>
8bdd2596dSAchin Gupta #include <errno.h>
9bdd2596dSAchin Gupta #include <string.h>
10bdd2596dSAchin Gupta 
11bdd2596dSAchin Gupta #include <arch_helpers.h>
12*52696946SOlivier Deprez #include <arch/aarch64/arch_features.h>
13bdd2596dSAchin Gupta #include <bl31/bl31.h>
14bdd2596dSAchin Gupta #include <common/debug.h>
15bdd2596dSAchin Gupta #include <common/runtime_svc.h>
16bdd2596dSAchin Gupta #include <lib/el3_runtime/context_mgmt.h>
17bdd2596dSAchin Gupta #include <lib/smccc.h>
18bdd2596dSAchin Gupta #include <lib/spinlock.h>
19bdd2596dSAchin Gupta #include <lib/utils.h>
20bdd2596dSAchin Gupta #include <lib/xlat_tables/xlat_tables_v2.h>
21bdd2596dSAchin Gupta #include <plat/common/common_def.h>
22bdd2596dSAchin Gupta #include <plat/common/platform.h>
23bdd2596dSAchin Gupta #include <platform_def.h>
24bdd2596dSAchin Gupta #include <services/spci_svc.h>
25bdd2596dSAchin Gupta #include <services/spmd_svc.h>
26bdd2596dSAchin Gupta #include <smccc_helpers.h>
27bdd2596dSAchin Gupta #include "spmd_private.h"
28bdd2596dSAchin Gupta 
29bdd2596dSAchin Gupta /*******************************************************************************
30bdd2596dSAchin Gupta  * SPM Core context information.
31bdd2596dSAchin Gupta  ******************************************************************************/
32*52696946SOlivier Deprez static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT];
33bdd2596dSAchin Gupta 
34bdd2596dSAchin Gupta /*******************************************************************************
35bdd2596dSAchin Gupta  * SPM Core attribute information read from its manifest.
36bdd2596dSAchin Gupta  ******************************************************************************/
37*52696946SOlivier Deprez static spmc_manifest_attribute_t spmc_attrs;
380f14d02fSMax Shvetsov 
390f14d02fSMax Shvetsov /*******************************************************************************
400f14d02fSMax Shvetsov  * SPM Core entry point information. Discovered on the primary core and reused
410f14d02fSMax Shvetsov  * on secondary cores.
420f14d02fSMax Shvetsov  ******************************************************************************/
430f14d02fSMax Shvetsov static entry_point_info_t *spmc_ep_info;
440f14d02fSMax Shvetsov 
450f14d02fSMax Shvetsov /*******************************************************************************
46*52696946SOlivier Deprez  * SPM Core context on current CPU get helper.
47*52696946SOlivier Deprez  ******************************************************************************/
48*52696946SOlivier Deprez spmd_spm_core_context_t *spmd_get_context(void)
49*52696946SOlivier Deprez {
50*52696946SOlivier Deprez 	unsigned int linear_id = plat_my_core_pos();
51*52696946SOlivier Deprez 
52*52696946SOlivier Deprez 	return &spm_core_context[linear_id];
53*52696946SOlivier Deprez }
54*52696946SOlivier Deprez 
55*52696946SOlivier Deprez /*******************************************************************************
560f14d02fSMax Shvetsov  * Static function declaration.
570f14d02fSMax Shvetsov  ******************************************************************************/
580f14d02fSMax Shvetsov static int32_t spmd_init(void);
59*52696946SOlivier Deprez static int spmd_spmc_init(void *rd_base,
60*52696946SOlivier Deprez 			  size_t rd_size);
61*52696946SOlivier Deprez static uint64_t spmd_spci_error_return(void *handle,
62*52696946SOlivier Deprez 				       int error_code);
63*52696946SOlivier Deprez static uint64_t spmd_smc_forward(uint32_t smc_fid,
64*52696946SOlivier Deprez 				 bool secure_origin,
65*52696946SOlivier Deprez 				 uint64_t x1,
66*52696946SOlivier Deprez 				 uint64_t x2,
67*52696946SOlivier Deprez 				 uint64_t x3,
68*52696946SOlivier Deprez 				 uint64_t x4,
69*52696946SOlivier Deprez 				 void *handle);
70bdd2596dSAchin Gupta 
71bdd2596dSAchin Gupta /*******************************************************************************
72*52696946SOlivier Deprez  * This function takes an SPMC context pointer and performs a synchronous
73*52696946SOlivier Deprez  * SPMC entry.
74bdd2596dSAchin Gupta  ******************************************************************************/
75bdd2596dSAchin Gupta uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx)
76bdd2596dSAchin Gupta {
77bdd2596dSAchin Gupta 	uint64_t rc;
78bdd2596dSAchin Gupta 
79bdd2596dSAchin Gupta 	assert(spmc_ctx != NULL);
80bdd2596dSAchin Gupta 
81bdd2596dSAchin Gupta 	cm_set_context(&(spmc_ctx->cpu_ctx), SECURE);
82bdd2596dSAchin Gupta 
83bdd2596dSAchin Gupta 	/* Restore the context assigned above */
84bdd2596dSAchin Gupta 	cm_el1_sysregs_context_restore(SECURE);
85033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
8628f39f02SMax Shvetsov 	cm_el2_sysregs_context_restore(SECURE);
87033039f8SMax Shvetsov #endif
88bdd2596dSAchin Gupta 	cm_set_next_eret_context(SECURE);
89bdd2596dSAchin Gupta 
90033039f8SMax Shvetsov 	/* Enter SPMC */
91bdd2596dSAchin Gupta 	rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx);
92bdd2596dSAchin Gupta 
93bdd2596dSAchin Gupta 	/* Save secure state */
94bdd2596dSAchin Gupta 	cm_el1_sysregs_context_save(SECURE);
95033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
9628f39f02SMax Shvetsov 	cm_el2_sysregs_context_save(SECURE);
97033039f8SMax Shvetsov #endif
98bdd2596dSAchin Gupta 
99bdd2596dSAchin Gupta 	return rc;
100bdd2596dSAchin Gupta }
101bdd2596dSAchin Gupta 
102bdd2596dSAchin Gupta /*******************************************************************************
103*52696946SOlivier Deprez  * This function returns to the place where spmd_spm_core_sync_entry() was
104bdd2596dSAchin Gupta  * called originally.
105bdd2596dSAchin Gupta  ******************************************************************************/
106bdd2596dSAchin Gupta __dead2 void spmd_spm_core_sync_exit(uint64_t rc)
107bdd2596dSAchin Gupta {
108*52696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
109bdd2596dSAchin Gupta 
110*52696946SOlivier Deprez 	/* Get current CPU context from SPMC context */
111bdd2596dSAchin Gupta 	assert(cm_get_context(SECURE) == &(ctx->cpu_ctx));
112bdd2596dSAchin Gupta 
113bdd2596dSAchin Gupta 	/*
114bdd2596dSAchin Gupta 	 * The SPMD must have initiated the original request through a
115bdd2596dSAchin Gupta 	 * synchronous entry into SPMC. Jump back to the original C runtime
116bdd2596dSAchin Gupta 	 * context with the value of rc in x0;
117bdd2596dSAchin Gupta 	 */
118bdd2596dSAchin Gupta 	spmd_spm_core_exit(ctx->c_rt_ctx, rc);
119bdd2596dSAchin Gupta 
120bdd2596dSAchin Gupta 	panic();
121bdd2596dSAchin Gupta }
122bdd2596dSAchin Gupta 
123bdd2596dSAchin Gupta /*******************************************************************************
124*52696946SOlivier Deprez  * Jump to the SPM Core for the first time.
125bdd2596dSAchin Gupta  ******************************************************************************/
126bdd2596dSAchin Gupta static int32_t spmd_init(void)
127bdd2596dSAchin Gupta {
128*52696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
129*52696946SOlivier Deprez 	uint64_t rc;
130bdd2596dSAchin Gupta 
131*52696946SOlivier Deprez 	VERBOSE("SPM Core init start.\n");
132bdd2596dSAchin Gupta 	ctx->state = SPMC_STATE_RESET;
133bdd2596dSAchin Gupta 
134bdd2596dSAchin Gupta 	rc = spmd_spm_core_sync_entry(ctx);
135*52696946SOlivier Deprez 	if (rc != 0ULL) {
136bdd2596dSAchin Gupta 		ERROR("SPMC initialisation failed 0x%llx\n", rc);
137*52696946SOlivier Deprez 		return 0;
138bdd2596dSAchin Gupta 	}
139bdd2596dSAchin Gupta 
140bdd2596dSAchin Gupta 	ctx->state = SPMC_STATE_IDLE;
141*52696946SOlivier Deprez 	VERBOSE("SPM Core init end.\n");
142bdd2596dSAchin Gupta 
143bdd2596dSAchin Gupta 	return 1;
144bdd2596dSAchin Gupta }
145bdd2596dSAchin Gupta 
146bdd2596dSAchin Gupta /*******************************************************************************
147*52696946SOlivier Deprez  * Loads SPMC manifest and inits SPMC.
1480f14d02fSMax Shvetsov  ******************************************************************************/
1490f14d02fSMax Shvetsov static int spmd_spmc_init(void *rd_base, size_t rd_size)
1500f14d02fSMax Shvetsov {
151*52696946SOlivier Deprez 	spmd_spm_core_context_t *spm_ctx = spmd_get_context();
1520f14d02fSMax Shvetsov 	uint32_t ep_attr;
153*52696946SOlivier Deprez 	int rc;
1540f14d02fSMax Shvetsov 
155*52696946SOlivier Deprez 	/* Load the SPM Core manifest */
1560f14d02fSMax Shvetsov 	rc = plat_spm_core_manifest_load(&spmc_attrs, rd_base, rd_size);
1570f14d02fSMax Shvetsov 	if (rc != 0) {
158*52696946SOlivier Deprez 		WARN("No or invalid SPM Core manifest image provided by BL2\n");
159*52696946SOlivier Deprez 		return rc;
1600f14d02fSMax Shvetsov 	}
1610f14d02fSMax Shvetsov 
1620f14d02fSMax Shvetsov 	/*
163*52696946SOlivier Deprez 	 * Ensure that the SPM Core version is compatible with the SPM
164*52696946SOlivier Deprez 	 * Dispatcher version.
1650f14d02fSMax Shvetsov 	 */
1660f14d02fSMax Shvetsov 	if ((spmc_attrs.major_version != SPCI_VERSION_MAJOR) ||
1670f14d02fSMax Shvetsov 	    (spmc_attrs.minor_version > SPCI_VERSION_MINOR)) {
168*52696946SOlivier Deprez 		WARN("Unsupported SPCI version (%u.%u)\n",
1690f14d02fSMax Shvetsov 		     spmc_attrs.major_version, spmc_attrs.minor_version);
170*52696946SOlivier Deprez 		return -EINVAL;
1710f14d02fSMax Shvetsov 	}
1720f14d02fSMax Shvetsov 
173*52696946SOlivier Deprez 	VERBOSE("SPCI version (%u.%u).\n", spmc_attrs.major_version,
1740f14d02fSMax Shvetsov 	     spmc_attrs.minor_version);
1750f14d02fSMax Shvetsov 
176*52696946SOlivier Deprez 	VERBOSE("SPM Core run time EL%x.\n",
177033039f8SMax Shvetsov 	     SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1);
1780f14d02fSMax Shvetsov 
179ac03ac5eSMax Shvetsov 	/* Validate the SPMC ID, Ensure high bit is set */
180*52696946SOlivier Deprez 	if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) &
181*52696946SOlivier Deprez 			SPMC_SECURE_ID_MASK) == 0U) {
182*52696946SOlivier Deprez 		WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id);
183*52696946SOlivier Deprez 		return -EINVAL;
184ac03ac5eSMax Shvetsov 	}
185ac03ac5eSMax Shvetsov 
186*52696946SOlivier Deprez 	/* Validate the SPM Core execution state */
1870f14d02fSMax Shvetsov 	if ((spmc_attrs.exec_state != MODE_RW_64) &&
1880f14d02fSMax Shvetsov 	    (spmc_attrs.exec_state != MODE_RW_32)) {
189*52696946SOlivier Deprez 		WARN("Unsupported SPM Core execution state 0x%x.\n",
1900f14d02fSMax Shvetsov 		     spmc_attrs.exec_state);
191*52696946SOlivier Deprez 		return -EINVAL;
1920f14d02fSMax Shvetsov 	}
1930f14d02fSMax Shvetsov 
194*52696946SOlivier Deprez 	VERBOSE("SPM Core execution state 0x%x.\n", spmc_attrs.exec_state);
1950f14d02fSMax Shvetsov 
196033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
197033039f8SMax Shvetsov 	/* Ensure manifest has not requested AArch32 state in S-EL2 */
198033039f8SMax Shvetsov 	if (spmc_attrs.exec_state == MODE_RW_32) {
199033039f8SMax Shvetsov 		WARN("AArch32 state at S-EL2 is not supported.\n");
200*52696946SOlivier Deprez 		return -EINVAL;
2010f14d02fSMax Shvetsov 	}
2020f14d02fSMax Shvetsov 
2030f14d02fSMax Shvetsov 	/*
2040f14d02fSMax Shvetsov 	 * Check if S-EL2 is supported on this system if S-EL2
2050f14d02fSMax Shvetsov 	 * is required for SPM
2060f14d02fSMax Shvetsov 	 */
207*52696946SOlivier Deprez 	if (!is_armv8_4_sel2_present()) {
208*52696946SOlivier Deprez 		WARN("SPM Core run time S-EL2 is not supported.\n");
209*52696946SOlivier Deprez 		return -EINVAL;
2100f14d02fSMax Shvetsov 	}
211033039f8SMax Shvetsov #endif /* SPMD_SPM_AT_SEL2 */
2120f14d02fSMax Shvetsov 
2130f14d02fSMax Shvetsov 	/* Initialise an entrypoint to set up the CPU context */
2140f14d02fSMax Shvetsov 	ep_attr = SECURE | EP_ST_ENABLE;
215*52696946SOlivier Deprez 	if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) {
2160f14d02fSMax Shvetsov 		ep_attr |= EP_EE_BIG;
2170f14d02fSMax Shvetsov 	}
2180f14d02fSMax Shvetsov 
2190f14d02fSMax Shvetsov 	SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr);
2200f14d02fSMax Shvetsov 	assert(spmc_ep_info->pc == BL32_BASE);
2210f14d02fSMax Shvetsov 
2220f14d02fSMax Shvetsov 	/*
223*52696946SOlivier Deprez 	 * Populate SPSR for SPM Core based upon validated parameters from the
224*52696946SOlivier Deprez 	 * manifest.
2250f14d02fSMax Shvetsov 	 */
2260f14d02fSMax Shvetsov 	if (spmc_attrs.exec_state == MODE_RW_32) {
2270f14d02fSMax Shvetsov 		spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
2280f14d02fSMax Shvetsov 						 SPSR_E_LITTLE,
2290f14d02fSMax Shvetsov 						 DAIF_FIQ_BIT |
2300f14d02fSMax Shvetsov 						 DAIF_IRQ_BIT |
2310f14d02fSMax Shvetsov 						 DAIF_ABT_BIT);
2320f14d02fSMax Shvetsov 	} else {
233033039f8SMax Shvetsov 
234033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
235033039f8SMax Shvetsov 		static const uint32_t runtime_el = MODE_EL2;
236033039f8SMax Shvetsov #else
237033039f8SMax Shvetsov 		static const uint32_t runtime_el = MODE_EL1;
238033039f8SMax Shvetsov #endif
239033039f8SMax Shvetsov 		spmc_ep_info->spsr = SPSR_64(runtime_el,
2400f14d02fSMax Shvetsov 					     MODE_SP_ELX,
2410f14d02fSMax Shvetsov 					     DISABLE_ALL_EXCEPTIONS);
2420f14d02fSMax Shvetsov 	}
2430f14d02fSMax Shvetsov 
244*52696946SOlivier Deprez 	/* Initialise SPM Core context with this entry point information */
2450f14d02fSMax Shvetsov 	cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info);
2460f14d02fSMax Shvetsov 
2470f14d02fSMax Shvetsov 	/* Reuse PSCI affinity states to mark this SPMC context as off */
2480f14d02fSMax Shvetsov 	spm_ctx->state = AFF_STATE_OFF;
2490f14d02fSMax Shvetsov 
250*52696946SOlivier Deprez 	INFO("SPM Core setup done.\n");
2510f14d02fSMax Shvetsov 
2520f14d02fSMax Shvetsov 	/* Register init function for deferred init. */
2530f14d02fSMax Shvetsov 	bl31_register_bl32_init(&spmd_init);
2540f14d02fSMax Shvetsov 
2550f14d02fSMax Shvetsov 	return 0;
2560f14d02fSMax Shvetsov }
2570f14d02fSMax Shvetsov 
2580f14d02fSMax Shvetsov /*******************************************************************************
259*52696946SOlivier Deprez  * Initialize context of SPM Core.
260bdd2596dSAchin Gupta  ******************************************************************************/
2610f14d02fSMax Shvetsov int spmd_setup(void)
262bdd2596dSAchin Gupta {
263bdd2596dSAchin Gupta 	int rc;
264bdd2596dSAchin Gupta 	void *rd_base;
265bdd2596dSAchin Gupta 	size_t rd_size;
266bdd2596dSAchin Gupta 	uintptr_t rd_base_align;
267bdd2596dSAchin Gupta 	uintptr_t rd_size_align;
268bdd2596dSAchin Gupta 
269bdd2596dSAchin Gupta 	spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
270*52696946SOlivier Deprez 	if (spmc_ep_info == NULL) {
271*52696946SOlivier Deprez 		WARN("No SPM Core image provided by BL2 boot loader.\n");
272*52696946SOlivier Deprez 		return -EINVAL;
273bdd2596dSAchin Gupta 	}
274bdd2596dSAchin Gupta 
275bdd2596dSAchin Gupta 	/* Under no circumstances will this parameter be 0 */
276*52696946SOlivier Deprez 	assert(spmc_ep_info->pc != 0ULL);
277bdd2596dSAchin Gupta 
278bdd2596dSAchin Gupta 	/*
279bdd2596dSAchin Gupta 	 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will
280*52696946SOlivier Deprez 	 * be used as a manifest for the SPM Core at the next lower EL/mode.
281bdd2596dSAchin Gupta 	 */
282bdd2596dSAchin Gupta 	if (spmc_ep_info->args.arg0 == 0U || spmc_ep_info->args.arg2 == 0U) {
283bdd2596dSAchin Gupta 		ERROR("Invalid or absent SPM core manifest\n");
284bdd2596dSAchin Gupta 		panic();
285bdd2596dSAchin Gupta 	}
286bdd2596dSAchin Gupta 
287*52696946SOlivier Deprez 	/* Obtain whereabouts of SPM Core manifest */
288bdd2596dSAchin Gupta 	rd_base = (void *) spmc_ep_info->args.arg0;
289bdd2596dSAchin Gupta 	rd_size = spmc_ep_info->args.arg2;
290bdd2596dSAchin Gupta 
291bdd2596dSAchin Gupta 	rd_base_align = page_align((uintptr_t) rd_base, DOWN);
292bdd2596dSAchin Gupta 	rd_size_align = page_align((uintptr_t) rd_size, UP);
293bdd2596dSAchin Gupta 
294bdd2596dSAchin Gupta 	/* Map the manifest in the SPMD translation regime first */
295bdd2596dSAchin Gupta 	VERBOSE("SPM core manifest base : 0x%lx\n", rd_base_align);
296bdd2596dSAchin Gupta 	VERBOSE("SPM core manifest size : 0x%lx\n", rd_size_align);
297bdd2596dSAchin Gupta 	rc = mmap_add_dynamic_region((unsigned long long) rd_base_align,
298bdd2596dSAchin Gupta 				     (uintptr_t) rd_base_align,
299bdd2596dSAchin Gupta 				     rd_size_align,
300bdd2596dSAchin Gupta 				     MT_RO_DATA);
3010f14d02fSMax Shvetsov 	if (rc != 0) {
302bdd2596dSAchin Gupta 		ERROR("Error while mapping SPM core manifest (%d).\n", rc);
303bdd2596dSAchin Gupta 		panic();
304bdd2596dSAchin Gupta 	}
305bdd2596dSAchin Gupta 
3060f14d02fSMax Shvetsov 	/* Load manifest, init SPMC */
3070f14d02fSMax Shvetsov 	rc = spmd_spmc_init(rd_base, rd_size);
3080f14d02fSMax Shvetsov 	if (rc != 0) {
3090f14d02fSMax Shvetsov 		int mmap_rc;
310bdd2596dSAchin Gupta 
311*52696946SOlivier Deprez 		WARN("Booting device without SPM initialization.\n");
312bdd2596dSAchin Gupta 
3130f14d02fSMax Shvetsov 		mmap_rc = mmap_remove_dynamic_region(rd_base_align,
3140f14d02fSMax Shvetsov 						     rd_size_align);
3150f14d02fSMax Shvetsov 		if (mmap_rc != 0) {
316bdd2596dSAchin Gupta 			ERROR("Error while unmapping SPM core manifest (%d).\n",
3170f14d02fSMax Shvetsov 			      mmap_rc);
318bdd2596dSAchin Gupta 			panic();
319bdd2596dSAchin Gupta 		}
320bdd2596dSAchin Gupta 
3210f14d02fSMax Shvetsov 		return rc;
3220f14d02fSMax Shvetsov 	}
3230f14d02fSMax Shvetsov 
3240f14d02fSMax Shvetsov 	return 0;
3250f14d02fSMax Shvetsov }
3260f14d02fSMax Shvetsov 
3270f14d02fSMax Shvetsov /*******************************************************************************
3280f14d02fSMax Shvetsov  * Forward SMC to the other security state
3290f14d02fSMax Shvetsov  ******************************************************************************/
330*52696946SOlivier Deprez static uint64_t spmd_smc_forward(uint32_t smc_fid,
331*52696946SOlivier Deprez 				 bool secure_origin,
332*52696946SOlivier Deprez 				 uint64_t x1,
333*52696946SOlivier Deprez 				 uint64_t x2,
334*52696946SOlivier Deprez 				 uint64_t x3,
335*52696946SOlivier Deprez 				 uint64_t x4,
336*52696946SOlivier Deprez 				 void *handle)
3370f14d02fSMax Shvetsov {
33893ff138bSOlivier Deprez 	uint32_t secure_state_in = (secure_origin) ? SECURE : NON_SECURE;
33993ff138bSOlivier Deprez 	uint32_t secure_state_out = (!secure_origin) ? SECURE : NON_SECURE;
34093ff138bSOlivier Deprez 
3410f14d02fSMax Shvetsov 	/* Save incoming security state */
34293ff138bSOlivier Deprez 	cm_el1_sysregs_context_save(secure_state_in);
343033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
34493ff138bSOlivier Deprez 	cm_el2_sysregs_context_save(secure_state_in);
345033039f8SMax Shvetsov #endif
3460f14d02fSMax Shvetsov 
3470f14d02fSMax Shvetsov 	/* Restore outgoing security state */
34893ff138bSOlivier Deprez 	cm_el1_sysregs_context_restore(secure_state_out);
349033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
35093ff138bSOlivier Deprez 	cm_el2_sysregs_context_restore(secure_state_out);
351033039f8SMax Shvetsov #endif
35293ff138bSOlivier Deprez 	cm_set_next_eret_context(secure_state_out);
3530f14d02fSMax Shvetsov 
35493ff138bSOlivier Deprez 	SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4,
3550f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X5),
3560f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X6),
3570f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X7));
3580f14d02fSMax Shvetsov }
3590f14d02fSMax Shvetsov 
3600f14d02fSMax Shvetsov /*******************************************************************************
3610f14d02fSMax Shvetsov  * Return SPCI_ERROR with specified error code
3620f14d02fSMax Shvetsov  ******************************************************************************/
3630f14d02fSMax Shvetsov static uint64_t spmd_spci_error_return(void *handle, int error_code)
3640f14d02fSMax Shvetsov {
3650f14d02fSMax Shvetsov 	SMC_RET8(handle, SPCI_ERROR,
3660f14d02fSMax Shvetsov 		 SPCI_TARGET_INFO_MBZ, error_code,
3670f14d02fSMax Shvetsov 		 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
3680f14d02fSMax Shvetsov 		 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ);
369bdd2596dSAchin Gupta }
370bdd2596dSAchin Gupta 
371bdd2596dSAchin Gupta /*******************************************************************************
372bdd2596dSAchin Gupta  * This function handles all SMCs in the range reserved for SPCI. Each call is
373bdd2596dSAchin Gupta  * either forwarded to the other security state or handled by the SPM dispatcher
374bdd2596dSAchin Gupta  ******************************************************************************/
375*52696946SOlivier Deprez uint64_t spmd_smc_handler(uint32_t smc_fid,
376*52696946SOlivier Deprez 			  uint64_t x1,
377*52696946SOlivier Deprez 			  uint64_t x2,
378*52696946SOlivier Deprez 			  uint64_t x3,
379*52696946SOlivier Deprez 			  uint64_t x4,
380*52696946SOlivier Deprez 			  void *cookie,
381*52696946SOlivier Deprez 			  void *handle,
382bdd2596dSAchin Gupta 			  uint64_t flags)
383bdd2596dSAchin Gupta {
384*52696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
38593ff138bSOlivier Deprez 	bool secure_origin;
38693ff138bSOlivier Deprez 	int32_t ret;
387bdd2596dSAchin Gupta 
388bdd2596dSAchin Gupta 	/* Determine which security state this SMC originated from */
38993ff138bSOlivier Deprez 	secure_origin = is_caller_secure(flags);
390bdd2596dSAchin Gupta 
391*52696946SOlivier Deprez 	INFO("SPM: 0x%x 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx\n",
392bdd2596dSAchin Gupta 	     smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5),
393bdd2596dSAchin Gupta 	     SMC_GET_GP(handle, CTX_GPREG_X6),
394bdd2596dSAchin Gupta 	     SMC_GET_GP(handle, CTX_GPREG_X7));
395bdd2596dSAchin Gupta 
396bdd2596dSAchin Gupta 	switch (smc_fid) {
397bdd2596dSAchin Gupta 	case SPCI_ERROR:
398bdd2596dSAchin Gupta 		/*
399bdd2596dSAchin Gupta 		 * Check if this is the first invocation of this interface on
400*52696946SOlivier Deprez 		 * this CPU. If so, then indicate that the SPM Core initialised
401bdd2596dSAchin Gupta 		 * unsuccessfully.
402bdd2596dSAchin Gupta 		 */
40393ff138bSOlivier Deprez 		if (secure_origin && (ctx->state == SPMC_STATE_RESET)) {
404bdd2596dSAchin Gupta 			spmd_spm_core_sync_exit(x2);
4050f14d02fSMax Shvetsov 		}
406bdd2596dSAchin Gupta 
40793ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
4080f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
409bdd2596dSAchin Gupta 		break; /* not reached */
410bdd2596dSAchin Gupta 
411bdd2596dSAchin Gupta 	case SPCI_VERSION:
412bdd2596dSAchin Gupta 		/*
413bdd2596dSAchin Gupta 		 * TODO: This is an optimization that the version information
414*52696946SOlivier Deprez 		 * provided by the SPM Core manifest is returned by the SPM
415bdd2596dSAchin Gupta 		 * dispatcher. It might be a better idea to simply forward this
416*52696946SOlivier Deprez 		 * call to the SPM Core and wash our hands completely.
417bdd2596dSAchin Gupta 		 */
418bdd2596dSAchin Gupta 		ret = MAKE_SPCI_VERSION(spmc_attrs.major_version,
419bdd2596dSAchin Gupta 					spmc_attrs.minor_version);
420bdd2596dSAchin Gupta 		SMC_RET8(handle, SPCI_SUCCESS_SMC32, SPCI_TARGET_INFO_MBZ, ret,
421bdd2596dSAchin Gupta 			 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
422bdd2596dSAchin Gupta 			 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ);
423bdd2596dSAchin Gupta 		break; /* not reached */
424bdd2596dSAchin Gupta 
425bdd2596dSAchin Gupta 	case SPCI_FEATURES:
426bdd2596dSAchin Gupta 		/*
427bdd2596dSAchin Gupta 		 * This is an optional interface. Do the minimal checks and
428*52696946SOlivier Deprez 		 * forward to SPM Core which will handle it if implemented.
429bdd2596dSAchin Gupta 		 */
430bdd2596dSAchin Gupta 
431bdd2596dSAchin Gupta 		/*
4320f14d02fSMax Shvetsov 		 * Check if x1 holds a valid SPCI fid. This is an
433bdd2596dSAchin Gupta 		 * optimization.
434bdd2596dSAchin Gupta 		 */
4350f14d02fSMax Shvetsov 		if (!is_spci_fid(x1)) {
4360f14d02fSMax Shvetsov 			return spmd_spci_error_return(handle,
4370f14d02fSMax Shvetsov 						      SPCI_ERROR_NOT_SUPPORTED);
4380f14d02fSMax Shvetsov 		}
439bdd2596dSAchin Gupta 
440*52696946SOlivier Deprez 		/* Forward SMC from Normal world to the SPM Core */
44193ff138bSOlivier Deprez 		if (!secure_origin) {
44293ff138bSOlivier Deprez 			return spmd_smc_forward(smc_fid, secure_origin,
4430f14d02fSMax Shvetsov 						x1, x2, x3, x4, handle);
444*52696946SOlivier Deprez 		}
445*52696946SOlivier Deprez 
446bdd2596dSAchin Gupta 		/*
447bdd2596dSAchin Gupta 		 * Return success if call was from secure world i.e. all
448bdd2596dSAchin Gupta 		 * SPCI functions are supported. This is essentially a
449bdd2596dSAchin Gupta 		 * nop.
450bdd2596dSAchin Gupta 		 */
451bdd2596dSAchin Gupta 		SMC_RET8(handle, SPCI_SUCCESS_SMC32, x1, x2, x3, x4,
452bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X5),
453bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X6),
454bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X7));
4550f14d02fSMax Shvetsov 
456bdd2596dSAchin Gupta 		break; /* not reached */
457bdd2596dSAchin Gupta 
458ac03ac5eSMax Shvetsov 	case SPCI_ID_GET:
459ac03ac5eSMax Shvetsov 		/*
460ac03ac5eSMax Shvetsov 		 * Returns the ID of the calling SPCI component.
461ac03ac5eSMax Shvetsov 		 */
462ac03ac5eSMax Shvetsov 		if (!secure_origin) {
463ac03ac5eSMax Shvetsov 			SMC_RET8(handle, SPCI_SUCCESS_SMC32,
464ac03ac5eSMax Shvetsov 				 SPCI_TARGET_INFO_MBZ, SPCI_NS_ENDPOINT_ID,
465ac03ac5eSMax Shvetsov 				 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
466ac03ac5eSMax Shvetsov 				 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
467ac03ac5eSMax Shvetsov 				 SPCI_PARAM_MBZ);
468*52696946SOlivier Deprez 		}
469*52696946SOlivier Deprez 
470ac03ac5eSMax Shvetsov 		SMC_RET8(handle, SPCI_SUCCESS_SMC32,
471ac03ac5eSMax Shvetsov 			 SPCI_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
472ac03ac5eSMax Shvetsov 			 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
473ac03ac5eSMax Shvetsov 			 SPCI_PARAM_MBZ, SPCI_PARAM_MBZ,
474ac03ac5eSMax Shvetsov 			 SPCI_PARAM_MBZ);
475ac03ac5eSMax Shvetsov 
476ac03ac5eSMax Shvetsov 		break; /* not reached */
477ac03ac5eSMax Shvetsov 
478bdd2596dSAchin Gupta 	case SPCI_RX_RELEASE:
479bdd2596dSAchin Gupta 	case SPCI_RXTX_MAP_SMC32:
480bdd2596dSAchin Gupta 	case SPCI_RXTX_MAP_SMC64:
481bdd2596dSAchin Gupta 	case SPCI_RXTX_UNMAP:
482bdd2596dSAchin Gupta 	case SPCI_MSG_RUN:
483bdd2596dSAchin Gupta 		/* This interface must be invoked only by the Normal world */
48493ff138bSOlivier Deprez 		if (secure_origin) {
4850f14d02fSMax Shvetsov 			return spmd_spci_error_return(handle,
4860f14d02fSMax Shvetsov 						      SPCI_ERROR_NOT_SUPPORTED);
487bdd2596dSAchin Gupta 		}
488bdd2596dSAchin Gupta 
489bdd2596dSAchin Gupta 		/* Fall through to forward the call to the other world */
490bdd2596dSAchin Gupta 
491bdd2596dSAchin Gupta 	case SPCI_PARTITION_INFO_GET:
492bdd2596dSAchin Gupta 	case SPCI_MSG_SEND:
493bdd2596dSAchin Gupta 	case SPCI_MSG_SEND_DIRECT_REQ_SMC32:
494bdd2596dSAchin Gupta 	case SPCI_MSG_SEND_DIRECT_REQ_SMC64:
495bdd2596dSAchin Gupta 	case SPCI_MSG_SEND_DIRECT_RESP_SMC32:
496bdd2596dSAchin Gupta 	case SPCI_MSG_SEND_DIRECT_RESP_SMC64:
497bdd2596dSAchin Gupta 	case SPCI_MEM_DONATE_SMC32:
498bdd2596dSAchin Gupta 	case SPCI_MEM_DONATE_SMC64:
499bdd2596dSAchin Gupta 	case SPCI_MEM_LEND_SMC32:
500bdd2596dSAchin Gupta 	case SPCI_MEM_LEND_SMC64:
501bdd2596dSAchin Gupta 	case SPCI_MEM_SHARE_SMC32:
502bdd2596dSAchin Gupta 	case SPCI_MEM_SHARE_SMC64:
503bdd2596dSAchin Gupta 	case SPCI_MEM_RETRIEVE_REQ_SMC32:
504bdd2596dSAchin Gupta 	case SPCI_MEM_RETRIEVE_REQ_SMC64:
505bdd2596dSAchin Gupta 	case SPCI_MEM_RETRIEVE_RESP:
506bdd2596dSAchin Gupta 	case SPCI_MEM_RELINQUISH:
507bdd2596dSAchin Gupta 	case SPCI_MEM_RECLAIM:
508bdd2596dSAchin Gupta 	case SPCI_SUCCESS_SMC32:
509bdd2596dSAchin Gupta 	case SPCI_SUCCESS_SMC64:
510bdd2596dSAchin Gupta 		/*
511bdd2596dSAchin Gupta 		 * TODO: Assume that no requests originate from EL3 at the
512bdd2596dSAchin Gupta 		 * moment. This will change if a SP service is required in
513bdd2596dSAchin Gupta 		 * response to secure interrupts targeted to EL3. Until then
514bdd2596dSAchin Gupta 		 * simply forward the call to the Normal world.
515bdd2596dSAchin Gupta 		 */
516bdd2596dSAchin Gupta 
51793ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
5180f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
519bdd2596dSAchin Gupta 		break; /* not reached */
520bdd2596dSAchin Gupta 
521bdd2596dSAchin Gupta 	case SPCI_MSG_WAIT:
522bdd2596dSAchin Gupta 		/*
523bdd2596dSAchin Gupta 		 * Check if this is the first invocation of this interface on
524bdd2596dSAchin Gupta 		 * this CPU from the Secure world. If so, then indicate that the
525*52696946SOlivier Deprez 		 * SPM Core initialised successfully.
526bdd2596dSAchin Gupta 		 */
52793ff138bSOlivier Deprez 		if (secure_origin && (ctx->state == SPMC_STATE_RESET)) {
528bdd2596dSAchin Gupta 			spmd_spm_core_sync_exit(0);
529bdd2596dSAchin Gupta 		}
530bdd2596dSAchin Gupta 
5310f14d02fSMax Shvetsov 		/* Fall through to forward the call to the other world */
532bdd2596dSAchin Gupta 
533bdd2596dSAchin Gupta 	case SPCI_MSG_YIELD:
534bdd2596dSAchin Gupta 		/* This interface must be invoked only by the Secure world */
53593ff138bSOlivier Deprez 		if (!secure_origin) {
5360f14d02fSMax Shvetsov 			return spmd_spci_error_return(handle,
5370f14d02fSMax Shvetsov 						      SPCI_ERROR_NOT_SUPPORTED);
538bdd2596dSAchin Gupta 		}
539bdd2596dSAchin Gupta 
54093ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
5410f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
542bdd2596dSAchin Gupta 		break; /* not reached */
543bdd2596dSAchin Gupta 
544bdd2596dSAchin Gupta 	default:
545bdd2596dSAchin Gupta 		WARN("SPM: Unsupported call 0x%08x\n", smc_fid);
5460f14d02fSMax Shvetsov 		return spmd_spci_error_return(handle, SPCI_ERROR_NOT_SUPPORTED);
547bdd2596dSAchin Gupta 	}
548bdd2596dSAchin Gupta }
549