xref: /rk3399_ARM-atf/services/std_svc/spmd/spmd_main.c (revision 4ce3e99a336b74611349595ea7fd5ed0277c3eeb)
1bdd2596dSAchin Gupta /*
2cdb49d47SOlivier Deprez  * Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
3bdd2596dSAchin Gupta  *
4bdd2596dSAchin Gupta  * SPDX-License-Identifier: BSD-3-Clause
5bdd2596dSAchin Gupta  */
6bdd2596dSAchin Gupta 
7bdd2596dSAchin Gupta #include <assert.h>
8bdd2596dSAchin Gupta #include <errno.h>
9*4ce3e99aSScott Branden #include <inttypes.h>
10*4ce3e99aSScott Branden #include <stdint.h>
11bdd2596dSAchin Gupta #include <string.h>
12bdd2596dSAchin Gupta 
13bdd2596dSAchin Gupta #include <arch_helpers.h>
1452696946SOlivier Deprez #include <arch/aarch64/arch_features.h>
15bdd2596dSAchin Gupta #include <bl31/bl31.h>
16bdd2596dSAchin Gupta #include <common/debug.h>
17bdd2596dSAchin Gupta #include <common/runtime_svc.h>
18bdd2596dSAchin Gupta #include <lib/el3_runtime/context_mgmt.h>
19bdd2596dSAchin Gupta #include <lib/smccc.h>
20bdd2596dSAchin Gupta #include <lib/spinlock.h>
21bdd2596dSAchin Gupta #include <lib/utils.h>
22bdd2596dSAchin Gupta #include <plat/common/common_def.h>
23bdd2596dSAchin Gupta #include <plat/common/platform.h>
24bdd2596dSAchin Gupta #include <platform_def.h>
25662af36dSJ-Alves #include <services/ffa_svc.h>
26bdd2596dSAchin Gupta #include <services/spmd_svc.h>
27bdd2596dSAchin Gupta #include <smccc_helpers.h>
28bdd2596dSAchin Gupta #include "spmd_private.h"
29bdd2596dSAchin Gupta 
30bdd2596dSAchin Gupta /*******************************************************************************
31bdd2596dSAchin Gupta  * SPM Core context information.
32bdd2596dSAchin Gupta  ******************************************************************************/
3352696946SOlivier Deprez static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT];
34bdd2596dSAchin Gupta 
35bdd2596dSAchin Gupta /*******************************************************************************
36bdd2596dSAchin Gupta  * SPM Core attribute information read from its manifest.
37bdd2596dSAchin Gupta  ******************************************************************************/
3852696946SOlivier Deprez static spmc_manifest_attribute_t spmc_attrs;
390f14d02fSMax Shvetsov 
400f14d02fSMax Shvetsov /*******************************************************************************
410f14d02fSMax Shvetsov  * SPM Core entry point information. Discovered on the primary core and reused
420f14d02fSMax Shvetsov  * on secondary cores.
430f14d02fSMax Shvetsov  ******************************************************************************/
440f14d02fSMax Shvetsov static entry_point_info_t *spmc_ep_info;
450f14d02fSMax Shvetsov 
460f14d02fSMax Shvetsov /*******************************************************************************
4702d50bb0SOlivier Deprez  * SPM Core context on CPU based on mpidr.
4802d50bb0SOlivier Deprez  ******************************************************************************/
4902d50bb0SOlivier Deprez spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr)
5002d50bb0SOlivier Deprez {
51f7fb0bf7SMax Shvetsov 	int core_idx = plat_core_pos_by_mpidr(mpidr);
52f7fb0bf7SMax Shvetsov 
53f7fb0bf7SMax Shvetsov 	if (core_idx < 0) {
54*4ce3e99aSScott Branden 		ERROR("Invalid mpidr: %" PRIx64 ", returned ID: %d\n", mpidr, core_idx);
55f7fb0bf7SMax Shvetsov 		panic();
56f7fb0bf7SMax Shvetsov 	}
57f7fb0bf7SMax Shvetsov 
58f7fb0bf7SMax Shvetsov 	return &spm_core_context[core_idx];
5902d50bb0SOlivier Deprez }
6002d50bb0SOlivier Deprez 
6102d50bb0SOlivier Deprez /*******************************************************************************
6252696946SOlivier Deprez  * SPM Core context on current CPU get helper.
6352696946SOlivier Deprez  ******************************************************************************/
6452696946SOlivier Deprez spmd_spm_core_context_t *spmd_get_context(void)
6552696946SOlivier Deprez {
6602d50bb0SOlivier Deprez 	return spmd_get_context_by_mpidr(read_mpidr());
6752696946SOlivier Deprez }
6852696946SOlivier Deprez 
6952696946SOlivier Deprez /*******************************************************************************
70a92bc73bSOlivier Deprez  * SPM Core ID getter.
71a92bc73bSOlivier Deprez  ******************************************************************************/
72a92bc73bSOlivier Deprez uint16_t spmd_spmc_id_get(void)
73a92bc73bSOlivier Deprez {
74a92bc73bSOlivier Deprez 	return spmc_attrs.spmc_id;
75a92bc73bSOlivier Deprez }
76a92bc73bSOlivier Deprez 
77a92bc73bSOlivier Deprez /*******************************************************************************
780f14d02fSMax Shvetsov  * Static function declaration.
790f14d02fSMax Shvetsov  ******************************************************************************/
800f14d02fSMax Shvetsov static int32_t spmd_init(void);
8123d5ba86SOlivier Deprez static int spmd_spmc_init(void *pm_addr);
82662af36dSJ-Alves static uint64_t spmd_ffa_error_return(void *handle,
8352696946SOlivier Deprez 				       int error_code);
8452696946SOlivier Deprez static uint64_t spmd_smc_forward(uint32_t smc_fid,
8552696946SOlivier Deprez 				 bool secure_origin,
8652696946SOlivier Deprez 				 uint64_t x1,
8752696946SOlivier Deprez 				 uint64_t x2,
8852696946SOlivier Deprez 				 uint64_t x3,
8952696946SOlivier Deprez 				 uint64_t x4,
9052696946SOlivier Deprez 				 void *handle);
91bdd2596dSAchin Gupta 
92bdd2596dSAchin Gupta /*******************************************************************************
9352696946SOlivier Deprez  * This function takes an SPMC context pointer and performs a synchronous
9452696946SOlivier Deprez  * SPMC entry.
95bdd2596dSAchin Gupta  ******************************************************************************/
96bdd2596dSAchin Gupta uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx)
97bdd2596dSAchin Gupta {
98bdd2596dSAchin Gupta 	uint64_t rc;
99bdd2596dSAchin Gupta 
100bdd2596dSAchin Gupta 	assert(spmc_ctx != NULL);
101bdd2596dSAchin Gupta 
102bdd2596dSAchin Gupta 	cm_set_context(&(spmc_ctx->cpu_ctx), SECURE);
103bdd2596dSAchin Gupta 
104bdd2596dSAchin Gupta 	/* Restore the context assigned above */
105033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
10628f39f02SMax Shvetsov 	cm_el2_sysregs_context_restore(SECURE);
107678ce223SOlivier Deprez #else
108678ce223SOlivier Deprez 	cm_el1_sysregs_context_restore(SECURE);
109033039f8SMax Shvetsov #endif
110bdd2596dSAchin Gupta 	cm_set_next_eret_context(SECURE);
111bdd2596dSAchin Gupta 
112033039f8SMax Shvetsov 	/* Enter SPMC */
113bdd2596dSAchin Gupta 	rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx);
114bdd2596dSAchin Gupta 
115bdd2596dSAchin Gupta 	/* Save secure state */
116033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
11728f39f02SMax Shvetsov 	cm_el2_sysregs_context_save(SECURE);
118678ce223SOlivier Deprez #else
119678ce223SOlivier Deprez 	cm_el1_sysregs_context_save(SECURE);
120033039f8SMax Shvetsov #endif
121bdd2596dSAchin Gupta 
122bdd2596dSAchin Gupta 	return rc;
123bdd2596dSAchin Gupta }
124bdd2596dSAchin Gupta 
125bdd2596dSAchin Gupta /*******************************************************************************
12652696946SOlivier Deprez  * This function returns to the place where spmd_spm_core_sync_entry() was
127bdd2596dSAchin Gupta  * called originally.
128bdd2596dSAchin Gupta  ******************************************************************************/
129bdd2596dSAchin Gupta __dead2 void spmd_spm_core_sync_exit(uint64_t rc)
130bdd2596dSAchin Gupta {
13152696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
132bdd2596dSAchin Gupta 
13352696946SOlivier Deprez 	/* Get current CPU context from SPMC context */
134bdd2596dSAchin Gupta 	assert(cm_get_context(SECURE) == &(ctx->cpu_ctx));
135bdd2596dSAchin Gupta 
136bdd2596dSAchin Gupta 	/*
137bdd2596dSAchin Gupta 	 * The SPMD must have initiated the original request through a
138bdd2596dSAchin Gupta 	 * synchronous entry into SPMC. Jump back to the original C runtime
139bdd2596dSAchin Gupta 	 * context with the value of rc in x0;
140bdd2596dSAchin Gupta 	 */
141bdd2596dSAchin Gupta 	spmd_spm_core_exit(ctx->c_rt_ctx, rc);
142bdd2596dSAchin Gupta 
143bdd2596dSAchin Gupta 	panic();
144bdd2596dSAchin Gupta }
145bdd2596dSAchin Gupta 
146bdd2596dSAchin Gupta /*******************************************************************************
14752696946SOlivier Deprez  * Jump to the SPM Core for the first time.
148bdd2596dSAchin Gupta  ******************************************************************************/
149bdd2596dSAchin Gupta static int32_t spmd_init(void)
150bdd2596dSAchin Gupta {
15152696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
15252696946SOlivier Deprez 	uint64_t rc;
153bdd2596dSAchin Gupta 
15452696946SOlivier Deprez 	VERBOSE("SPM Core init start.\n");
1559dcf63ddSOlivier Deprez 
156f2dcf418SOlivier Deprez 	/* Primary boot core enters the SPMC for initialization. */
157f2dcf418SOlivier Deprez 	ctx->state = SPMC_STATE_ON_PENDING;
158bdd2596dSAchin Gupta 
159bdd2596dSAchin Gupta 	rc = spmd_spm_core_sync_entry(ctx);
16052696946SOlivier Deprez 	if (rc != 0ULL) {
161*4ce3e99aSScott Branden 		ERROR("SPMC initialisation failed 0x%" PRIx64 "\n", rc);
16252696946SOlivier Deprez 		return 0;
163bdd2596dSAchin Gupta 	}
164bdd2596dSAchin Gupta 
1659dcf63ddSOlivier Deprez 	ctx->state = SPMC_STATE_ON;
1669dcf63ddSOlivier Deprez 
16752696946SOlivier Deprez 	VERBOSE("SPM Core init end.\n");
168bdd2596dSAchin Gupta 
169bdd2596dSAchin Gupta 	return 1;
170bdd2596dSAchin Gupta }
171bdd2596dSAchin Gupta 
172bdd2596dSAchin Gupta /*******************************************************************************
17352696946SOlivier Deprez  * Loads SPMC manifest and inits SPMC.
1740f14d02fSMax Shvetsov  ******************************************************************************/
17523d5ba86SOlivier Deprez static int spmd_spmc_init(void *pm_addr)
1760f14d02fSMax Shvetsov {
177f2dcf418SOlivier Deprez 	cpu_context_t *cpu_ctx;
178f2dcf418SOlivier Deprez 	unsigned int core_id;
1790f14d02fSMax Shvetsov 	uint32_t ep_attr;
18052696946SOlivier Deprez 	int rc;
1810f14d02fSMax Shvetsov 
18252696946SOlivier Deprez 	/* Load the SPM Core manifest */
18323d5ba86SOlivier Deprez 	rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr);
1840f14d02fSMax Shvetsov 	if (rc != 0) {
18552696946SOlivier Deprez 		WARN("No or invalid SPM Core manifest image provided by BL2\n");
18652696946SOlivier Deprez 		return rc;
1870f14d02fSMax Shvetsov 	}
1880f14d02fSMax Shvetsov 
1890f14d02fSMax Shvetsov 	/*
19052696946SOlivier Deprez 	 * Ensure that the SPM Core version is compatible with the SPM
19152696946SOlivier Deprez 	 * Dispatcher version.
1920f14d02fSMax Shvetsov 	 */
193662af36dSJ-Alves 	if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) ||
194662af36dSJ-Alves 	    (spmc_attrs.minor_version > FFA_VERSION_MINOR)) {
195662af36dSJ-Alves 		WARN("Unsupported FFA version (%u.%u)\n",
1960f14d02fSMax Shvetsov 		     spmc_attrs.major_version, spmc_attrs.minor_version);
19752696946SOlivier Deprez 		return -EINVAL;
1980f14d02fSMax Shvetsov 	}
1990f14d02fSMax Shvetsov 
200662af36dSJ-Alves 	VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version,
2010f14d02fSMax Shvetsov 	     spmc_attrs.minor_version);
2020f14d02fSMax Shvetsov 
20352696946SOlivier Deprez 	VERBOSE("SPM Core run time EL%x.\n",
204033039f8SMax Shvetsov 	     SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1);
2050f14d02fSMax Shvetsov 
206ac03ac5eSMax Shvetsov 	/* Validate the SPMC ID, Ensure high bit is set */
20752696946SOlivier Deprez 	if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) &
20852696946SOlivier Deprez 			SPMC_SECURE_ID_MASK) == 0U) {
20952696946SOlivier Deprez 		WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id);
21052696946SOlivier Deprez 		return -EINVAL;
211ac03ac5eSMax Shvetsov 	}
212ac03ac5eSMax Shvetsov 
21352696946SOlivier Deprez 	/* Validate the SPM Core execution state */
2140f14d02fSMax Shvetsov 	if ((spmc_attrs.exec_state != MODE_RW_64) &&
2150f14d02fSMax Shvetsov 	    (spmc_attrs.exec_state != MODE_RW_32)) {
21623d5ba86SOlivier Deprez 		WARN("Unsupported %s%x.\n", "SPM Core execution state 0x",
2170f14d02fSMax Shvetsov 		     spmc_attrs.exec_state);
21852696946SOlivier Deprez 		return -EINVAL;
2190f14d02fSMax Shvetsov 	}
2200f14d02fSMax Shvetsov 
22123d5ba86SOlivier Deprez 	VERBOSE("%s%x.\n", "SPM Core execution state 0x",
22223d5ba86SOlivier Deprez 		spmc_attrs.exec_state);
2230f14d02fSMax Shvetsov 
224033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
225033039f8SMax Shvetsov 	/* Ensure manifest has not requested AArch32 state in S-EL2 */
226033039f8SMax Shvetsov 	if (spmc_attrs.exec_state == MODE_RW_32) {
227033039f8SMax Shvetsov 		WARN("AArch32 state at S-EL2 is not supported.\n");
22852696946SOlivier Deprez 		return -EINVAL;
2290f14d02fSMax Shvetsov 	}
2300f14d02fSMax Shvetsov 
2310f14d02fSMax Shvetsov 	/*
2320f14d02fSMax Shvetsov 	 * Check if S-EL2 is supported on this system if S-EL2
2330f14d02fSMax Shvetsov 	 * is required for SPM
2340f14d02fSMax Shvetsov 	 */
23552696946SOlivier Deprez 	if (!is_armv8_4_sel2_present()) {
23652696946SOlivier Deprez 		WARN("SPM Core run time S-EL2 is not supported.\n");
23752696946SOlivier Deprez 		return -EINVAL;
2380f14d02fSMax Shvetsov 	}
239033039f8SMax Shvetsov #endif /* SPMD_SPM_AT_SEL2 */
2400f14d02fSMax Shvetsov 
2410f14d02fSMax Shvetsov 	/* Initialise an entrypoint to set up the CPU context */
2420f14d02fSMax Shvetsov 	ep_attr = SECURE | EP_ST_ENABLE;
24352696946SOlivier Deprez 	if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) {
2440f14d02fSMax Shvetsov 		ep_attr |= EP_EE_BIG;
2450f14d02fSMax Shvetsov 	}
2460f14d02fSMax Shvetsov 
2470f14d02fSMax Shvetsov 	SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr);
2480f14d02fSMax Shvetsov 
2490f14d02fSMax Shvetsov 	/*
25052696946SOlivier Deprez 	 * Populate SPSR for SPM Core based upon validated parameters from the
25152696946SOlivier Deprez 	 * manifest.
2520f14d02fSMax Shvetsov 	 */
2530f14d02fSMax Shvetsov 	if (spmc_attrs.exec_state == MODE_RW_32) {
2540f14d02fSMax Shvetsov 		spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
2550f14d02fSMax Shvetsov 						 SPSR_E_LITTLE,
2560f14d02fSMax Shvetsov 						 DAIF_FIQ_BIT |
2570f14d02fSMax Shvetsov 						 DAIF_IRQ_BIT |
2580f14d02fSMax Shvetsov 						 DAIF_ABT_BIT);
2590f14d02fSMax Shvetsov 	} else {
260033039f8SMax Shvetsov 
261033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
262033039f8SMax Shvetsov 		static const uint32_t runtime_el = MODE_EL2;
263033039f8SMax Shvetsov #else
264033039f8SMax Shvetsov 		static const uint32_t runtime_el = MODE_EL1;
265033039f8SMax Shvetsov #endif
266033039f8SMax Shvetsov 		spmc_ep_info->spsr = SPSR_64(runtime_el,
2670f14d02fSMax Shvetsov 					     MODE_SP_ELX,
2680f14d02fSMax Shvetsov 					     DISABLE_ALL_EXCEPTIONS);
2690f14d02fSMax Shvetsov 	}
2700f14d02fSMax Shvetsov 
271f2dcf418SOlivier Deprez 	/* Set an initial SPMC context state for all cores. */
272f2dcf418SOlivier Deprez 	for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) {
273f2dcf418SOlivier Deprez 		spm_core_context[core_id].state = SPMC_STATE_OFF;
2740f14d02fSMax Shvetsov 
275f2dcf418SOlivier Deprez 		/* Setup an initial cpu context for the SPMC. */
276f2dcf418SOlivier Deprez 		cpu_ctx = &spm_core_context[core_id].cpu_ctx;
277f2dcf418SOlivier Deprez 		cm_setup_context(cpu_ctx, spmc_ep_info);
2780f14d02fSMax Shvetsov 
279f2dcf418SOlivier Deprez 		/*
280f2dcf418SOlivier Deprez 		 * Pass the core linear ID to the SPMC through x4.
281f2dcf418SOlivier Deprez 		 * (TF-A implementation defined behavior helping
282f2dcf418SOlivier Deprez 		 * a legacy TOS migration to adopt FF-A).
283f2dcf418SOlivier Deprez 		 */
284f2dcf418SOlivier Deprez 		write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X4, core_id);
285f2dcf418SOlivier Deprez 	}
2860f14d02fSMax Shvetsov 
287a334c4e6SOlivier Deprez 	/* Register power management hooks with PSCI */
288a334c4e6SOlivier Deprez 	psci_register_spd_pm_hook(&spmd_pm);
289a334c4e6SOlivier Deprez 
2900f14d02fSMax Shvetsov 	/* Register init function for deferred init. */
2910f14d02fSMax Shvetsov 	bl31_register_bl32_init(&spmd_init);
2920f14d02fSMax Shvetsov 
293f2dcf418SOlivier Deprez 	INFO("SPM Core setup done.\n");
294f2dcf418SOlivier Deprez 
2950f14d02fSMax Shvetsov 	return 0;
2960f14d02fSMax Shvetsov }
2970f14d02fSMax Shvetsov 
2980f14d02fSMax Shvetsov /*******************************************************************************
29952696946SOlivier Deprez  * Initialize context of SPM Core.
300bdd2596dSAchin Gupta  ******************************************************************************/
3010f14d02fSMax Shvetsov int spmd_setup(void)
302bdd2596dSAchin Gupta {
30323d5ba86SOlivier Deprez 	void *spmc_manifest;
304bdd2596dSAchin Gupta 	int rc;
305bdd2596dSAchin Gupta 
306bdd2596dSAchin Gupta 	spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
30752696946SOlivier Deprez 	if (spmc_ep_info == NULL) {
30852696946SOlivier Deprez 		WARN("No SPM Core image provided by BL2 boot loader.\n");
30952696946SOlivier Deprez 		return -EINVAL;
310bdd2596dSAchin Gupta 	}
311bdd2596dSAchin Gupta 
312bdd2596dSAchin Gupta 	/* Under no circumstances will this parameter be 0 */
31352696946SOlivier Deprez 	assert(spmc_ep_info->pc != 0ULL);
314bdd2596dSAchin Gupta 
315bdd2596dSAchin Gupta 	/*
316bdd2596dSAchin Gupta 	 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will
31752696946SOlivier Deprez 	 * be used as a manifest for the SPM Core at the next lower EL/mode.
318bdd2596dSAchin Gupta 	 */
31923d5ba86SOlivier Deprez 	spmc_manifest = (void *)spmc_ep_info->args.arg0;
32023d5ba86SOlivier Deprez 	if (spmc_manifest == NULL) {
32123d5ba86SOlivier Deprez 		ERROR("Invalid or absent SPM Core manifest.\n");
32223d5ba86SOlivier Deprez 		return -EINVAL;
323bdd2596dSAchin Gupta 	}
324bdd2596dSAchin Gupta 
3250f14d02fSMax Shvetsov 	/* Load manifest, init SPMC */
32623d5ba86SOlivier Deprez 	rc = spmd_spmc_init(spmc_manifest);
3270f14d02fSMax Shvetsov 	if (rc != 0) {
32852696946SOlivier Deprez 		WARN("Booting device without SPM initialization.\n");
329bdd2596dSAchin Gupta 	}
330bdd2596dSAchin Gupta 
3310f14d02fSMax Shvetsov 	return rc;
3320f14d02fSMax Shvetsov }
3330f14d02fSMax Shvetsov 
3340f14d02fSMax Shvetsov /*******************************************************************************
3350f14d02fSMax Shvetsov  * Forward SMC to the other security state
3360f14d02fSMax Shvetsov  ******************************************************************************/
33752696946SOlivier Deprez static uint64_t spmd_smc_forward(uint32_t smc_fid,
33852696946SOlivier Deprez 				 bool secure_origin,
33952696946SOlivier Deprez 				 uint64_t x1,
34052696946SOlivier Deprez 				 uint64_t x2,
34152696946SOlivier Deprez 				 uint64_t x3,
34252696946SOlivier Deprez 				 uint64_t x4,
34352696946SOlivier Deprez 				 void *handle)
3440f14d02fSMax Shvetsov {
345c2901419SOlivier Deprez 	unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE;
346c2901419SOlivier Deprez 	unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE;
34793ff138bSOlivier Deprez 
3480f14d02fSMax Shvetsov 	/* Save incoming security state */
349033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
350678ce223SOlivier Deprez 	if (secure_state_in == NON_SECURE) {
351678ce223SOlivier Deprez 		cm_el1_sysregs_context_save(secure_state_in);
352678ce223SOlivier Deprez 	}
35393ff138bSOlivier Deprez 	cm_el2_sysregs_context_save(secure_state_in);
354678ce223SOlivier Deprez #else
355678ce223SOlivier Deprez 	cm_el1_sysregs_context_save(secure_state_in);
356033039f8SMax Shvetsov #endif
3570f14d02fSMax Shvetsov 
3580f14d02fSMax Shvetsov 	/* Restore outgoing security state */
359033039f8SMax Shvetsov #if SPMD_SPM_AT_SEL2
360678ce223SOlivier Deprez 	if (secure_state_out == NON_SECURE) {
361678ce223SOlivier Deprez 		cm_el1_sysregs_context_restore(secure_state_out);
362678ce223SOlivier Deprez 	}
36393ff138bSOlivier Deprez 	cm_el2_sysregs_context_restore(secure_state_out);
364678ce223SOlivier Deprez #else
365678ce223SOlivier Deprez 	cm_el1_sysregs_context_restore(secure_state_out);
366033039f8SMax Shvetsov #endif
36793ff138bSOlivier Deprez 	cm_set_next_eret_context(secure_state_out);
3680f14d02fSMax Shvetsov 
36993ff138bSOlivier Deprez 	SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4,
3700f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X5),
3710f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X6),
3720f14d02fSMax Shvetsov 			SMC_GET_GP(handle, CTX_GPREG_X7));
3730f14d02fSMax Shvetsov }
3740f14d02fSMax Shvetsov 
3750f14d02fSMax Shvetsov /*******************************************************************************
376662af36dSJ-Alves  * Return FFA_ERROR with specified error code
3770f14d02fSMax Shvetsov  ******************************************************************************/
378662af36dSJ-Alves static uint64_t spmd_ffa_error_return(void *handle, int error_code)
3790f14d02fSMax Shvetsov {
380e46b2fd2SJ-Alves 	SMC_RET8(handle, (uint32_t) FFA_ERROR,
381e46b2fd2SJ-Alves 		 FFA_TARGET_INFO_MBZ, (uint32_t)error_code,
382662af36dSJ-Alves 		 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
383662af36dSJ-Alves 		 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
384bdd2596dSAchin Gupta }
385bdd2596dSAchin Gupta 
386f0d743dbSOlivier Deprez /*******************************************************************************
387f0d743dbSOlivier Deprez  * spmd_check_address_in_binary_image
388f0d743dbSOlivier Deprez  ******************************************************************************/
389f0d743dbSOlivier Deprez bool spmd_check_address_in_binary_image(uint64_t address)
390f0d743dbSOlivier Deprez {
391f0d743dbSOlivier Deprez 	assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size));
392f0d743dbSOlivier Deprez 
393f0d743dbSOlivier Deprez 	return ((address >= spmc_attrs.load_address) &&
394f0d743dbSOlivier Deprez 		(address < (spmc_attrs.load_address + spmc_attrs.binary_size)));
395f0d743dbSOlivier Deprez }
396f0d743dbSOlivier Deprez 
397c2901419SOlivier Deprez /******************************************************************************
398c2901419SOlivier Deprez  * spmd_is_spmc_message
399c2901419SOlivier Deprez  *****************************************************************************/
400c2901419SOlivier Deprez static bool spmd_is_spmc_message(unsigned int ep)
401c2901419SOlivier Deprez {
402c2901419SOlivier Deprez 	return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID)
403c2901419SOlivier Deprez 		&& (ffa_endpoint_source(ep) == spmc_attrs.spmc_id));
404c2901419SOlivier Deprez }
405c2901419SOlivier Deprez 
406f0d743dbSOlivier Deprez /******************************************************************************
407f0d743dbSOlivier Deprez  * spmd_handle_spmc_message
408f0d743dbSOlivier Deprez  *****************************************************************************/
409a92bc73bSOlivier Deprez static int spmd_handle_spmc_message(unsigned long long msg,
410a92bc73bSOlivier Deprez 		unsigned long long parm1, unsigned long long parm2,
411a92bc73bSOlivier Deprez 		unsigned long long parm3, unsigned long long parm4)
412f0d743dbSOlivier Deprez {
413f0d743dbSOlivier Deprez 	VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__,
414f0d743dbSOlivier Deprez 		msg, parm1, parm2, parm3, parm4);
415f0d743dbSOlivier Deprez 
416f0d743dbSOlivier Deprez 	return -EINVAL;
417f0d743dbSOlivier Deprez }
418f0d743dbSOlivier Deprez 
419bdd2596dSAchin Gupta /*******************************************************************************
420662af36dSJ-Alves  * This function handles all SMCs in the range reserved for FFA. Each call is
421bdd2596dSAchin Gupta  * either forwarded to the other security state or handled by the SPM dispatcher
422bdd2596dSAchin Gupta  ******************************************************************************/
42352696946SOlivier Deprez uint64_t spmd_smc_handler(uint32_t smc_fid,
42452696946SOlivier Deprez 			  uint64_t x1,
42552696946SOlivier Deprez 			  uint64_t x2,
42652696946SOlivier Deprez 			  uint64_t x3,
42752696946SOlivier Deprez 			  uint64_t x4,
42852696946SOlivier Deprez 			  void *cookie,
42952696946SOlivier Deprez 			  void *handle,
430bdd2596dSAchin Gupta 			  uint64_t flags)
431bdd2596dSAchin Gupta {
432cdb49d47SOlivier Deprez 	unsigned int linear_id = plat_my_core_pos();
43352696946SOlivier Deprez 	spmd_spm_core_context_t *ctx = spmd_get_context();
43493ff138bSOlivier Deprez 	bool secure_origin;
43593ff138bSOlivier Deprez 	int32_t ret;
4364388f28fSJ-Alves 	uint32_t input_version;
437bdd2596dSAchin Gupta 
438bdd2596dSAchin Gupta 	/* Determine which security state this SMC originated from */
43993ff138bSOlivier Deprez 	secure_origin = is_caller_secure(flags);
440bdd2596dSAchin Gupta 
441*4ce3e99aSScott Branden 	VERBOSE("SPM(%u): 0x%x 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64
442*4ce3e99aSScott Branden 		" 0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 "\n",
443cdb49d47SOlivier Deprez 		    linear_id, smc_fid, x1, x2, x3, x4,
444cdb49d47SOlivier Deprez 		    SMC_GET_GP(handle, CTX_GPREG_X5),
445bdd2596dSAchin Gupta 		    SMC_GET_GP(handle, CTX_GPREG_X6),
446bdd2596dSAchin Gupta 		    SMC_GET_GP(handle, CTX_GPREG_X7));
447bdd2596dSAchin Gupta 
448bdd2596dSAchin Gupta 	switch (smc_fid) {
449662af36dSJ-Alves 	case FFA_ERROR:
450bdd2596dSAchin Gupta 		/*
451bdd2596dSAchin Gupta 		 * Check if this is the first invocation of this interface on
45252696946SOlivier Deprez 		 * this CPU. If so, then indicate that the SPM Core initialised
453bdd2596dSAchin Gupta 		 * unsuccessfully.
454bdd2596dSAchin Gupta 		 */
4559dcf63ddSOlivier Deprez 		if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
456bdd2596dSAchin Gupta 			spmd_spm_core_sync_exit(x2);
4570f14d02fSMax Shvetsov 		}
458bdd2596dSAchin Gupta 
45993ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
4600f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
461bdd2596dSAchin Gupta 		break; /* not reached */
462bdd2596dSAchin Gupta 
463662af36dSJ-Alves 	case FFA_VERSION:
4644388f28fSJ-Alves 		input_version = (uint32_t)(0xFFFFFFFF & x1);
465bdd2596dSAchin Gupta 		/*
4664388f28fSJ-Alves 		 * If caller is secure and SPMC was initialized,
4674388f28fSJ-Alves 		 * return FFA_VERSION of SPMD.
4684388f28fSJ-Alves 		 * If caller is non secure and SPMC was initialized,
4694388f28fSJ-Alves 		 * return SPMC's version.
4704388f28fSJ-Alves 		 * Sanity check to "input_version".
471bdd2596dSAchin Gupta 		 */
4724388f28fSJ-Alves 		if ((input_version & FFA_VERSION_BIT31_MASK) ||
4734388f28fSJ-Alves 			(ctx->state == SPMC_STATE_RESET)) {
4744388f28fSJ-Alves 			ret = FFA_ERROR_NOT_SUPPORTED;
4754388f28fSJ-Alves 		} else if (!secure_origin) {
476e46b2fd2SJ-Alves 			ret = MAKE_FFA_VERSION(spmc_attrs.major_version,
477e46b2fd2SJ-Alves 					       spmc_attrs.minor_version);
4784388f28fSJ-Alves 		} else {
479e46b2fd2SJ-Alves 			ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR,
480e46b2fd2SJ-Alves 					       FFA_VERSION_MINOR);
4814388f28fSJ-Alves 		}
4824388f28fSJ-Alves 
483e46b2fd2SJ-Alves 		SMC_RET8(handle, (uint32_t)ret, FFA_TARGET_INFO_MBZ,
484e46b2fd2SJ-Alves 			 FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
485e46b2fd2SJ-Alves 			 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ);
486bdd2596dSAchin Gupta 		break; /* not reached */
487bdd2596dSAchin Gupta 
488662af36dSJ-Alves 	case FFA_FEATURES:
489bdd2596dSAchin Gupta 		/*
490bdd2596dSAchin Gupta 		 * This is an optional interface. Do the minimal checks and
49152696946SOlivier Deprez 		 * forward to SPM Core which will handle it if implemented.
492bdd2596dSAchin Gupta 		 */
493bdd2596dSAchin Gupta 
494bdd2596dSAchin Gupta 		/*
495662af36dSJ-Alves 		 * Check if x1 holds a valid FFA fid. This is an
496bdd2596dSAchin Gupta 		 * optimization.
497bdd2596dSAchin Gupta 		 */
498662af36dSJ-Alves 		if (!is_ffa_fid(x1)) {
499662af36dSJ-Alves 			return spmd_ffa_error_return(handle,
500662af36dSJ-Alves 						     FFA_ERROR_NOT_SUPPORTED);
5010f14d02fSMax Shvetsov 		}
502bdd2596dSAchin Gupta 
50352696946SOlivier Deprez 		/* Forward SMC from Normal world to the SPM Core */
50493ff138bSOlivier Deprez 		if (!secure_origin) {
50593ff138bSOlivier Deprez 			return spmd_smc_forward(smc_fid, secure_origin,
5060f14d02fSMax Shvetsov 						x1, x2, x3, x4, handle);
50752696946SOlivier Deprez 		}
50852696946SOlivier Deprez 
509bdd2596dSAchin Gupta 		/*
510bdd2596dSAchin Gupta 		 * Return success if call was from secure world i.e. all
511662af36dSJ-Alves 		 * FFA functions are supported. This is essentially a
512bdd2596dSAchin Gupta 		 * nop.
513bdd2596dSAchin Gupta 		 */
514662af36dSJ-Alves 		SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4,
515bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X5),
516bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X6),
517bdd2596dSAchin Gupta 			 SMC_GET_GP(handle, CTX_GPREG_X7));
5180f14d02fSMax Shvetsov 
519bdd2596dSAchin Gupta 		break; /* not reached */
520bdd2596dSAchin Gupta 
521662af36dSJ-Alves 	case FFA_ID_GET:
522ac03ac5eSMax Shvetsov 		/*
523662af36dSJ-Alves 		 * Returns the ID of the calling FFA component.
524ac03ac5eSMax Shvetsov 		 */
525ac03ac5eSMax Shvetsov 		if (!secure_origin) {
526662af36dSJ-Alves 			SMC_RET8(handle, FFA_SUCCESS_SMC32,
527662af36dSJ-Alves 				 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID,
528662af36dSJ-Alves 				 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
529662af36dSJ-Alves 				 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
530662af36dSJ-Alves 				 FFA_PARAM_MBZ);
53152696946SOlivier Deprez 		}
53252696946SOlivier Deprez 
533662af36dSJ-Alves 		SMC_RET8(handle, FFA_SUCCESS_SMC32,
534662af36dSJ-Alves 			 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
535662af36dSJ-Alves 			 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
536662af36dSJ-Alves 			 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
537662af36dSJ-Alves 			 FFA_PARAM_MBZ);
538ac03ac5eSMax Shvetsov 
539ac03ac5eSMax Shvetsov 		break; /* not reached */
540ac03ac5eSMax Shvetsov 
541cdb49d47SOlivier Deprez 	case FFA_SECONDARY_EP_REGISTER_SMC64:
542cdb49d47SOlivier Deprez 		if (secure_origin) {
543cdb49d47SOlivier Deprez 			ret = spmd_pm_secondary_ep_register(x1);
544cdb49d47SOlivier Deprez 
545cdb49d47SOlivier Deprez 			if (ret < 0) {
546cdb49d47SOlivier Deprez 				SMC_RET8(handle, FFA_ERROR_SMC64,
547cdb49d47SOlivier Deprez 					FFA_TARGET_INFO_MBZ, ret,
548cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ, FFA_PARAM_MBZ,
549cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ, FFA_PARAM_MBZ,
550cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ);
551cdb49d47SOlivier Deprez 			} else {
552cdb49d47SOlivier Deprez 				SMC_RET8(handle, FFA_SUCCESS_SMC64,
553cdb49d47SOlivier Deprez 					FFA_TARGET_INFO_MBZ, FFA_PARAM_MBZ,
554cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ, FFA_PARAM_MBZ,
555cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ, FFA_PARAM_MBZ,
556cdb49d47SOlivier Deprez 					FFA_PARAM_MBZ);
557cdb49d47SOlivier Deprez 			}
558cdb49d47SOlivier Deprez 		}
559cdb49d47SOlivier Deprez 
560cdb49d47SOlivier Deprez 		return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED);
561cdb49d47SOlivier Deprez 		break; /* Not reached */
562cdb49d47SOlivier Deprez 
56370c121a2SDaniel Boulby 	case FFA_SPM_ID_GET:
56470c121a2SDaniel Boulby 		if (MAKE_FFA_VERSION(1, 1) > FFA_VERSION_COMPILED) {
56570c121a2SDaniel Boulby 			return spmd_ffa_error_return(handle,
56670c121a2SDaniel Boulby 						     FFA_ERROR_NOT_SUPPORTED);
56770c121a2SDaniel Boulby 		}
56870c121a2SDaniel Boulby 		/*
56970c121a2SDaniel Boulby 		 * Returns the ID of the SPMC or SPMD depending on the FF-A
57070c121a2SDaniel Boulby 		 * instance where this function is invoked
57170c121a2SDaniel Boulby 		 */
57270c121a2SDaniel Boulby 		if (!secure_origin) {
57370c121a2SDaniel Boulby 			SMC_RET8(handle, FFA_SUCCESS_SMC32,
57470c121a2SDaniel Boulby 				 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
57570c121a2SDaniel Boulby 				 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
57670c121a2SDaniel Boulby 				 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
57770c121a2SDaniel Boulby 				 FFA_PARAM_MBZ);
57870c121a2SDaniel Boulby 		}
57970c121a2SDaniel Boulby 		SMC_RET8(handle, FFA_SUCCESS_SMC32,
58070c121a2SDaniel Boulby 			 FFA_TARGET_INFO_MBZ, SPMD_DIRECT_MSG_ENDPOINT_ID,
58170c121a2SDaniel Boulby 			 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
58270c121a2SDaniel Boulby 			 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
58370c121a2SDaniel Boulby 			 FFA_PARAM_MBZ);
58470c121a2SDaniel Boulby 
58570c121a2SDaniel Boulby 		break; /* not reached */
58670c121a2SDaniel Boulby 
587f0d743dbSOlivier Deprez 	case FFA_MSG_SEND_DIRECT_REQ_SMC32:
588f0d743dbSOlivier Deprez 		if (secure_origin && spmd_is_spmc_message(x1)) {
589f0d743dbSOlivier Deprez 			ret = spmd_handle_spmc_message(x3, x4,
590f0d743dbSOlivier Deprez 				SMC_GET_GP(handle, CTX_GPREG_X5),
591f0d743dbSOlivier Deprez 				SMC_GET_GP(handle, CTX_GPREG_X6),
592f0d743dbSOlivier Deprez 				SMC_GET_GP(handle, CTX_GPREG_X7));
593f0d743dbSOlivier Deprez 
594f0d743dbSOlivier Deprez 			SMC_RET8(handle, FFA_SUCCESS_SMC32,
595f0d743dbSOlivier Deprez 				FFA_TARGET_INFO_MBZ, ret,
596f0d743dbSOlivier Deprez 				FFA_PARAM_MBZ, FFA_PARAM_MBZ,
597f0d743dbSOlivier Deprez 				FFA_PARAM_MBZ, FFA_PARAM_MBZ,
598f0d743dbSOlivier Deprez 				FFA_PARAM_MBZ);
599f0d743dbSOlivier Deprez 		} else {
600f0d743dbSOlivier Deprez 			/* Forward direct message to the other world */
601f0d743dbSOlivier Deprez 			return spmd_smc_forward(smc_fid, secure_origin,
602f0d743dbSOlivier Deprez 				x1, x2, x3, x4, handle);
603f0d743dbSOlivier Deprez 		}
604f0d743dbSOlivier Deprez 		break; /* Not reached */
605f0d743dbSOlivier Deprez 
606f0d743dbSOlivier Deprez 	case FFA_MSG_SEND_DIRECT_RESP_SMC32:
607f0d743dbSOlivier Deprez 		if (secure_origin && spmd_is_spmc_message(x1)) {
608f0d743dbSOlivier Deprez 			spmd_spm_core_sync_exit(0);
609f0d743dbSOlivier Deprez 		} else {
610f0d743dbSOlivier Deprez 			/* Forward direct message to the other world */
611f0d743dbSOlivier Deprez 			return spmd_smc_forward(smc_fid, secure_origin,
612f0d743dbSOlivier Deprez 				x1, x2, x3, x4, handle);
613f0d743dbSOlivier Deprez 		}
614f0d743dbSOlivier Deprez 		break; /* Not reached */
615f0d743dbSOlivier Deprez 
616662af36dSJ-Alves 	case FFA_RX_RELEASE:
617662af36dSJ-Alves 	case FFA_RXTX_MAP_SMC32:
618662af36dSJ-Alves 	case FFA_RXTX_MAP_SMC64:
619662af36dSJ-Alves 	case FFA_RXTX_UNMAP:
620545b8eb3SRuari Phipps 	case FFA_PARTITION_INFO_GET:
621fc3f4800SJ-Alves #if MAKE_FFA_VERSION(1, 1) <= FFA_VERSION_COMPILED
622fc3f4800SJ-Alves 	case FFA_NOTIFICATION_BITMAP_CREATE:
623fc3f4800SJ-Alves 	case FFA_NOTIFICATION_BITMAP_DESTROY:
624fc3f4800SJ-Alves 	case FFA_NOTIFICATION_BIND:
625fc3f4800SJ-Alves 	case FFA_NOTIFICATION_UNBIND:
626fc3f4800SJ-Alves 	case FFA_NOTIFICATION_SET:
627fc3f4800SJ-Alves 	case FFA_NOTIFICATION_GET:
628fc3f4800SJ-Alves 	case FFA_NOTIFICATION_INFO_GET:
629fc3f4800SJ-Alves 	case FFA_NOTIFICATION_INFO_GET_SMC64:
630fc3f4800SJ-Alves #endif
631545b8eb3SRuari Phipps 		/*
632fc3f4800SJ-Alves 		 * Above calls should not be forwarded from Secure world to
633fc3f4800SJ-Alves 		 * Normal world.
634545b8eb3SRuari Phipps 		 *
635545b8eb3SRuari Phipps 		 * Fall through to forward the call to the other world
636545b8eb3SRuari Phipps 		 */
637662af36dSJ-Alves 	case FFA_MSG_RUN:
638bdd2596dSAchin Gupta 		/* This interface must be invoked only by the Normal world */
639545b8eb3SRuari Phipps 
64093ff138bSOlivier Deprez 		if (secure_origin) {
641662af36dSJ-Alves 			return spmd_ffa_error_return(handle,
642662af36dSJ-Alves 						     FFA_ERROR_NOT_SUPPORTED);
643bdd2596dSAchin Gupta 		}
644bdd2596dSAchin Gupta 
645bdd2596dSAchin Gupta 		/* Fall through to forward the call to the other world */
646662af36dSJ-Alves 	case FFA_MSG_SEND:
647662af36dSJ-Alves 	case FFA_MSG_SEND_DIRECT_REQ_SMC64:
648662af36dSJ-Alves 	case FFA_MSG_SEND_DIRECT_RESP_SMC64:
649662af36dSJ-Alves 	case FFA_MEM_DONATE_SMC32:
650662af36dSJ-Alves 	case FFA_MEM_DONATE_SMC64:
651662af36dSJ-Alves 	case FFA_MEM_LEND_SMC32:
652662af36dSJ-Alves 	case FFA_MEM_LEND_SMC64:
653662af36dSJ-Alves 	case FFA_MEM_SHARE_SMC32:
654662af36dSJ-Alves 	case FFA_MEM_SHARE_SMC64:
655662af36dSJ-Alves 	case FFA_MEM_RETRIEVE_REQ_SMC32:
656662af36dSJ-Alves 	case FFA_MEM_RETRIEVE_REQ_SMC64:
657662af36dSJ-Alves 	case FFA_MEM_RETRIEVE_RESP:
658662af36dSJ-Alves 	case FFA_MEM_RELINQUISH:
659662af36dSJ-Alves 	case FFA_MEM_RECLAIM:
660662af36dSJ-Alves 	case FFA_SUCCESS_SMC32:
661662af36dSJ-Alves 	case FFA_SUCCESS_SMC64:
662bdd2596dSAchin Gupta 		/*
663bdd2596dSAchin Gupta 		 * TODO: Assume that no requests originate from EL3 at the
664bdd2596dSAchin Gupta 		 * moment. This will change if a SP service is required in
665bdd2596dSAchin Gupta 		 * response to secure interrupts targeted to EL3. Until then
666bdd2596dSAchin Gupta 		 * simply forward the call to the Normal world.
667bdd2596dSAchin Gupta 		 */
668bdd2596dSAchin Gupta 
66993ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
6700f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
671bdd2596dSAchin Gupta 		break; /* not reached */
672bdd2596dSAchin Gupta 
673662af36dSJ-Alves 	case FFA_MSG_WAIT:
674bdd2596dSAchin Gupta 		/*
675bdd2596dSAchin Gupta 		 * Check if this is the first invocation of this interface on
676bdd2596dSAchin Gupta 		 * this CPU from the Secure world. If so, then indicate that the
67752696946SOlivier Deprez 		 * SPM Core initialised successfully.
678bdd2596dSAchin Gupta 		 */
6799dcf63ddSOlivier Deprez 		if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
680bdd2596dSAchin Gupta 			spmd_spm_core_sync_exit(0);
681bdd2596dSAchin Gupta 		}
682bdd2596dSAchin Gupta 
6830f14d02fSMax Shvetsov 		/* Fall through to forward the call to the other world */
684386dc365SOlivier Deprez 	case FFA_INTERRUPT:
685662af36dSJ-Alves 	case FFA_MSG_YIELD:
686bdd2596dSAchin Gupta 		/* This interface must be invoked only by the Secure world */
68793ff138bSOlivier Deprez 		if (!secure_origin) {
688662af36dSJ-Alves 			return spmd_ffa_error_return(handle,
689662af36dSJ-Alves 						      FFA_ERROR_NOT_SUPPORTED);
690bdd2596dSAchin Gupta 		}
691bdd2596dSAchin Gupta 
69293ff138bSOlivier Deprez 		return spmd_smc_forward(smc_fid, secure_origin,
6930f14d02fSMax Shvetsov 					x1, x2, x3, x4, handle);
694bdd2596dSAchin Gupta 		break; /* not reached */
695bdd2596dSAchin Gupta 
696bdd2596dSAchin Gupta 	default:
697bdd2596dSAchin Gupta 		WARN("SPM: Unsupported call 0x%08x\n", smc_fid);
698662af36dSJ-Alves 		return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED);
699bdd2596dSAchin Gupta 	}
700bdd2596dSAchin Gupta }
701