11d0ca40eSJavier Almansa Sobrino /* 2*8b3a89faSSona Mathew * Copyright (c) 2022-2025, Arm Limited. All rights reserved. 31d0ca40eSJavier Almansa Sobrino * 41d0ca40eSJavier Almansa Sobrino * SPDX-License-Identifier: BSD-3-Clause 51d0ca40eSJavier Almansa Sobrino */ 61d0ca40eSJavier Almansa Sobrino 71d0ca40eSJavier Almansa Sobrino 81d0ca40eSJavier Almansa Sobrino #include <plat/common/platform.h> 91d0ca40eSJavier Almansa Sobrino #include <services/rmmd_svc.h> 101d0ca40eSJavier Almansa Sobrino #include "trp_private.h" 111d0ca40eSJavier Almansa Sobrino 121d0ca40eSJavier Almansa Sobrino /* 131d0ca40eSJavier Almansa Sobrino * Per cpu data structure to populate parameters for an SMC in C code and use 141d0ca40eSJavier Almansa Sobrino * a pointer to this structure in assembler code to populate x0-x7 151d0ca40eSJavier Almansa Sobrino */ 161d0ca40eSJavier Almansa Sobrino static trp_args_t trp_smc_args[PLATFORM_CORE_COUNT]; 171d0ca40eSJavier Almansa Sobrino 181d0ca40eSJavier Almansa Sobrino /* 191d0ca40eSJavier Almansa Sobrino * Set the arguments for SMC call 201d0ca40eSJavier Almansa Sobrino */ 211d0ca40eSJavier Almansa Sobrino trp_args_t *set_smc_args(uint64_t arg0, 221d0ca40eSJavier Almansa Sobrino uint64_t arg1, 231d0ca40eSJavier Almansa Sobrino uint64_t arg2, 241d0ca40eSJavier Almansa Sobrino uint64_t arg3, 251d0ca40eSJavier Almansa Sobrino uint64_t arg4, 261d0ca40eSJavier Almansa Sobrino uint64_t arg5, 271d0ca40eSJavier Almansa Sobrino uint64_t arg6, 28*8b3a89faSSona Mathew uint64_t arg7, 29*8b3a89faSSona Mathew uint64_t arg8, 30*8b3a89faSSona Mathew uint64_t arg9, 31*8b3a89faSSona Mathew uint64_t arg10, 32*8b3a89faSSona Mathew uint64_t arg11) 331d0ca40eSJavier Almansa Sobrino { 341d0ca40eSJavier Almansa Sobrino uint32_t linear_id; 351d0ca40eSJavier Almansa Sobrino trp_args_t *pcpu_smc_args; 361d0ca40eSJavier Almansa Sobrino 371d0ca40eSJavier Almansa Sobrino /* 381d0ca40eSJavier Almansa Sobrino * Return to Secure Monitor by raising an SMC. The results of the 391d0ca40eSJavier Almansa Sobrino * service are passed as an arguments to the SMC 401d0ca40eSJavier Almansa Sobrino */ 411d0ca40eSJavier Almansa Sobrino linear_id = plat_my_core_pos(); 421d0ca40eSJavier Almansa Sobrino pcpu_smc_args = &trp_smc_args[linear_id]; 431d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG0, arg0); 441d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG1, arg1); 451d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG2, arg2); 461d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG3, arg3); 471d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG4, arg4); 481d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG5, arg5); 491d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG6, arg6); 501d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG7, arg7); 51*8b3a89faSSona Mathew write_trp_arg(pcpu_smc_args, TRP_ARG8, arg8); 52*8b3a89faSSona Mathew write_trp_arg(pcpu_smc_args, TRP_ARG9, arg9); 53*8b3a89faSSona Mathew write_trp_arg(pcpu_smc_args, TRP_ARG10, arg10); 54*8b3a89faSSona Mathew write_trp_arg(pcpu_smc_args, TRP_ARG11, arg11); 551d0ca40eSJavier Almansa Sobrino 561d0ca40eSJavier Almansa Sobrino return pcpu_smc_args; 571d0ca40eSJavier Almansa Sobrino } 581d0ca40eSJavier Almansa Sobrino 591d0ca40eSJavier Almansa Sobrino /* 601d0ca40eSJavier Almansa Sobrino * Abort the boot process with the reason given in err. 611d0ca40eSJavier Almansa Sobrino */ 621d0ca40eSJavier Almansa Sobrino __dead2 void trp_boot_abort(uint64_t err) 631d0ca40eSJavier Almansa Sobrino { 64*8b3a89faSSona Mathew (void)trp_smc(set_smc_args(RMM_BOOT_COMPLETE, err, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)); 651d0ca40eSJavier Almansa Sobrino panic(); 661d0ca40eSJavier Almansa Sobrino } 67