1*1d0ca40eSJavier Almansa Sobrino /* 2*1d0ca40eSJavier Almansa Sobrino * Copyright (c) 2022, Arm Limited. All rights reserved. 3*1d0ca40eSJavier Almansa Sobrino * 4*1d0ca40eSJavier Almansa Sobrino * SPDX-License-Identifier: BSD-3-Clause 5*1d0ca40eSJavier Almansa Sobrino */ 6*1d0ca40eSJavier Almansa Sobrino 7*1d0ca40eSJavier Almansa Sobrino 8*1d0ca40eSJavier Almansa Sobrino #include <plat/common/platform.h> 9*1d0ca40eSJavier Almansa Sobrino #include <services/rmmd_svc.h> 10*1d0ca40eSJavier Almansa Sobrino #include "trp_private.h" 11*1d0ca40eSJavier Almansa Sobrino 12*1d0ca40eSJavier Almansa Sobrino /* 13*1d0ca40eSJavier Almansa Sobrino * Per cpu data structure to populate parameters for an SMC in C code and use 14*1d0ca40eSJavier Almansa Sobrino * a pointer to this structure in assembler code to populate x0-x7 15*1d0ca40eSJavier Almansa Sobrino */ 16*1d0ca40eSJavier Almansa Sobrino static trp_args_t trp_smc_args[PLATFORM_CORE_COUNT]; 17*1d0ca40eSJavier Almansa Sobrino 18*1d0ca40eSJavier Almansa Sobrino /* 19*1d0ca40eSJavier Almansa Sobrino * Set the arguments for SMC call 20*1d0ca40eSJavier Almansa Sobrino */ 21*1d0ca40eSJavier Almansa Sobrino trp_args_t *set_smc_args(uint64_t arg0, 22*1d0ca40eSJavier Almansa Sobrino uint64_t arg1, 23*1d0ca40eSJavier Almansa Sobrino uint64_t arg2, 24*1d0ca40eSJavier Almansa Sobrino uint64_t arg3, 25*1d0ca40eSJavier Almansa Sobrino uint64_t arg4, 26*1d0ca40eSJavier Almansa Sobrino uint64_t arg5, 27*1d0ca40eSJavier Almansa Sobrino uint64_t arg6, 28*1d0ca40eSJavier Almansa Sobrino uint64_t arg7) 29*1d0ca40eSJavier Almansa Sobrino { 30*1d0ca40eSJavier Almansa Sobrino uint32_t linear_id; 31*1d0ca40eSJavier Almansa Sobrino trp_args_t *pcpu_smc_args; 32*1d0ca40eSJavier Almansa Sobrino 33*1d0ca40eSJavier Almansa Sobrino /* 34*1d0ca40eSJavier Almansa Sobrino * Return to Secure Monitor by raising an SMC. The results of the 35*1d0ca40eSJavier Almansa Sobrino * service are passed as an arguments to the SMC 36*1d0ca40eSJavier Almansa Sobrino */ 37*1d0ca40eSJavier Almansa Sobrino linear_id = plat_my_core_pos(); 38*1d0ca40eSJavier Almansa Sobrino pcpu_smc_args = &trp_smc_args[linear_id]; 39*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG0, arg0); 40*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG1, arg1); 41*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG2, arg2); 42*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG3, arg3); 43*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG4, arg4); 44*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG5, arg5); 45*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG6, arg6); 46*1d0ca40eSJavier Almansa Sobrino write_trp_arg(pcpu_smc_args, TRP_ARG7, arg7); 47*1d0ca40eSJavier Almansa Sobrino 48*1d0ca40eSJavier Almansa Sobrino return pcpu_smc_args; 49*1d0ca40eSJavier Almansa Sobrino } 50*1d0ca40eSJavier Almansa Sobrino 51*1d0ca40eSJavier Almansa Sobrino /* 52*1d0ca40eSJavier Almansa Sobrino * Abort the boot process with the reason given in err. 53*1d0ca40eSJavier Almansa Sobrino */ 54*1d0ca40eSJavier Almansa Sobrino __dead2 void trp_boot_abort(uint64_t err) 55*1d0ca40eSJavier Almansa Sobrino { 56*1d0ca40eSJavier Almansa Sobrino (void)trp_smc(set_smc_args(RMM_BOOT_COMPLETE, err, 0, 0, 0, 0, 0, 0)); 57*1d0ca40eSJavier Almansa Sobrino panic(); 58*1d0ca40eSJavier Almansa Sobrino } 59