150a3056aSZelalem Aweke/* 2*8b3a89faSSona Mathew * Copyright (c) 2021-2025, Arm Limited. All rights reserved. 350a3056aSZelalem Aweke * 450a3056aSZelalem Aweke * SPDX-License-Identifier: BSD-3-Clause 550a3056aSZelalem Aweke */ 650a3056aSZelalem Aweke 750a3056aSZelalem Aweke#include <asm_macros.S> 8319fb084SSoby Mathew#include <services/rmmd_svc.h> 98c980a4aSJavier Almansa Sobrino 108c980a4aSJavier Almansa Sobrino#include <platform_def.h> 1150a3056aSZelalem Aweke#include "trp_private.h" 1250a3056aSZelalem Aweke 1350a3056aSZelalem Aweke.global trp_head 1450a3056aSZelalem Aweke.global trp_smc 1550a3056aSZelalem Aweke 1650a3056aSZelalem Aweke.section ".head.text", "ax" 1750a3056aSZelalem Aweke 1850a3056aSZelalem Aweke /* --------------------------------------------- 1950a3056aSZelalem Aweke * Populate the params in x0-x7 from the pointer 2050a3056aSZelalem Aweke * to the smc args structure in x0. 2150a3056aSZelalem Aweke * --------------------------------------------- 2250a3056aSZelalem Aweke */ 2350a3056aSZelalem Aweke .macro restore_args_call_smc 24*8b3a89faSSona Mathew ldp x10, x11, [x0, #TRP_ARG10] 25*8b3a89faSSona Mathew ldp x8, x9, [x0, #TRP_ARG8] 2650a3056aSZelalem Aweke ldp x6, x7, [x0, #TRP_ARG6] 2750a3056aSZelalem Aweke ldp x4, x5, [x0, #TRP_ARG4] 2850a3056aSZelalem Aweke ldp x2, x3, [x0, #TRP_ARG2] 2950a3056aSZelalem Aweke ldp x0, x1, [x0, #TRP_ARG0] 3050a3056aSZelalem Aweke smc #0 3150a3056aSZelalem Aweke .endm 3250a3056aSZelalem Aweke 3350a3056aSZelalem Aweke /* --------------------------------------------- 3450a3056aSZelalem Aweke * Entry point for TRP 3550a3056aSZelalem Aweke * --------------------------------------------- 3650a3056aSZelalem Aweke */ 3750a3056aSZelalem Aweketrp_head: 388c980a4aSJavier Almansa Sobrino /* 398c980a4aSJavier Almansa Sobrino * Stash arguments from previous boot stage 408c980a4aSJavier Almansa Sobrino */ 418c980a4aSJavier Almansa Sobrino mov x20, x0 428c980a4aSJavier Almansa Sobrino mov x21, x1 438c980a4aSJavier Almansa Sobrino mov x22, x2 448c980a4aSJavier Almansa Sobrino mov x23, x3 458c980a4aSJavier Almansa Sobrino 468c980a4aSJavier Almansa Sobrino /* 478c980a4aSJavier Almansa Sobrino * Validate CPUId before allocating a stack. 488c980a4aSJavier Almansa Sobrino */ 498c980a4aSJavier Almansa Sobrino cmp x20, #PLATFORM_CORE_COUNT 508c980a4aSJavier Almansa Sobrino b.lo 1f 518c980a4aSJavier Almansa Sobrino 528c980a4aSJavier Almansa Sobrino mov_imm x0, RMM_BOOT_COMPLETE 538c980a4aSJavier Almansa Sobrino mov_imm x1, E_RMM_BOOT_CPU_ID_OUT_OF_RANGE 548c980a4aSJavier Almansa Sobrino smc #0 558c980a4aSJavier Almansa Sobrino 568c980a4aSJavier Almansa Sobrino /* EL3 should never return back here, so panic if it does */ 578c980a4aSJavier Almansa Sobrino b trp_panic 588c980a4aSJavier Almansa Sobrino 598c980a4aSJavier Almansa Sobrino1: 6050a3056aSZelalem Aweke bl plat_set_my_stack 6100e81131SMark Dykes 6200e81131SMark Dykes /* 6300e81131SMark Dykes * Find out whether this is a cold or warm boot 6400e81131SMark Dykes */ 6500e81131SMark Dykes ldr x1, cold_boot_flag 6600e81131SMark Dykes cbz x1, warm_boot 6700e81131SMark Dykes 6800e81131SMark Dykes /* 6900e81131SMark Dykes * Update cold boot flag to indicate cold boot is done 7000e81131SMark Dykes */ 7100e81131SMark Dykes adr x2, cold_boot_flag 7200e81131SMark Dykes str xzr, [x2] 7300e81131SMark Dykes 7450a3056aSZelalem Aweke /* --------------------------------------------- 7550a3056aSZelalem Aweke * Zero out BSS section 7650a3056aSZelalem Aweke * --------------------------------------------- 7750a3056aSZelalem Aweke */ 7850a3056aSZelalem Aweke ldr x0, =__BSS_START__ 7950a3056aSZelalem Aweke ldr x1, =__BSS_SIZE__ 8050a3056aSZelalem Aweke bl zeromem 8150a3056aSZelalem Aweke 828c980a4aSJavier Almansa Sobrino mov x0, x20 838c980a4aSJavier Almansa Sobrino mov x1, x21 848c980a4aSJavier Almansa Sobrino mov x2, x22 858c980a4aSJavier Almansa Sobrino mov x3, x23 8650a3056aSZelalem Aweke bl trp_setup 8750a3056aSZelalem Aweke bl trp_main 88dc0ca64eSJavier Almansa Sobrino b 1f 89dc0ca64eSJavier Almansa Sobrino 9000e81131SMark Dykeswarm_boot: 91dc0ca64eSJavier Almansa Sobrino mov x0, x20 92dc0ca64eSJavier Almansa Sobrino mov x1, x21 93dc0ca64eSJavier Almansa Sobrino mov x2, x22 94dc0ca64eSJavier Almansa Sobrino mov x3, x23 95dc0ca64eSJavier Almansa Sobrino bl trp_validate_warmboot_args 96dc0ca64eSJavier Almansa Sobrino cbnz x0, trp_panic /* Failed to validate warmboot args */ 97dc0ca64eSJavier Almansa Sobrino 98dc0ca64eSJavier Almansa Sobrino1: 998c980a4aSJavier Almansa Sobrino mov_imm x0, RMM_BOOT_COMPLETE 1008c980a4aSJavier Almansa Sobrino mov x1, xzr /* RMM_BOOT_SUCCESS */ 10150a3056aSZelalem Aweke smc #0 10250a3056aSZelalem Aweke b trp_handler 10350a3056aSZelalem Aweke 1048c980a4aSJavier Almansa Sobrinotrp_panic: 1058c980a4aSJavier Almansa Sobrino no_ret plat_panic_handler 1068c980a4aSJavier Almansa Sobrino 10700e81131SMark Dykes /* 10800e81131SMark Dykes * Flag to mark if it is a cold boot. 10900e81131SMark Dykes * 1: cold boot, 0: warmboot. 11000e81131SMark Dykes */ 11100e81131SMark Dykes.align 3 11200e81131SMark Dykescold_boot_flag: 11300e81131SMark Dykes .dword 1 11400e81131SMark Dykes 11550a3056aSZelalem Aweke /* --------------------------------------------- 11650a3056aSZelalem Aweke * Direct SMC call to BL31 service provided by 11750a3056aSZelalem Aweke * RMM Dispatcher 11850a3056aSZelalem Aweke * --------------------------------------------- 11950a3056aSZelalem Aweke */ 12050a3056aSZelalem Awekefunc trp_smc 12150a3056aSZelalem Aweke restore_args_call_smc 12250a3056aSZelalem Aweke ret 12350a3056aSZelalem Awekeendfunc trp_smc 12450a3056aSZelalem Aweke 12550a3056aSZelalem Aweke /* --------------------------------------------- 12650a3056aSZelalem Aweke * RMI call handler 12750a3056aSZelalem Aweke * --------------------------------------------- 12850a3056aSZelalem Aweke */ 12950a3056aSZelalem Awekefunc trp_handler 130b96253dbSAlexeiFedorov /* 131b96253dbSAlexeiFedorov * Save Link Register and X4, as per SMCCC v1.2 its value 132b96253dbSAlexeiFedorov * must be preserved unless it contains result, as specified 133b96253dbSAlexeiFedorov * in the function definition. 134b96253dbSAlexeiFedorov */ 135b96253dbSAlexeiFedorov stp x4, lr, [sp, #-16]! 136b96253dbSAlexeiFedorov 137b96253dbSAlexeiFedorov /* 138b96253dbSAlexeiFedorov * Zero the space for X0-X3 in trp_smc_result structure 139b96253dbSAlexeiFedorov * and pass its address as the last argument. 140b96253dbSAlexeiFedorov */ 141b96253dbSAlexeiFedorov stp xzr, xzr, [sp, #-16]! 142b96253dbSAlexeiFedorov stp xzr, xzr, [sp, #-16]! 143b96253dbSAlexeiFedorov mov x7, sp 144b96253dbSAlexeiFedorov 14550a3056aSZelalem Aweke bl trp_rmi_handler 146b96253dbSAlexeiFedorov 147b96253dbSAlexeiFedorov ldp x1, x2, [sp], #16 148b96253dbSAlexeiFedorov ldp x3, x4, [sp], #16 149b96253dbSAlexeiFedorov ldp x5, lr, [sp], #16 150b96253dbSAlexeiFedorov 151b96253dbSAlexeiFedorov ldr x0, =RMM_RMI_REQ_COMPLETE 152b96253dbSAlexeiFedorov smc #0 153b96253dbSAlexeiFedorov 15450a3056aSZelalem Aweke b trp_handler 15550a3056aSZelalem Awekeendfunc trp_handler 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