1 /* 2 * Copyright (c) 2021-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <arch_features.h> 15 #include <bl31/bl31.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <context.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/el3_runtime/cpu_data.h> 21 #include <lib/el3_runtime/pubsub.h> 22 #include <lib/extensions/mpam.h> 23 #include <lib/extensions/pmuv3.h> 24 #include <lib/extensions/sys_reg_trace.h> 25 #include <lib/gpt_rme/gpt_rme.h> 26 27 #include <lib/spinlock.h> 28 #include <lib/utils.h> 29 #include <lib/xlat_tables/xlat_tables_v2.h> 30 #include <plat/common/common_def.h> 31 #include <plat/common/platform.h> 32 #include <platform_def.h> 33 #include <services/rmmd_svc.h> 34 #include <smccc_helpers.h> 35 #include <lib/extensions/sme.h> 36 #include <lib/extensions/sve.h> 37 #include <lib/extensions/spe.h> 38 #include <lib/extensions/trbe.h> 39 #include "rmmd_private.h" 40 41 /******************************************************************************* 42 * RMM boot failure flag 43 ******************************************************************************/ 44 static bool rmm_boot_failed; 45 46 /******************************************************************************* 47 * RMM context information. 48 ******************************************************************************/ 49 rmmd_rmm_context_t rmm_context[PLATFORM_CORE_COUNT]; 50 51 /******************************************************************************* 52 * RMM entry point information. Discovered on the primary core and reused 53 * on secondary cores. 54 ******************************************************************************/ 55 static entry_point_info_t *rmm_ep_info; 56 57 /******************************************************************************* 58 * Static function declaration. 59 ******************************************************************************/ 60 static int32_t rmm_init(void); 61 62 /******************************************************************************* 63 * This function takes an RMM context pointer and performs a synchronous entry 64 * into it. 65 ******************************************************************************/ 66 uint64_t rmmd_rmm_sync_entry(rmmd_rmm_context_t *rmm_ctx) 67 { 68 uint64_t rc; 69 70 assert(rmm_ctx != NULL); 71 72 cm_set_context(&(rmm_ctx->cpu_ctx), REALM); 73 74 /* Restore the realm context assigned above */ 75 cm_el2_sysregs_context_restore(REALM); 76 cm_set_next_eret_context(REALM); 77 78 /* Enter RMM */ 79 rc = rmmd_rmm_enter(&rmm_ctx->c_rt_ctx); 80 81 /* 82 * Save realm context. EL2 Non-secure context will be restored 83 * before exiting Non-secure world, therefore there is no need 84 * to clear EL2 context registers. 85 */ 86 cm_el2_sysregs_context_save(REALM); 87 88 return rc; 89 } 90 91 /******************************************************************************* 92 * This function returns to the place where rmmd_rmm_sync_entry() was 93 * called originally. 94 ******************************************************************************/ 95 __dead2 void rmmd_rmm_sync_exit(uint64_t rc) 96 { 97 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 98 99 /* Get context of the RMM in use by this CPU. */ 100 assert(cm_get_context(REALM) == &(ctx->cpu_ctx)); 101 102 /* 103 * The RMMD must have initiated the original request through a 104 * synchronous entry into RMM. Jump back to the original C runtime 105 * context with the value of rc in x0; 106 */ 107 rmmd_rmm_exit(ctx->c_rt_ctx, rc); 108 109 panic(); 110 } 111 112 /******************************************************************************* 113 * Jump to the RMM for the first time. 114 ******************************************************************************/ 115 static int32_t rmm_init(void) 116 { 117 long rc; 118 rmmd_rmm_context_t *ctx = &rmm_context[plat_my_core_pos()]; 119 120 INFO("RMM init start.\n"); 121 122 rc = rmmd_rmm_sync_entry(ctx); 123 if (rc != E_RMM_BOOT_SUCCESS) { 124 ERROR("RMM init failed: %ld\n", rc); 125 /* Mark the boot as failed for all the CPUs */ 126 rmm_boot_failed = true; 127 return 0; 128 } 129 130 INFO("RMM init end.\n"); 131 132 return 1; 133 } 134 135 /******************************************************************************* 136 * Load and read RMM manifest, setup RMM. 137 ******************************************************************************/ 138 int rmmd_setup(void) 139 { 140 size_t shared_buf_size __unused; 141 uintptr_t shared_buf_base; 142 uint32_t ep_attr; 143 unsigned int linear_id = plat_my_core_pos(); 144 rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id]; 145 struct rmm_manifest *manifest; 146 int rc; 147 148 /* Make sure RME is supported. */ 149 if (is_feat_rme_present() == 0U) { 150 /* Mark the RMM boot as failed for all the CPUs */ 151 rmm_boot_failed = true; 152 return -ENOTSUP; 153 } 154 155 rmm_ep_info = bl31_plat_get_next_image_ep_info(REALM); 156 if ((rmm_ep_info == NULL) || (rmm_ep_info->pc == 0)) { 157 WARN("No RMM image provided by BL2 boot loader, Booting " 158 "device without RMM initialization. SMCs destined for " 159 "RMM will return SMC_UNK\n"); 160 161 /* Mark the boot as failed for all the CPUs */ 162 rmm_boot_failed = true; 163 return -ENOENT; 164 } 165 166 /* Initialise an entrypoint to set up the CPU context */ 167 ep_attr = EP_REALM; 168 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) { 169 ep_attr |= EP_EE_BIG; 170 } 171 172 SET_PARAM_HEAD(rmm_ep_info, PARAM_EP, VERSION_1, ep_attr); 173 rmm_ep_info->spsr = SPSR_64(MODE_EL2, 174 MODE_SP_ELX, 175 DISABLE_ALL_EXCEPTIONS); 176 177 shared_buf_size = 178 plat_rmmd_get_el3_rmm_shared_mem(&shared_buf_base); 179 180 assert((shared_buf_size == SZ_4K) && 181 ((void *)shared_buf_base != NULL)); 182 183 /* Zero out and load the boot manifest at the beginning of the share area */ 184 manifest = (struct rmm_manifest *)shared_buf_base; 185 (void)memset((void *)manifest, 0, sizeof(struct rmm_manifest)); 186 187 rc = plat_rmmd_load_manifest(manifest); 188 if (rc != 0) { 189 ERROR("Error loading RMM Boot Manifest (%i)\n", rc); 190 /* Mark the boot as failed for all the CPUs */ 191 rmm_boot_failed = true; 192 return rc; 193 } 194 flush_dcache_range((uintptr_t)shared_buf_base, shared_buf_size); 195 196 /* 197 * Prepare coldboot arguments for RMM: 198 * arg0: This CPUID (primary processor). 199 * arg1: Version for this Boot Interface. 200 * arg2: PLATFORM_CORE_COUNT. 201 * arg3: Base address for the EL3 <-> RMM shared area. The boot 202 * manifest will be stored at the beginning of this area. 203 */ 204 rmm_ep_info->args.arg0 = linear_id; 205 rmm_ep_info->args.arg1 = RMM_EL3_INTERFACE_VERSION; 206 rmm_ep_info->args.arg2 = PLATFORM_CORE_COUNT; 207 rmm_ep_info->args.arg3 = shared_buf_base; 208 209 /* Initialise RMM context with this entry point information */ 210 cm_setup_context(&rmm_ctx->cpu_ctx, rmm_ep_info); 211 212 INFO("RMM setup done.\n"); 213 214 /* Register init function for deferred init. */ 215 bl31_register_rmm_init(&rmm_init); 216 217 return 0; 218 } 219 220 /******************************************************************************* 221 * Forward SMC to the other security state 222 ******************************************************************************/ 223 static uint64_t rmmd_smc_forward(uint32_t src_sec_state, 224 uint32_t dst_sec_state, uint64_t x0, 225 uint64_t x1, uint64_t x2, uint64_t x3, 226 uint64_t x4, void *handle) 227 { 228 cpu_context_t *ctx = cm_get_context(dst_sec_state); 229 230 /* Save incoming security state */ 231 cm_el2_sysregs_context_save(src_sec_state); 232 233 /* Restore outgoing security state */ 234 cm_el2_sysregs_context_restore(dst_sec_state); 235 cm_set_next_eret_context(dst_sec_state); 236 237 /* 238 * As per SMCCCv1.2, we need to preserve x4 to x7 unless 239 * being used as return args. Hence we differentiate the 240 * onward and backward path. Support upto 8 args in the 241 * onward path and 4 args in return path. 242 * Register x4 will be preserved by RMM in case it is not 243 * used in return path. 244 */ 245 if (src_sec_state == NON_SECURE) { 246 SMC_RET8(ctx, x0, x1, x2, x3, x4, 247 SMC_GET_GP(handle, CTX_GPREG_X5), 248 SMC_GET_GP(handle, CTX_GPREG_X6), 249 SMC_GET_GP(handle, CTX_GPREG_X7)); 250 } 251 252 SMC_RET5(ctx, x0, x1, x2, x3, x4); 253 } 254 255 /******************************************************************************* 256 * This function handles all SMCs in the range reserved for RMI. Each call is 257 * either forwarded to the other security state or handled by the RMM dispatcher 258 ******************************************************************************/ 259 uint64_t rmmd_rmi_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 260 uint64_t x3, uint64_t x4, void *cookie, 261 void *handle, uint64_t flags) 262 { 263 uint32_t src_sec_state; 264 265 /* If RMM failed to boot, treat any RMI SMC as unknown */ 266 if (rmm_boot_failed) { 267 WARN("RMMD: Failed to boot up RMM. Ignoring RMI call\n"); 268 SMC_RET1(handle, SMC_UNK); 269 } 270 271 /* Determine which security state this SMC originated from */ 272 src_sec_state = caller_sec_state(flags); 273 274 /* RMI must not be invoked by the Secure world */ 275 if (src_sec_state == SMC_FROM_SECURE) { 276 WARN("RMMD: RMI invoked by secure world.\n"); 277 SMC_RET1(handle, SMC_UNK); 278 } 279 280 /* 281 * Forward an RMI call from the Normal world to the Realm world as it 282 * is. 283 */ 284 if (src_sec_state == SMC_FROM_NON_SECURE) { 285 /* 286 * If SVE hint bit is set in the flags then update the SMC 287 * function id and pass it on to the lower EL. 288 */ 289 if (is_sve_hint_set(flags)) { 290 smc_fid |= (FUNCID_SVE_HINT_MASK << 291 FUNCID_SVE_HINT_SHIFT); 292 } 293 VERBOSE("RMMD: RMI call from non-secure world.\n"); 294 return rmmd_smc_forward(NON_SECURE, REALM, smc_fid, 295 x1, x2, x3, x4, handle); 296 } 297 298 if (src_sec_state != SMC_FROM_REALM) { 299 SMC_RET1(handle, SMC_UNK); 300 } 301 302 switch (smc_fid) { 303 case RMM_RMI_REQ_COMPLETE: { 304 uint64_t x5 = SMC_GET_GP(handle, CTX_GPREG_X5); 305 306 return rmmd_smc_forward(REALM, NON_SECURE, x1, 307 x2, x3, x4, x5, handle); 308 } 309 default: 310 WARN("RMMD: Unsupported RMM call 0x%08x\n", smc_fid); 311 SMC_RET1(handle, SMC_UNK); 312 } 313 } 314 315 /******************************************************************************* 316 * This cpu has been turned on. Enter RMM to initialise R-EL2. Entry into RMM 317 * is done after initialising minimal architectural state that guarantees safe 318 * execution. 319 ******************************************************************************/ 320 static void *rmmd_cpu_on_finish_handler(const void *arg) 321 { 322 long rc; 323 uint32_t linear_id = plat_my_core_pos(); 324 rmmd_rmm_context_t *ctx = &rmm_context[linear_id]; 325 326 if (rmm_boot_failed) { 327 /* RMM Boot failed on a previous CPU. Abort. */ 328 ERROR("RMM Failed to initialize. Ignoring for CPU%d\n", 329 linear_id); 330 return NULL; 331 } 332 333 /* 334 * Prepare warmboot arguments for RMM: 335 * arg0: This CPUID. 336 * arg1 to arg3: Not used. 337 */ 338 rmm_ep_info->args.arg0 = linear_id; 339 rmm_ep_info->args.arg1 = 0ULL; 340 rmm_ep_info->args.arg2 = 0ULL; 341 rmm_ep_info->args.arg3 = 0ULL; 342 343 /* Initialise RMM context with this entry point information */ 344 cm_setup_context(&ctx->cpu_ctx, rmm_ep_info); 345 346 rc = rmmd_rmm_sync_entry(ctx); 347 348 if (rc != E_RMM_BOOT_SUCCESS) { 349 ERROR("RMM init failed on CPU%d: %ld\n", linear_id, rc); 350 /* Mark the boot as failed for any other booting CPU */ 351 rmm_boot_failed = true; 352 } 353 354 return NULL; 355 } 356 357 /* Subscribe to PSCI CPU on to initialize RMM on secondary */ 358 SUBSCRIBE_TO_EVENT(psci_cpu_on_finish, rmmd_cpu_on_finish_handler); 359 360 /* Convert GPT lib error to RMMD GTS error */ 361 static int gpt_to_gts_error(int error, uint32_t smc_fid, uint64_t address) 362 { 363 int ret; 364 365 if (error == 0) { 366 return E_RMM_OK; 367 } 368 369 if (error == -EINVAL) { 370 ret = E_RMM_BAD_ADDR; 371 } else { 372 /* This is the only other error code we expect */ 373 assert(error == -EPERM); 374 ret = E_RMM_BAD_PAS; 375 } 376 377 ERROR("RMMD: PAS Transition failed. GPT ret = %d, PA: 0x%"PRIx64 ", FID = 0x%x\n", 378 error, address, smc_fid); 379 return ret; 380 } 381 382 static int rmm_el3_ifc_get_feat_register(uint64_t feat_reg_idx, 383 uint64_t *feat_reg) 384 { 385 if (feat_reg_idx != RMM_EL3_FEAT_REG_0_IDX) { 386 ERROR("RMMD: Failed to get feature register %ld\n", feat_reg_idx); 387 return E_RMM_INVAL; 388 } 389 390 *feat_reg = 0UL; 391 #if RMMD_ENABLE_EL3_TOKEN_SIGN 392 *feat_reg |= RMM_EL3_FEAT_REG_0_EL3_TOKEN_SIGN_MASK; 393 #endif 394 return E_RMM_OK; 395 } 396 397 /* 398 * Update encryption key associated with @mecid. 399 */ 400 static int rmmd_mecid_key_update(uint64_t mecid) 401 { 402 uint64_t mecid_width, mecid_width_mask; 403 int ret; 404 405 /* 406 * Check whether FEAT_MEC is supported by the hardware. If not, return 407 * unknown SMC. 408 */ 409 if (is_feat_mec_supported() == false) { 410 return E_RMM_UNK; 411 } 412 413 /* 414 * Check whether the mecid parameter is at most MECIDR_EL2.MECIDWidthm1 + 1 415 * in length. 416 */ 417 mecid_width = ((read_mecidr_el2() >> MECIDR_EL2_MECIDWidthm1_SHIFT) & 418 MECIDR_EL2_MECIDWidthm1_MASK) + 1; 419 mecid_width_mask = ((1 << mecid_width) - 1); 420 if ((mecid & ~mecid_width_mask) != 0U) { 421 return E_RMM_INVAL; 422 } 423 424 ret = plat_rmmd_mecid_key_update(mecid); 425 426 if (ret != 0) { 427 return E_RMM_UNK; 428 } 429 return E_RMM_OK; 430 } 431 432 /******************************************************************************* 433 * This function handles RMM-EL3 interface SMCs 434 ******************************************************************************/ 435 uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, 436 uint64_t x3, uint64_t x4, void *cookie, 437 void *handle, uint64_t flags) 438 { 439 uint64_t remaining_len = 0UL; 440 uint32_t src_sec_state; 441 int ret; 442 443 /* If RMM failed to boot, treat any RMM-EL3 interface SMC as unknown */ 444 if (rmm_boot_failed) { 445 WARN("RMMD: Failed to boot up RMM. Ignoring RMM-EL3 call\n"); 446 SMC_RET1(handle, SMC_UNK); 447 } 448 449 /* Determine which security state this SMC originated from */ 450 src_sec_state = caller_sec_state(flags); 451 452 if (src_sec_state != SMC_FROM_REALM) { 453 WARN("RMMD: RMM-EL3 call originated from secure or normal world\n"); 454 SMC_RET1(handle, SMC_UNK); 455 } 456 457 switch (smc_fid) { 458 case RMM_GTSI_DELEGATE: 459 ret = gpt_delegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 460 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 461 case RMM_GTSI_UNDELEGATE: 462 ret = gpt_undelegate_pas(x1, PAGE_SIZE_4KB, SMC_FROM_REALM); 463 SMC_RET1(handle, gpt_to_gts_error(ret, smc_fid, x1)); 464 case RMM_ATTEST_GET_REALM_KEY: 465 ret = rmmd_attest_get_signing_key(x1, &x2, x3); 466 SMC_RET2(handle, ret, x2); 467 case RMM_ATTEST_GET_PLAT_TOKEN: 468 ret = rmmd_attest_get_platform_token(x1, &x2, x3, &remaining_len); 469 SMC_RET3(handle, ret, x2, remaining_len); 470 case RMM_EL3_FEATURES: 471 ret = rmm_el3_ifc_get_feat_register(x1, &x2); 472 SMC_RET2(handle, ret, x2); 473 #if RMMD_ENABLE_EL3_TOKEN_SIGN 474 case RMM_EL3_TOKEN_SIGN: 475 return rmmd_el3_token_sign(handle, x1, x2, x3, x4); 476 #endif 477 478 #if RMMD_ENABLE_IDE_KEY_PROG 479 case RMM_IDE_KEY_PROG: 480 { 481 rp_ide_key_info_t ide_key_info; 482 483 ide_key_info.keyqw0 = x4; 484 ide_key_info.keyqw1 = SMC_GET_GP(handle, CTX_GPREG_X5); 485 ide_key_info.keyqw2 = SMC_GET_GP(handle, CTX_GPREG_X6); 486 ide_key_info.keyqw3 = SMC_GET_GP(handle, CTX_GPREG_X7); 487 ide_key_info.ifvqw0 = SMC_GET_GP(handle, CTX_GPREG_X8); 488 ide_key_info.ifvqw1 = SMC_GET_GP(handle, CTX_GPREG_X9); 489 uint64_t x10 = SMC_GET_GP(handle, CTX_GPREG_X10); 490 uint64_t x11 = SMC_GET_GP(handle, CTX_GPREG_X11); 491 492 ret = rmmd_el3_ide_key_program(x1, x2, x3, &ide_key_info, x10, x11); 493 SMC_RET1(handle, ret); 494 } 495 case RMM_IDE_KEY_SET_GO: 496 ret = rmmd_el3_ide_key_set_go(x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5)); 497 SMC_RET1(handle, ret); 498 case RMM_IDE_KEY_SET_STOP: 499 ret = rmmd_el3_ide_key_set_stop(x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5)); 500 SMC_RET1(handle, ret); 501 case RMM_IDE_KM_PULL_RESPONSE: { 502 uint64_t req_resp = 0, req_id = 0, cookie_var = 0; 503 504 ret = rmmd_el3_ide_km_pull_response(x1, x2, &req_resp, &req_id, &cookie_var); 505 SMC_RET4(handle, ret, req_resp, req_id, cookie_var); 506 } 507 #endif /* RMMD_ENABLE_IDE_KEY_PROG */ 508 case RMM_BOOT_COMPLETE: 509 VERBOSE("RMMD: running rmmd_rmm_sync_exit\n"); 510 rmmd_rmm_sync_exit(x1); 511 512 case RMM_MECID_KEY_UPDATE: 513 ret = rmmd_mecid_key_update(x1); 514 SMC_RET1(handle, ret); 515 default: 516 WARN("RMMD: Unsupported RMM-EL3 call 0x%08x\n", smc_fid); 517 SMC_RET1(handle, SMC_UNK); 518 } 519 } 520