xref: /rk3399_ARM-atf/services/std_svc/errata_abi/cpu_errata_info.h (revision a6e01071f0f09fedceb4df242cd93d0dc90d7327)
1ffea3844SSona Mathew /*
2*50de8867SArvind Ram Prakash  * Copyright (c) 2023-2025, Arm Limited and Contributors. All rights reserved.
3ffea3844SSona Mathew  *
4ffea3844SSona Mathew  * SPDX-License-Identifier: BSD-3-Clause
5ffea3844SSona Mathew  */
6ffea3844SSona Mathew 
7ffea3844SSona Mathew #ifndef ERRATA_CPUSPEC_H
8ffea3844SSona Mathew #define ERRATA_CPUSPEC_H
9ffea3844SSona Mathew 
10ffea3844SSona Mathew #include <stdint.h>
111073bf3dSArvind Ram Prakash #include <arch.h>
12ffea3844SSona Mathew #include <arch_helpers.h>
13ffea3844SSona Mathew 
14ffea3844SSona Mathew #if __aarch64__
15ffea3844SSona Mathew #include <cortex_a710.h>
16ffea3844SSona Mathew #include <cortex_a78.h>
17ffea3844SSona Mathew #include <cortex_a78_ae.h>
18ffea3844SSona Mathew #include <cortex_a78c.h>
19ffea3844SSona Mathew #include <cortex_x2.h>
20106c4283SSona Mathew #include <cortex_x3.h>
21cc41b56fSSona Mathew #include <cortex_x4.h>
22ffea3844SSona Mathew #include <neoverse_n2.h>
23ffea3844SSona Mathew #include <neoverse_v1.h>
24ffea3844SSona Mathew #include <neoverse_v2.h>
25ffea3844SSona Mathew #endif
26ffea3844SSona Mathew 
27c9f26343SSona Mathew /* Max number of platform based errata with no workaround in EL3 */
28c9f26343SSona Mathew #define MAX_PLAT_CPU_ERRATA_ENTRIES	2
29ffea3844SSona Mathew 
30c9f26343SSona Mathew #define ERRATA_LIST_END		(MAX_PLAT_CPU_ERRATA_ENTRIES - 1)
31ffea3844SSona Mathew 
32ab062f05SSona Mathew /* Default values for unused memory in the array */
33aceb9c9eSSona Mathew #define UNDEF_ERRATA		{UINT_MAX, UCHAR_MAX, UCHAR_MAX}
34ffea3844SSona Mathew 
35ffea3844SSona Mathew #define RXPX_RANGE(x, y, z)	(((x >= y) && (x <= z)) ? true : false)
36ffea3844SSona Mathew 
37ffea3844SSona Mathew /*
38ffea3844SSona Mathew  * CPU specific values for errata handling
39ffea3844SSona Mathew  */
40ffea3844SSona Mathew struct em_cpu{
41ffea3844SSona Mathew 	unsigned int em_errata_id;
42ffea3844SSona Mathew 	unsigned char em_rxpx_lo;	/* lowest revision of errata applicable for the cpu */
43ffea3844SSona Mathew 	unsigned char em_rxpx_hi;	/* highest revision of errata applicable for the cpu */
44ffea3844SSona Mathew };
45ffea3844SSona Mathew 
46ffea3844SSona Mathew struct em_cpu_list{
475dd90688SGovindraj Raja 	unsigned long cpu_midr;	/* cpu specific part number is bit[15:4] of midr value */
48c9f26343SSona Mathew 	struct   em_cpu cpu_errata_list[MAX_PLAT_CPU_ERRATA_ENTRIES];
49ffea3844SSona Mathew };
50ffea3844SSona Mathew 
51*50de8867SArvind Ram Prakash int32_t verify_errata_implemented(uint32_t errata_id);
52ffea3844SSona Mathew #endif /* ERRATA_CPUSPEC_H */
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