1e62748e3SManish V Badarkhe /* 2e62748e3SManish V Badarkhe * Copyright (c) 2022 Arm Limited. All rights reserved. 3e62748e3SManish V Badarkhe * 4e62748e3SManish V Badarkhe * SPDX-License-Identifier: BSD-3-Clause 5e62748e3SManish V Badarkhe * 6e62748e3SManish V Badarkhe */ 7e62748e3SManish V Badarkhe #ifndef DRTM_MAIN_H 8e62748e3SManish V Badarkhe #define DRTM_MAIN_H 9e62748e3SManish V Badarkhe 10e62748e3SManish V Badarkhe #include <stdint.h> 11e62748e3SManish V Badarkhe 12e62748e3SManish V Badarkhe #include <lib/smccc.h> 13e62748e3SManish V Badarkhe 14d54792bdSManish V Badarkhe #include "drtm_dma_prot.h" 15d54792bdSManish V Badarkhe 16e62748e3SManish V Badarkhe enum drtm_retc { 17e62748e3SManish V Badarkhe SUCCESS = SMC_OK, 18e62748e3SManish V Badarkhe NOT_SUPPORTED = SMC_UNK, 19e62748e3SManish V Badarkhe INVALID_PARAMETERS = -2, 20e62748e3SManish V Badarkhe DENIED = -3, 21e62748e3SManish V Badarkhe NOT_FOUND = -4, 22e62748e3SManish V Badarkhe INTERNAL_ERROR = -5, 23e62748e3SManish V Badarkhe MEM_PROTECT_INVALID = -6, 24e62748e3SManish V Badarkhe }; 25e62748e3SManish V Badarkhe 26*2a1cdee4Sjohpow01 typedef struct { 27*2a1cdee4Sjohpow01 uint64_t tpm_features; 28*2a1cdee4Sjohpow01 uint64_t minimum_memory_requirement; 29*2a1cdee4Sjohpow01 uint64_t dma_prot_features; 30*2a1cdee4Sjohpow01 uint64_t boot_pe_id; 31*2a1cdee4Sjohpow01 uint64_t tcb_hash_features; 32*2a1cdee4Sjohpow01 } drtm_features_t; 33*2a1cdee4Sjohpow01 34*2a1cdee4Sjohpow01 drtm_memory_region_descriptor_table_t *drtm_build_address_map(void); 35*2a1cdee4Sjohpow01 uint64_t drtm_get_address_map_size(void); 36*2a1cdee4Sjohpow01 37e62748e3SManish V Badarkhe #endif /* DRTM_MAIN_H */ 38