1e62748e3SManish V Badarkhe /* 2e62748e3SManish V Badarkhe * Copyright (c) 2022 Arm Limited. All rights reserved. 3e62748e3SManish V Badarkhe * 4e62748e3SManish V Badarkhe * SPDX-License-Identifier: BSD-3-Clause 5e62748e3SManish V Badarkhe * 6e62748e3SManish V Badarkhe * DRTM service 7e62748e3SManish V Badarkhe * 8e62748e3SManish V Badarkhe * Authors: 9e62748e3SManish V Badarkhe * Lucian Paul-Trifu <lucian.paultrifu@gmail.com> 10e62748e3SManish V Badarkhe * Brian Nezvadovitz <brinez@microsoft.com> 2021-02-01 11e62748e3SManish V Badarkhe */ 12e62748e3SManish V Badarkhe 13e62748e3SManish V Badarkhe #include <stdint.h> 14e62748e3SManish V Badarkhe 15d54792bdSManish V Badarkhe #include <arch.h> 16d54792bdSManish V Badarkhe #include <arch_helpers.h> 172a1cdee4Sjohpow01 #include <common/bl_common.h> 18e62748e3SManish V Badarkhe #include <common/debug.h> 19e62748e3SManish V Badarkhe #include <common/runtime_svc.h> 20d54792bdSManish V Badarkhe #include <drivers/auth/crypto_mod.h> 21e62748e3SManish V Badarkhe #include "drtm_main.h" 22*bd6cc0b2SManish Pandey #include <lib/psci/psci_lib.h> 232a1cdee4Sjohpow01 #include <lib/xlat_tables/xlat_tables_v2.h> 242a1cdee4Sjohpow01 #include <plat/common/platform.h> 25e62748e3SManish V Badarkhe #include <services/drtm_svc.h> 262a1cdee4Sjohpow01 #include <platform_def.h> 27e62748e3SManish V Badarkhe 282a1cdee4Sjohpow01 /* Structure to store DRTM features specific to the platform. */ 292a1cdee4Sjohpow01 static drtm_features_t plat_drtm_features; 302a1cdee4Sjohpow01 312a1cdee4Sjohpow01 /* DRTM-formatted memory map. */ 322a1cdee4Sjohpow01 static drtm_memory_region_descriptor_table_t *plat_drtm_mem_map; 33d54792bdSManish V Badarkhe 34e62748e3SManish V Badarkhe int drtm_setup(void) 35e62748e3SManish V Badarkhe { 36d54792bdSManish V Badarkhe bool rc; 372a1cdee4Sjohpow01 const plat_drtm_tpm_features_t *plat_tpm_feat; 382a1cdee4Sjohpow01 const plat_drtm_dma_prot_features_t *plat_dma_prot_feat; 392a1cdee4Sjohpow01 uint64_t dlme_data_min_size; 40d54792bdSManish V Badarkhe 41e62748e3SManish V Badarkhe INFO("DRTM service setup\n"); 42e62748e3SManish V Badarkhe 432a1cdee4Sjohpow01 /* Read boot PE ID from MPIDR */ 442a1cdee4Sjohpow01 plat_drtm_features.boot_pe_id = read_mpidr_el1() & MPIDR_AFFINITY_MASK; 45d54792bdSManish V Badarkhe 46d54792bdSManish V Badarkhe rc = drtm_dma_prot_init(); 47d54792bdSManish V Badarkhe if (rc) { 48d54792bdSManish V Badarkhe return INTERNAL_ERROR; 49d54792bdSManish V Badarkhe } 50d54792bdSManish V Badarkhe 51d54792bdSManish V Badarkhe /* 52d54792bdSManish V Badarkhe * initialise the platform supported crypto module that will 53d54792bdSManish V Badarkhe * be used by the DRTM-service to calculate hash of DRTM- 54d54792bdSManish V Badarkhe * implementation specific components 55d54792bdSManish V Badarkhe */ 56d54792bdSManish V Badarkhe crypto_mod_init(); 57d54792bdSManish V Badarkhe 582a1cdee4Sjohpow01 /* Build DRTM-compatible address map. */ 592a1cdee4Sjohpow01 plat_drtm_mem_map = drtm_build_address_map(); 602a1cdee4Sjohpow01 if (plat_drtm_mem_map == NULL) { 612a1cdee4Sjohpow01 return INTERNAL_ERROR; 622a1cdee4Sjohpow01 } 632a1cdee4Sjohpow01 642a1cdee4Sjohpow01 /* Get DRTM features from platform hooks. */ 652a1cdee4Sjohpow01 plat_tpm_feat = plat_drtm_get_tpm_features(); 662a1cdee4Sjohpow01 if (plat_tpm_feat == NULL) { 672a1cdee4Sjohpow01 return INTERNAL_ERROR; 682a1cdee4Sjohpow01 } 692a1cdee4Sjohpow01 702a1cdee4Sjohpow01 plat_dma_prot_feat = plat_drtm_get_dma_prot_features(); 712a1cdee4Sjohpow01 if (plat_dma_prot_feat == NULL) { 722a1cdee4Sjohpow01 return INTERNAL_ERROR; 732a1cdee4Sjohpow01 } 742a1cdee4Sjohpow01 752a1cdee4Sjohpow01 /* 762a1cdee4Sjohpow01 * Add up minimum DLME data memory. 772a1cdee4Sjohpow01 * 782a1cdee4Sjohpow01 * For systems with complete DMA protection there is only one entry in 792a1cdee4Sjohpow01 * the protected regions table. 802a1cdee4Sjohpow01 */ 812a1cdee4Sjohpow01 if (plat_dma_prot_feat->dma_protection_support == 822a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_COMPLETE) { 832a1cdee4Sjohpow01 dlme_data_min_size = 842a1cdee4Sjohpow01 sizeof(drtm_memory_region_descriptor_table_t) + 852a1cdee4Sjohpow01 sizeof(drtm_mem_region_t); 862a1cdee4Sjohpow01 } else { 872a1cdee4Sjohpow01 /* 882a1cdee4Sjohpow01 * TODO set protected regions table size based on platform DMA 892a1cdee4Sjohpow01 * protection configuration 902a1cdee4Sjohpow01 */ 912a1cdee4Sjohpow01 panic(); 922a1cdee4Sjohpow01 } 932a1cdee4Sjohpow01 942a1cdee4Sjohpow01 dlme_data_min_size += (drtm_get_address_map_size() + 952a1cdee4Sjohpow01 PLAT_DRTM_EVENT_LOG_MAX_SIZE + 962a1cdee4Sjohpow01 plat_drtm_get_tcb_hash_table_size() + 972a1cdee4Sjohpow01 plat_drtm_get_imp_def_dlme_region_size()); 982a1cdee4Sjohpow01 992a1cdee4Sjohpow01 dlme_data_min_size = page_align(dlme_data_min_size, UP)/PAGE_SIZE; 1002a1cdee4Sjohpow01 1012a1cdee4Sjohpow01 /* Fill out platform DRTM features structure */ 1022a1cdee4Sjohpow01 /* Only support default PCR schema (0x1) in this implementation. */ 1032a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(plat_drtm_features.tpm_features, 1042a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_DEFAULT); 1052a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(plat_drtm_features.tpm_features, 1062a1cdee4Sjohpow01 plat_tpm_feat->tpm_based_hash_support); 1072a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_FW_HASH(plat_drtm_features.tpm_features, 1082a1cdee4Sjohpow01 plat_tpm_feat->firmware_hash_algorithm); 1092a1cdee4Sjohpow01 ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(plat_drtm_features.minimum_memory_requirement, 1102a1cdee4Sjohpow01 dlme_data_min_size); 1112a1cdee4Sjohpow01 ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(plat_drtm_features.minimum_memory_requirement, 1122a1cdee4Sjohpow01 plat_drtm_get_min_size_normal_world_dce()); 1132a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(plat_drtm_features.dma_prot_features, 1142a1cdee4Sjohpow01 plat_dma_prot_feat->max_num_mem_prot_regions); 1152a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(plat_drtm_features.dma_prot_features, 1162a1cdee4Sjohpow01 plat_dma_prot_feat->dma_protection_support); 1172a1cdee4Sjohpow01 ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(plat_drtm_features.tcb_hash_features, 1182a1cdee4Sjohpow01 plat_drtm_get_tcb_hash_features()); 1192a1cdee4Sjohpow01 120e62748e3SManish V Badarkhe return 0; 121e62748e3SManish V Badarkhe } 122e62748e3SManish V Badarkhe 123e9467afbSManish V Badarkhe static inline uint64_t drtm_features_tpm(void *ctx) 124e9467afbSManish V Badarkhe { 125e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* TPM feature is supported */ 126e9467afbSManish V Badarkhe plat_drtm_features.tpm_features); 127e9467afbSManish V Badarkhe } 128e9467afbSManish V Badarkhe 129e9467afbSManish V Badarkhe static inline uint64_t drtm_features_mem_req(void *ctx) 130e9467afbSManish V Badarkhe { 131e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* memory req Feature is supported */ 132e9467afbSManish V Badarkhe plat_drtm_features.minimum_memory_requirement); 133e9467afbSManish V Badarkhe } 134e9467afbSManish V Badarkhe 135e9467afbSManish V Badarkhe static inline uint64_t drtm_features_boot_pe_id(void *ctx) 136e9467afbSManish V Badarkhe { 137e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* Boot PE feature is supported */ 138e9467afbSManish V Badarkhe plat_drtm_features.boot_pe_id); 139e9467afbSManish V Badarkhe } 140e9467afbSManish V Badarkhe 141e9467afbSManish V Badarkhe static inline uint64_t drtm_features_dma_prot(void *ctx) 142e9467afbSManish V Badarkhe { 143e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* DMA protection feature is supported */ 144e9467afbSManish V Badarkhe plat_drtm_features.dma_prot_features); 145e9467afbSManish V Badarkhe } 146e9467afbSManish V Badarkhe 147e9467afbSManish V Badarkhe static inline uint64_t drtm_features_tcb_hashes(void *ctx) 148e9467afbSManish V Badarkhe { 149e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* TCB hash feature is supported */ 150e9467afbSManish V Badarkhe plat_drtm_features.tcb_hash_features); 151e9467afbSManish V Badarkhe } 152e9467afbSManish V Badarkhe 153*bd6cc0b2SManish Pandey static enum drtm_retc drtm_dl_check_caller_el(void *ctx) 154*bd6cc0b2SManish Pandey { 155*bd6cc0b2SManish Pandey uint64_t spsr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_SPSR_EL3); 156*bd6cc0b2SManish Pandey uint64_t dl_caller_el; 157*bd6cc0b2SManish Pandey uint64_t dl_caller_aarch; 158*bd6cc0b2SManish Pandey 159*bd6cc0b2SManish Pandey dl_caller_el = spsr_el3 >> MODE_EL_SHIFT & MODE_EL_MASK; 160*bd6cc0b2SManish Pandey dl_caller_aarch = spsr_el3 >> MODE_RW_SHIFT & MODE_RW_MASK; 161*bd6cc0b2SManish Pandey 162*bd6cc0b2SManish Pandey /* Caller's security state is checked from drtm_smc_handle function */ 163*bd6cc0b2SManish Pandey 164*bd6cc0b2SManish Pandey /* Caller can be NS-EL2/EL1 */ 165*bd6cc0b2SManish Pandey if (dl_caller_el == MODE_EL3) { 166*bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch from EL3\n"); 167*bd6cc0b2SManish Pandey return DENIED; 168*bd6cc0b2SManish Pandey } 169*bd6cc0b2SManish Pandey 170*bd6cc0b2SManish Pandey if (dl_caller_aarch != MODE_RW_64) { 171*bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch from non-AArch64 execution state\n"); 172*bd6cc0b2SManish Pandey return DENIED; 173*bd6cc0b2SManish Pandey } 174*bd6cc0b2SManish Pandey 175*bd6cc0b2SManish Pandey return SUCCESS; 176*bd6cc0b2SManish Pandey } 177*bd6cc0b2SManish Pandey 178*bd6cc0b2SManish Pandey static enum drtm_retc drtm_dl_check_cores(void) 179*bd6cc0b2SManish Pandey { 180*bd6cc0b2SManish Pandey bool running_on_single_core; 181*bd6cc0b2SManish Pandey uint64_t this_pe_aff_value = read_mpidr_el1() & MPIDR_AFFINITY_MASK; 182*bd6cc0b2SManish Pandey 183*bd6cc0b2SManish Pandey if (this_pe_aff_value != plat_drtm_features.boot_pe_id) { 184*bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch on a non-boot PE\n"); 185*bd6cc0b2SManish Pandey return DENIED; 186*bd6cc0b2SManish Pandey } 187*bd6cc0b2SManish Pandey 188*bd6cc0b2SManish Pandey running_on_single_core = psci_is_last_on_cpu_safe(); 189*bd6cc0b2SManish Pandey if (!running_on_single_core) { 190*bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch due to non-boot PE not being turned off\n"); 191*bd6cc0b2SManish Pandey return DENIED; 192*bd6cc0b2SManish Pandey } 193*bd6cc0b2SManish Pandey 194*bd6cc0b2SManish Pandey return SUCCESS; 195*bd6cc0b2SManish Pandey } 196*bd6cc0b2SManish Pandey 197*bd6cc0b2SManish Pandey static uint64_t drtm_dynamic_launch(uint64_t x1, void *handle) 198*bd6cc0b2SManish Pandey { 199*bd6cc0b2SManish Pandey enum drtm_retc ret = SUCCESS; 200*bd6cc0b2SManish Pandey 201*bd6cc0b2SManish Pandey /* Ensure that only boot PE is powered on */ 202*bd6cc0b2SManish Pandey ret = drtm_dl_check_cores(); 203*bd6cc0b2SManish Pandey if (ret != SUCCESS) { 204*bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 205*bd6cc0b2SManish Pandey } 206*bd6cc0b2SManish Pandey 207*bd6cc0b2SManish Pandey /* 208*bd6cc0b2SManish Pandey * Ensure that execution state is AArch64 and the caller 209*bd6cc0b2SManish Pandey * is highest non-secure exception level 210*bd6cc0b2SManish Pandey */ 211*bd6cc0b2SManish Pandey ret = drtm_dl_check_caller_el(handle); 212*bd6cc0b2SManish Pandey if (ret != SUCCESS) { 213*bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 214*bd6cc0b2SManish Pandey } 215*bd6cc0b2SManish Pandey 216*bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 217*bd6cc0b2SManish Pandey } 218*bd6cc0b2SManish Pandey 219e62748e3SManish V Badarkhe uint64_t drtm_smc_handler(uint32_t smc_fid, 220e62748e3SManish V Badarkhe uint64_t x1, 221e62748e3SManish V Badarkhe uint64_t x2, 222e62748e3SManish V Badarkhe uint64_t x3, 223e62748e3SManish V Badarkhe uint64_t x4, 224e62748e3SManish V Badarkhe void *cookie, 225e62748e3SManish V Badarkhe void *handle, 226e62748e3SManish V Badarkhe uint64_t flags) 227e62748e3SManish V Badarkhe { 228e62748e3SManish V Badarkhe /* Check that the SMC call is from the Normal World. */ 229e62748e3SManish V Badarkhe if (!is_caller_non_secure(flags)) { 230e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 231e62748e3SManish V Badarkhe } 232e62748e3SManish V Badarkhe 233e62748e3SManish V Badarkhe switch (smc_fid) { 234e62748e3SManish V Badarkhe case ARM_DRTM_SVC_VERSION: 235e62748e3SManish V Badarkhe INFO("DRTM service handler: version\n"); 236e62748e3SManish V Badarkhe /* Return the version of current implementation */ 237e62748e3SManish V Badarkhe SMC_RET1(handle, ARM_DRTM_VERSION); 238e62748e3SManish V Badarkhe break; /* not reached */ 239e62748e3SManish V Badarkhe 240e62748e3SManish V Badarkhe case ARM_DRTM_SVC_FEATURES: 241e62748e3SManish V Badarkhe if (((x1 >> ARM_DRTM_FUNC_SHIFT) & ARM_DRTM_FUNC_MASK) == 242e62748e3SManish V Badarkhe ARM_DRTM_FUNC_ID) { 243e62748e3SManish V Badarkhe /* Dispatch function-based queries. */ 244e62748e3SManish V Badarkhe switch (x1 & FUNCID_MASK) { 245e62748e3SManish V Badarkhe case ARM_DRTM_SVC_VERSION: 246e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 247e62748e3SManish V Badarkhe break; /* not reached */ 248e62748e3SManish V Badarkhe 249e62748e3SManish V Badarkhe case ARM_DRTM_SVC_FEATURES: 250e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 251e62748e3SManish V Badarkhe break; /* not reached */ 252e62748e3SManish V Badarkhe 253e62748e3SManish V Badarkhe case ARM_DRTM_SVC_UNPROTECT_MEM: 254e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 255e62748e3SManish V Badarkhe break; /* not reached */ 256e62748e3SManish V Badarkhe 257e62748e3SManish V Badarkhe case ARM_DRTM_SVC_DYNAMIC_LAUNCH: 258e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 259e62748e3SManish V Badarkhe break; /* not reached */ 260e62748e3SManish V Badarkhe 261e62748e3SManish V Badarkhe case ARM_DRTM_SVC_CLOSE_LOCALITY: 262e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_CLOSE_LOCALITY feature %s", 263e62748e3SManish V Badarkhe "is not supported\n"); 264e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 265e62748e3SManish V Badarkhe break; /* not reached */ 266e62748e3SManish V Badarkhe 267e62748e3SManish V Badarkhe case ARM_DRTM_SVC_GET_ERROR: 268e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 269e62748e3SManish V Badarkhe break; /* not reached */ 270e62748e3SManish V Badarkhe 271e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_ERROR: 272e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 273e62748e3SManish V Badarkhe break; /* not reached */ 274e62748e3SManish V Badarkhe 275e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_TCB_HASH: 276e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_TCB_HASH feature %s", 277e62748e3SManish V Badarkhe "is not supported\n"); 278e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 279e62748e3SManish V Badarkhe break; /* not reached */ 280e62748e3SManish V Badarkhe 281e62748e3SManish V Badarkhe case ARM_DRTM_SVC_LOCK_TCB_HASH: 282e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_LOCK_TCB_HASH feature %s", 283e62748e3SManish V Badarkhe "is not supported\n"); 284e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 285e62748e3SManish V Badarkhe break; /* not reached */ 286e62748e3SManish V Badarkhe 287e62748e3SManish V Badarkhe default: 288e62748e3SManish V Badarkhe ERROR("Unknown DRTM service function\n"); 289e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 290e62748e3SManish V Badarkhe break; /* not reached */ 291e62748e3SManish V Badarkhe } 292e9467afbSManish V Badarkhe } else { 293e9467afbSManish V Badarkhe /* Dispatch feature-based queries. */ 294e9467afbSManish V Badarkhe switch (x1 & ARM_DRTM_FEAT_ID_MASK) { 295e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_TPM: 296e9467afbSManish V Badarkhe INFO("++ DRTM service handler: TPM features\n"); 297e9467afbSManish V Badarkhe return drtm_features_tpm(handle); 298e9467afbSManish V Badarkhe break; /* not reached */ 299e9467afbSManish V Badarkhe 300e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_MEM_REQ: 301e9467afbSManish V Badarkhe INFO("++ DRTM service handler: Min. mem." 302e9467afbSManish V Badarkhe " requirement features\n"); 303e9467afbSManish V Badarkhe return drtm_features_mem_req(handle); 304e9467afbSManish V Badarkhe break; /* not reached */ 305e9467afbSManish V Badarkhe 306e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_DMA_PROT: 307e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 308e9467afbSManish V Badarkhe "DMA protection features\n"); 309e9467afbSManish V Badarkhe return drtm_features_dma_prot(handle); 310e9467afbSManish V Badarkhe break; /* not reached */ 311e9467afbSManish V Badarkhe 312e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_BOOT_PE_ID: 313e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 314e9467afbSManish V Badarkhe "Boot PE ID features\n"); 315e9467afbSManish V Badarkhe return drtm_features_boot_pe_id(handle); 316e9467afbSManish V Badarkhe break; /* not reached */ 317e9467afbSManish V Badarkhe 318e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_TCB_HASHES: 319e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 320e9467afbSManish V Badarkhe "TCB-hashes features\n"); 321e9467afbSManish V Badarkhe return drtm_features_tcb_hashes(handle); 322e9467afbSManish V Badarkhe break; /* not reached */ 323e9467afbSManish V Badarkhe 324e9467afbSManish V Badarkhe default: 325e9467afbSManish V Badarkhe ERROR("Unknown ARM DRTM service feature\n"); 326e9467afbSManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 327e9467afbSManish V Badarkhe break; /* not reached */ 328e9467afbSManish V Badarkhe } 329e62748e3SManish V Badarkhe } 330e62748e3SManish V Badarkhe 331e62748e3SManish V Badarkhe case ARM_DRTM_SVC_UNPROTECT_MEM: 332e62748e3SManish V Badarkhe INFO("DRTM service handler: unprotect mem\n"); 333e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_OK); 334e62748e3SManish V Badarkhe break; /* not reached */ 335e62748e3SManish V Badarkhe 336e62748e3SManish V Badarkhe case ARM_DRTM_SVC_DYNAMIC_LAUNCH: 337e62748e3SManish V Badarkhe INFO("DRTM service handler: dynamic launch\n"); 338*bd6cc0b2SManish Pandey return drtm_dynamic_launch(x1, handle); 339e62748e3SManish V Badarkhe break; /* not reached */ 340e62748e3SManish V Badarkhe 341e62748e3SManish V Badarkhe case ARM_DRTM_SVC_CLOSE_LOCALITY: 342e62748e3SManish V Badarkhe WARN("DRTM service handler: close locality %s\n", 343e62748e3SManish V Badarkhe "is not supported"); 344e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 345e62748e3SManish V Badarkhe break; /* not reached */ 346e62748e3SManish V Badarkhe 347e62748e3SManish V Badarkhe case ARM_DRTM_SVC_GET_ERROR: 348e62748e3SManish V Badarkhe INFO("DRTM service handler: get error\n"); 349e62748e3SManish V Badarkhe SMC_RET2(handle, SMC_OK, 0); 350e62748e3SManish V Badarkhe break; /* not reached */ 351e62748e3SManish V Badarkhe 352e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_ERROR: 353e62748e3SManish V Badarkhe INFO("DRTM service handler: set error\n"); 354e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_OK); 355e62748e3SManish V Badarkhe break; /* not reached */ 356e62748e3SManish V Badarkhe 357e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_TCB_HASH: 358e62748e3SManish V Badarkhe WARN("DRTM service handler: set TCB hash %s\n", 359e62748e3SManish V Badarkhe "is not supported"); 360e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 361e62748e3SManish V Badarkhe break; /* not reached */ 362e62748e3SManish V Badarkhe 363e62748e3SManish V Badarkhe case ARM_DRTM_SVC_LOCK_TCB_HASH: 364e62748e3SManish V Badarkhe WARN("DRTM service handler: lock TCB hash %s\n", 365e62748e3SManish V Badarkhe "is not supported"); 366e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 367e62748e3SManish V Badarkhe break; /* not reached */ 368e62748e3SManish V Badarkhe 369e62748e3SManish V Badarkhe default: 370e62748e3SManish V Badarkhe ERROR("Unknown DRTM service function: 0x%x\n", smc_fid); 371e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_UNK); 372e62748e3SManish V Badarkhe break; /* not reached */ 373e62748e3SManish V Badarkhe } 374e62748e3SManish V Badarkhe 375e62748e3SManish V Badarkhe /* not reached */ 376e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_UNK); 377e62748e3SManish V Badarkhe } 378