xref: /rk3399_ARM-atf/services/spd/tspd/tspd_main.c (revision 375f538a797a89a5f49aab1be70e86df4511c05a)
1*375f538aSAchin Gupta /*
2*375f538aSAchin Gupta  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3*375f538aSAchin Gupta  *
4*375f538aSAchin Gupta  * Redistribution and use in source and binary forms, with or without
5*375f538aSAchin Gupta  * modification, are permitted provided that the following conditions are met:
6*375f538aSAchin Gupta  *
7*375f538aSAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
8*375f538aSAchin Gupta  * list of conditions and the following disclaimer.
9*375f538aSAchin Gupta  *
10*375f538aSAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
11*375f538aSAchin Gupta  * this list of conditions and the following disclaimer in the documentation
12*375f538aSAchin Gupta  * and/or other materials provided with the distribution.
13*375f538aSAchin Gupta  *
14*375f538aSAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
15*375f538aSAchin Gupta  * to endorse or promote products derived from this software without specific
16*375f538aSAchin Gupta  * prior written permission.
17*375f538aSAchin Gupta  *
18*375f538aSAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*375f538aSAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*375f538aSAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*375f538aSAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*375f538aSAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*375f538aSAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*375f538aSAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*375f538aSAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*375f538aSAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*375f538aSAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*375f538aSAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
29*375f538aSAchin Gupta  */
30*375f538aSAchin Gupta 
31*375f538aSAchin Gupta 
32*375f538aSAchin Gupta /*******************************************************************************
33*375f538aSAchin Gupta  * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
34*375f538aSAchin Gupta  * plug-in component to the Secure Monitor, registered as a runtime service. The
35*375f538aSAchin Gupta  * SPD is expected to be a functional extension of the Secure Payload (SP) that
36*375f538aSAchin Gupta  * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
37*375f538aSAchin Gupta  * the Trusted OS/Applications range to the dispatcher. The SPD will either
38*375f538aSAchin Gupta  * handle the request locally or delegate it to the Secure Payload. It is also
39*375f538aSAchin Gupta  * responsible for initialising and maintaining communication with the SP.
40*375f538aSAchin Gupta  ******************************************************************************/
41*375f538aSAchin Gupta #include <stdio.h>
42*375f538aSAchin Gupta #include <string.h>
43*375f538aSAchin Gupta #include <assert.h>
44*375f538aSAchin Gupta #include <arch_helpers.h>
45*375f538aSAchin Gupta #include <console.h>
46*375f538aSAchin Gupta #include <platform.h>
47*375f538aSAchin Gupta #include <psci_private.h>
48*375f538aSAchin Gupta #include <context_mgmt.h>
49*375f538aSAchin Gupta #include <runtime_svc.h>
50*375f538aSAchin Gupta #include <bl31.h>
51*375f538aSAchin Gupta #include <tsp.h>
52*375f538aSAchin Gupta #include <psci.h>
53*375f538aSAchin Gupta #include <tspd_private.h>
54*375f538aSAchin Gupta #include <debug.h>
55*375f538aSAchin Gupta 
56*375f538aSAchin Gupta /*******************************************************************************
57*375f538aSAchin Gupta  * Single structure to hold information about the various entry points into the
58*375f538aSAchin Gupta  * Secure Payload. It is initialised once on the primary core after a cold boot.
59*375f538aSAchin Gupta  ******************************************************************************/
60*375f538aSAchin Gupta entry_info *tsp_entry_info;
61*375f538aSAchin Gupta 
62*375f538aSAchin Gupta /*******************************************************************************
63*375f538aSAchin Gupta  * Array to keep track of per-cpu Secure Payload state
64*375f538aSAchin Gupta  ******************************************************************************/
65*375f538aSAchin Gupta tsp_context tspd_sp_context[TSPD_CORE_COUNT];
66*375f538aSAchin Gupta 
67*375f538aSAchin Gupta /*******************************************************************************
68*375f538aSAchin Gupta  * Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type
69*375f538aSAchin Gupta  * (aarch32/aarch64) if not already known and initialises the context for entry
70*375f538aSAchin Gupta  * into the SP for its initialisation.
71*375f538aSAchin Gupta  ******************************************************************************/
72*375f538aSAchin Gupta int32_t tspd_setup(void)
73*375f538aSAchin Gupta {
74*375f538aSAchin Gupta 	el_change_info *image_info;
75*375f538aSAchin Gupta 	int32_t rc;
76*375f538aSAchin Gupta 	uint64_t mpidr = read_mpidr();
77*375f538aSAchin Gupta 	uint32_t linear_id;
78*375f538aSAchin Gupta 
79*375f538aSAchin Gupta 	linear_id = platform_get_core_pos(mpidr);
80*375f538aSAchin Gupta 
81*375f538aSAchin Gupta 	/*
82*375f538aSAchin Gupta 	 * Get information about the Secure Payload (BL32) image. Its
83*375f538aSAchin Gupta 	 * absence is a critical failure.  TODO: Add support to
84*375f538aSAchin Gupta 	 * conditionally include the SPD service
85*375f538aSAchin Gupta 	 */
86*375f538aSAchin Gupta 	image_info = bl31_get_next_image_info(SECURE);
87*375f538aSAchin Gupta 	assert(image_info);
88*375f538aSAchin Gupta 
89*375f538aSAchin Gupta 	/*
90*375f538aSAchin Gupta 	 * We could inspect the SP image and determine it's execution
91*375f538aSAchin Gupta 	 * state i.e whether AArch32 or AArch64. Assuming it's AArch64
92*375f538aSAchin Gupta 	 * for the time being.
93*375f538aSAchin Gupta 	 */
94*375f538aSAchin Gupta 	rc = tspd_init_secure_context(image_info->entrypoint,
95*375f538aSAchin Gupta 				     TSP_AARCH64,
96*375f538aSAchin Gupta 				     mpidr,
97*375f538aSAchin Gupta 				     &tspd_sp_context[linear_id]);
98*375f538aSAchin Gupta 	assert(rc == 0);
99*375f538aSAchin Gupta 
100*375f538aSAchin Gupta 	return rc;
101*375f538aSAchin Gupta }
102*375f538aSAchin Gupta 
103*375f538aSAchin Gupta /*******************************************************************************
104*375f538aSAchin Gupta  * This function passes control to the Secure Payload image (BL32) for the first
105*375f538aSAchin Gupta  * time on the primary cpu after a cold boot. It assumes that a valid secure
106*375f538aSAchin Gupta  * context has already been created by tspd_setup() which can be directly used.
107*375f538aSAchin Gupta  * It also assumes that a valid non-secure context has been initialised by PSCI
108*375f538aSAchin Gupta  * so it does not need to save and restore any non-secure state. This function
109*375f538aSAchin Gupta  * performs a synchronous entry into the Secure payload. The SP passes control
110*375f538aSAchin Gupta  * back to this routine through a SMC. It also passes the extents of memory made
111*375f538aSAchin Gupta  * available to BL32 by BL31.
112*375f538aSAchin Gupta  ******************************************************************************/
113*375f538aSAchin Gupta int32_t bl32_init(meminfo *bl32_meminfo)
114*375f538aSAchin Gupta {
115*375f538aSAchin Gupta 	uint64_t mpidr = read_mpidr();
116*375f538aSAchin Gupta 	uint32_t linear_id = platform_get_core_pos(mpidr);
117*375f538aSAchin Gupta 	uint64_t rc;
118*375f538aSAchin Gupta 	tsp_context *tsp_ctx = &tspd_sp_context[linear_id];
119*375f538aSAchin Gupta 
120*375f538aSAchin Gupta 	/*
121*375f538aSAchin Gupta 	 * Arrange for passing a pointer to the meminfo structure
122*375f538aSAchin Gupta 	 * describing the memory extents available to the secure
123*375f538aSAchin Gupta 	 * payload.
124*375f538aSAchin Gupta 	 * TODO: We are passing a pointer to BL31 internal memory
125*375f538aSAchin Gupta 	 * whereas this structure should be copied to a communication
126*375f538aSAchin Gupta 	 * buffer between the SP and SPD.
127*375f538aSAchin Gupta 	 */
128*375f538aSAchin Gupta 	write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
129*375f538aSAchin Gupta 		      CTX_GPREG_X0,
130*375f538aSAchin Gupta 		      (uint64_t) bl32_meminfo);
131*375f538aSAchin Gupta 
132*375f538aSAchin Gupta 	/* Arrange for an entry into the secure payload */
133*375f538aSAchin Gupta 	rc = tspd_synchronous_sp_entry(tsp_ctx);
134*375f538aSAchin Gupta 	assert(rc != 0);
135*375f538aSAchin Gupta 	if (rc)
136*375f538aSAchin Gupta 		tsp_ctx->state = TSP_STATE_ON;
137*375f538aSAchin Gupta 
138*375f538aSAchin Gupta 	return rc;
139*375f538aSAchin Gupta }
140*375f538aSAchin Gupta 
141*375f538aSAchin Gupta /*******************************************************************************
142*375f538aSAchin Gupta  * This function is responsible for handling all SMCs in the Trusted OS/App
143*375f538aSAchin Gupta  * range from the non-secure state as defined in the SMC Calling Convention
144*375f538aSAchin Gupta  * Document. It is also responsible for communicating with the Secure payload
145*375f538aSAchin Gupta  * to delegate work and return results back to the non-secure state. Lastly it
146*375f538aSAchin Gupta  * will also return any information that the secure payload needs to do the
147*375f538aSAchin Gupta  * work assigned to it.
148*375f538aSAchin Gupta  ******************************************************************************/
149*375f538aSAchin Gupta uint64_t tspd_smc_handler(uint32_t smc_fid,
150*375f538aSAchin Gupta 			 uint64_t x1,
151*375f538aSAchin Gupta 			 uint64_t x2,
152*375f538aSAchin Gupta 			 uint64_t x3,
153*375f538aSAchin Gupta 			 uint64_t x4,
154*375f538aSAchin Gupta 			 void *cookie,
155*375f538aSAchin Gupta 			 void *handle,
156*375f538aSAchin Gupta 			 uint64_t flags)
157*375f538aSAchin Gupta {
158*375f538aSAchin Gupta 	unsigned long mpidr = read_mpidr();
159*375f538aSAchin Gupta 	uint32_t linear_id = platform_get_core_pos(mpidr), ns;
160*375f538aSAchin Gupta 
161*375f538aSAchin Gupta 	/* Determine which security state this SMC originated from */
162*375f538aSAchin Gupta 	ns = is_caller_non_secure(flags);
163*375f538aSAchin Gupta 
164*375f538aSAchin Gupta 	switch (smc_fid) {
165*375f538aSAchin Gupta 
166*375f538aSAchin Gupta 	/*
167*375f538aSAchin Gupta 	 * This function ID is used only by the SP to indicate it has
168*375f538aSAchin Gupta 	 * finished initialising itself after a cold boot
169*375f538aSAchin Gupta 	 */
170*375f538aSAchin Gupta 	case TSP_ENTRY_DONE:
171*375f538aSAchin Gupta 		if (ns)
172*375f538aSAchin Gupta 			SMC_RET1(handle, SMC_UNK);
173*375f538aSAchin Gupta 
174*375f538aSAchin Gupta 		/*
175*375f538aSAchin Gupta 		 * Stash the SP entry points information. This is done
176*375f538aSAchin Gupta 		 * only once on the primary cpu
177*375f538aSAchin Gupta 		 */
178*375f538aSAchin Gupta 		assert(tsp_entry_info == NULL);
179*375f538aSAchin Gupta 		tsp_entry_info = (entry_info *) x1;
180*375f538aSAchin Gupta 
181*375f538aSAchin Gupta 		/*
182*375f538aSAchin Gupta 		 * SP reports completion. The SPD must have initiated
183*375f538aSAchin Gupta 		 * the original request through a synchronous entry
184*375f538aSAchin Gupta 		 * into the SP. Jump back to the original C runtime
185*375f538aSAchin Gupta 		 * context.
186*375f538aSAchin Gupta 		 */
187*375f538aSAchin Gupta 		tspd_synchronous_sp_exit(&tspd_sp_context[linear_id], x1);
188*375f538aSAchin Gupta 
189*375f538aSAchin Gupta 		/* Should never reach here */
190*375f538aSAchin Gupta 		assert(0);
191*375f538aSAchin Gupta 
192*375f538aSAchin Gupta 	default:
193*375f538aSAchin Gupta 		panic();
194*375f538aSAchin Gupta 	}
195*375f538aSAchin Gupta 
196*375f538aSAchin Gupta 	SMC_RET1(handle, 0);
197*375f538aSAchin Gupta }
198*375f538aSAchin Gupta 
199*375f538aSAchin Gupta /* Define a SPD runtime service descriptor */
200*375f538aSAchin Gupta DECLARE_RT_SVC(
201*375f538aSAchin Gupta 	spd,
202*375f538aSAchin Gupta 
203*375f538aSAchin Gupta 	OEN_TOS_START,
204*375f538aSAchin Gupta 	OEN_TOS_END,
205*375f538aSAchin Gupta 	SMC_TYPE_FAST,
206*375f538aSAchin Gupta 	tspd_setup,
207*375f538aSAchin Gupta 	tspd_smc_handler
208*375f538aSAchin Gupta );
209