1*948c090dSVarun Wadekar /* 2*948c090dSVarun Wadekar * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*948c090dSVarun Wadekar * 4*948c090dSVarun Wadekar * Redistribution and use in source and binary forms, with or without 5*948c090dSVarun Wadekar * modification, are permitted provided that the following conditions are met: 6*948c090dSVarun Wadekar * 7*948c090dSVarun Wadekar * Redistributions of source code must retain the above copyright notice, this 8*948c090dSVarun Wadekar * list of conditions and the following disclaimer. 9*948c090dSVarun Wadekar * 10*948c090dSVarun Wadekar * Redistributions in binary form must reproduce the above copyright notice, 11*948c090dSVarun Wadekar * this list of conditions and the following disclaimer in the documentation 12*948c090dSVarun Wadekar * and/or other materials provided with the distribution. 13*948c090dSVarun Wadekar * 14*948c090dSVarun Wadekar * Neither the name of ARM nor the names of its contributors may be used 15*948c090dSVarun Wadekar * to endorse or promote products derived from this software without specific 16*948c090dSVarun Wadekar * prior written permission. 17*948c090dSVarun Wadekar * 18*948c090dSVarun Wadekar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*948c090dSVarun Wadekar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*948c090dSVarun Wadekar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*948c090dSVarun Wadekar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*948c090dSVarun Wadekar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*948c090dSVarun Wadekar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*948c090dSVarun Wadekar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*948c090dSVarun Wadekar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*948c090dSVarun Wadekar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*948c090dSVarun Wadekar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*948c090dSVarun Wadekar * POSSIBILITY OF SUCH DAMAGE. 29*948c090dSVarun Wadekar */ 30*948c090dSVarun Wadekar 31*948c090dSVarun Wadekar #ifndef __LIB_SM_SM_ERR_H 32*948c090dSVarun Wadekar #define __LIB_SM_SM_ERR_H 33*948c090dSVarun Wadekar 34*948c090dSVarun Wadekar /* Errors from the secure monitor */ 35*948c090dSVarun Wadekar #define SM_ERR_UNDEFINED_SMC 0xFFFFFFFF /* Unknown SMC (defined by ARM DEN 0028A(0.9.0) */ 36*948c090dSVarun Wadekar #define SM_ERR_INVALID_PARAMETERS -2 37*948c090dSVarun Wadekar #define SM_ERR_INTERRUPTED -3 /* Got interrupted. Call back with restart SMC */ 38*948c090dSVarun Wadekar #define SM_ERR_UNEXPECTED_RESTART -4 /* Got an restart SMC when we didn't expect it */ 39*948c090dSVarun Wadekar #define SM_ERR_BUSY -5 /* Temporarily busy. Call back with original args */ 40*948c090dSVarun Wadekar #define SM_ERR_INTERLEAVED_SMC -6 /* Got a trusted_service SMC when a restart SMC is required */ 41*948c090dSVarun Wadekar #define SM_ERR_INTERNAL_FAILURE -7 /* Unknown error */ 42*948c090dSVarun Wadekar #define SM_ERR_NOT_SUPPORTED -8 43*948c090dSVarun Wadekar #define SM_ERR_NOT_ALLOWED -9 /* SMC call not allowed */ 44*948c090dSVarun Wadekar #define SM_ERR_END_OF_INPUT -10 45*948c090dSVarun Wadekar 46*948c090dSVarun Wadekar #endif 47