122038315SVarun Wadekar /* 2*bbbbcdaeSDavid Cunado * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 322038315SVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 522038315SVarun Wadekar */ 622038315SVarun Wadekar 722038315SVarun Wadekar #ifndef __TLKD_PRIVATE_H__ 822038315SVarun Wadekar #define __TLKD_PRIVATE_H__ 922038315SVarun Wadekar 1022038315SVarun Wadekar #include <arch.h> 1122038315SVarun Wadekar #include <context.h> 1222038315SVarun Wadekar #include <interrupt_mgmt.h> 1322038315SVarun Wadekar #include <platform_def.h> 1422038315SVarun Wadekar #include <psci.h> 1522038315SVarun Wadekar 1622038315SVarun Wadekar /* 17*bbbbcdaeSDavid Cunado * This flag is used by the TLKD to determine if the SP is servicing a yielding 1822038315SVarun Wadekar * SMC request prior to programming the next entry into the SP e.g. if SP 1922038315SVarun Wadekar * execution is preempted by a non-secure interrupt and handed control to the 2022038315SVarun Wadekar * normal world. If another request which is distinct from what the SP was 2122038315SVarun Wadekar * previously doing arrives, then this flag will be help the TLKD to either 2222038315SVarun Wadekar * reject the new request or service it while ensuring that the previous context 2322038315SVarun Wadekar * is not corrupted. 2422038315SVarun Wadekar */ 25*bbbbcdaeSDavid Cunado #define YIELD_SMC_ACTIVE_FLAG_SHIFT 2 26*bbbbcdaeSDavid Cunado #define YIELD_SMC_ACTIVE_FLAG_MASK 1 27*bbbbcdaeSDavid Cunado #define get_yield_smc_active_flag(state) \ 28*bbbbcdaeSDavid Cunado (((state) >> YIELD_SMC_ACTIVE_FLAG_SHIFT) \ 29*bbbbcdaeSDavid Cunado & YIELD_SMC_ACTIVE_FLAG_MASK) 30*bbbbcdaeSDavid Cunado #define set_yield_smc_active_flag(state) ((state) |= \ 31*bbbbcdaeSDavid Cunado (1 << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 32*bbbbcdaeSDavid Cunado #define clr_yield_smc_active_flag(state) ((state) &= \ 33*bbbbcdaeSDavid Cunado ~(YIELD_SMC_ACTIVE_FLAG_MASK \ 34*bbbbcdaeSDavid Cunado << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 3522038315SVarun Wadekar 3622038315SVarun Wadekar /******************************************************************************* 376e159e7aSVarun Wadekar * Translate virtual address received from the NS world 386e159e7aSVarun Wadekar ******************************************************************************/ 396e159e7aSVarun Wadekar #define TLK_TRANSLATE_NS_VADDR 4 406e159e7aSVarun Wadekar 416e159e7aSVarun Wadekar /******************************************************************************* 4222038315SVarun Wadekar * Secure Payload execution state information i.e. aarch32 or aarch64 4322038315SVarun Wadekar ******************************************************************************/ 4422038315SVarun Wadekar #define SP_AARCH32 MODE_RW_32 4522038315SVarun Wadekar #define SP_AARCH64 MODE_RW_64 4622038315SVarun Wadekar 4722038315SVarun Wadekar /******************************************************************************* 4822038315SVarun Wadekar * Number of cpus that the present on this platform. TODO: Rely on a topology 4922038315SVarun Wadekar * tree to determine this in the future to avoid assumptions about mpidr 5022038315SVarun Wadekar * allocation 5122038315SVarun Wadekar ******************************************************************************/ 5222038315SVarun Wadekar #define TLKD_CORE_COUNT PLATFORM_CORE_COUNT 5322038315SVarun Wadekar 5422038315SVarun Wadekar /******************************************************************************* 5522038315SVarun Wadekar * Constants that allow assembler code to preserve callee-saved registers of the 5622038315SVarun Wadekar * C runtime context while performing a security state switch. 5722038315SVarun Wadekar ******************************************************************************/ 5822038315SVarun Wadekar #define TLKD_C_RT_CTX_X19 0x0 5922038315SVarun Wadekar #define TLKD_C_RT_CTX_X20 0x8 6022038315SVarun Wadekar #define TLKD_C_RT_CTX_X21 0x10 6122038315SVarun Wadekar #define TLKD_C_RT_CTX_X22 0x18 6222038315SVarun Wadekar #define TLKD_C_RT_CTX_X23 0x20 6322038315SVarun Wadekar #define TLKD_C_RT_CTX_X24 0x28 6422038315SVarun Wadekar #define TLKD_C_RT_CTX_X25 0x30 6522038315SVarun Wadekar #define TLKD_C_RT_CTX_X26 0x38 6622038315SVarun Wadekar #define TLKD_C_RT_CTX_X27 0x40 6722038315SVarun Wadekar #define TLKD_C_RT_CTX_X28 0x48 6822038315SVarun Wadekar #define TLKD_C_RT_CTX_X29 0x50 6922038315SVarun Wadekar #define TLKD_C_RT_CTX_X30 0x58 7022038315SVarun Wadekar #define TLKD_C_RT_CTX_SIZE 0x60 7122038315SVarun Wadekar #define TLKD_C_RT_CTX_ENTRIES (TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT) 7222038315SVarun Wadekar 7322038315SVarun Wadekar #ifndef __ASSEMBLY__ 7422038315SVarun Wadekar 7522038315SVarun Wadekar #include <cassert.h> 7622038315SVarun Wadekar #include <stdint.h> 7722038315SVarun Wadekar 7822038315SVarun Wadekar /* AArch64 callee saved general purpose register context structure. */ 7922038315SVarun Wadekar DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES); 8022038315SVarun Wadekar 8122038315SVarun Wadekar /* 8222038315SVarun Wadekar * Compile time assertion to ensure that both the compiler and linker 8322038315SVarun Wadekar * have the same double word aligned view of the size of the C runtime 8422038315SVarun Wadekar * register context. 8522038315SVarun Wadekar */ 8622038315SVarun Wadekar CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \ 8722038315SVarun Wadekar assert_tlkd_c_rt_regs_size_mismatch); 8822038315SVarun Wadekar 8922038315SVarun Wadekar /******************************************************************************* 9022038315SVarun Wadekar * Structure which helps the SPD to maintain the per-cpu state of the SP. 9122038315SVarun Wadekar * 'state' - collection of flags to track SP state e.g. on/off 9222038315SVarun Wadekar * 'mpidr' - mpidr to associate a context with a cpu 9322038315SVarun Wadekar * 'c_rt_ctx' - stack address to restore C runtime context from after 9422038315SVarun Wadekar * returning from a synchronous entry into the SP. 9522038315SVarun Wadekar * 'cpu_ctx' - space to maintain SP architectural state 9622038315SVarun Wadekar * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations 9722038315SVarun Wadekar * which will queried using the TSP_GET_ARGS SMC by TSP. 9822038315SVarun Wadekar ******************************************************************************/ 9922038315SVarun Wadekar typedef struct tlk_context { 10022038315SVarun Wadekar uint32_t state; 10122038315SVarun Wadekar uint64_t mpidr; 10222038315SVarun Wadekar uint64_t c_rt_ctx; 10322038315SVarun Wadekar cpu_context_t cpu_ctx; 10422038315SVarun Wadekar } tlk_context_t; 10522038315SVarun Wadekar 10622038315SVarun Wadekar /******************************************************************************* 10722038315SVarun Wadekar * Function & Data prototypes 10822038315SVarun Wadekar ******************************************************************************/ 1096e159e7aSVarun Wadekar uint64_t tlkd_va_translate(uintptr_t va, int type); 11022038315SVarun Wadekar uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx); 11122038315SVarun Wadekar void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret); 11222038315SVarun Wadekar uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx); 11322038315SVarun Wadekar void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, 11422038315SVarun Wadekar uint64_t ret); 11522038315SVarun Wadekar void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point, 11622038315SVarun Wadekar uint32_t rw, 11722038315SVarun Wadekar uint64_t pc, 11822038315SVarun Wadekar tlk_context_t *tlk_ctx); 11922038315SVarun Wadekar 12022038315SVarun Wadekar #endif /*__ASSEMBLY__*/ 12122038315SVarun Wadekar 12222038315SVarun Wadekar #endif /* __TLKD_PRIVATE_H__ */ 123