122038315SVarun Wadekar /* 222038315SVarun Wadekar * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 322038315SVarun Wadekar * 422038315SVarun Wadekar * Redistribution and use in source and binary forms, with or without 522038315SVarun Wadekar * modification, are permitted provided that the following conditions are met: 622038315SVarun Wadekar * 722038315SVarun Wadekar * Redistributions of source code must retain the above copyright notice, this 822038315SVarun Wadekar * list of conditions and the following disclaimer. 922038315SVarun Wadekar * 1022038315SVarun Wadekar * Redistributions in binary form must reproduce the above copyright notice, 1122038315SVarun Wadekar * this list of conditions and the following disclaimer in the documentation 1222038315SVarun Wadekar * and/or other materials provided with the distribution. 1322038315SVarun Wadekar * 1422038315SVarun Wadekar * Neither the name of ARM nor the names of its contributors may be used 1522038315SVarun Wadekar * to endorse or promote products derived from this software without specific 1622038315SVarun Wadekar * prior written permission. 1722038315SVarun Wadekar * 1822038315SVarun Wadekar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1922038315SVarun Wadekar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2022038315SVarun Wadekar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2122038315SVarun Wadekar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2222038315SVarun Wadekar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2322038315SVarun Wadekar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2422038315SVarun Wadekar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2522038315SVarun Wadekar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2622038315SVarun Wadekar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2722038315SVarun Wadekar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2822038315SVarun Wadekar * POSSIBILITY OF SUCH DAMAGE. 2922038315SVarun Wadekar */ 3022038315SVarun Wadekar 3122038315SVarun Wadekar #include <arch_helpers.h> 3222038315SVarun Wadekar #include <assert.h> 3322038315SVarun Wadekar #include <bl_common.h> 3422038315SVarun Wadekar #include <context_mgmt.h> 3522038315SVarun Wadekar #include <string.h> 3622038315SVarun Wadekar #include "tlkd_private.h" 3722038315SVarun Wadekar 38*6e159e7aSVarun Wadekar #define AT_MASK 3 39*6e159e7aSVarun Wadekar 40*6e159e7aSVarun Wadekar /******************************************************************************* 41*6e159e7aSVarun Wadekar * This function helps the SP to translate NS/S virtual addresses. 42*6e159e7aSVarun Wadekar ******************************************************************************/ 43*6e159e7aSVarun Wadekar uint64_t tlkd_va_translate(uintptr_t va, int type) 44*6e159e7aSVarun Wadekar { 45*6e159e7aSVarun Wadekar uint64_t pa; 46*6e159e7aSVarun Wadekar 47*6e159e7aSVarun Wadekar if (type & TLK_TRANSLATE_NS_VADDR) { 48*6e159e7aSVarun Wadekar 49*6e159e7aSVarun Wadekar /* save secure context */ 50*6e159e7aSVarun Wadekar cm_el1_sysregs_context_save(SECURE); 51*6e159e7aSVarun Wadekar 52*6e159e7aSVarun Wadekar /* restore non-secure context */ 53*6e159e7aSVarun Wadekar cm_el1_sysregs_context_restore(NON_SECURE); 54*6e159e7aSVarun Wadekar 55*6e159e7aSVarun Wadekar /* switch NS bit to start using 64-bit, non-secure mappings */ 56*6e159e7aSVarun Wadekar write_scr(cm_get_scr_el3(NON_SECURE)); 57*6e159e7aSVarun Wadekar isb(); 58*6e159e7aSVarun Wadekar } 59*6e159e7aSVarun Wadekar 60*6e159e7aSVarun Wadekar int at = type & AT_MASK; 61*6e159e7aSVarun Wadekar switch (at) { 62*6e159e7aSVarun Wadekar case 0: 63*6e159e7aSVarun Wadekar ats12e1r(va); 64*6e159e7aSVarun Wadekar break; 65*6e159e7aSVarun Wadekar case 1: 66*6e159e7aSVarun Wadekar ats12e1w(va); 67*6e159e7aSVarun Wadekar break; 68*6e159e7aSVarun Wadekar case 2: 69*6e159e7aSVarun Wadekar ats12e0r(va); 70*6e159e7aSVarun Wadekar break; 71*6e159e7aSVarun Wadekar case 3: 72*6e159e7aSVarun Wadekar ats12e0w(va); 73*6e159e7aSVarun Wadekar break; 74*6e159e7aSVarun Wadekar default: 75*6e159e7aSVarun Wadekar assert(0); 76*6e159e7aSVarun Wadekar } 77*6e159e7aSVarun Wadekar 78*6e159e7aSVarun Wadekar /* get the (NS/S) physical address */ 79*6e159e7aSVarun Wadekar isb(); 80*6e159e7aSVarun Wadekar pa = read_par_el1(); 81*6e159e7aSVarun Wadekar 82*6e159e7aSVarun Wadekar /* Restore secure state */ 83*6e159e7aSVarun Wadekar if (type & TLK_TRANSLATE_NS_VADDR) { 84*6e159e7aSVarun Wadekar 85*6e159e7aSVarun Wadekar /* restore secure context */ 86*6e159e7aSVarun Wadekar cm_el1_sysregs_context_restore(SECURE); 87*6e159e7aSVarun Wadekar 88*6e159e7aSVarun Wadekar /* switch NS bit to start using 32-bit, secure mappings */ 89*6e159e7aSVarun Wadekar write_scr(cm_get_scr_el3(SECURE)); 90*6e159e7aSVarun Wadekar isb(); 91*6e159e7aSVarun Wadekar } 92*6e159e7aSVarun Wadekar 93*6e159e7aSVarun Wadekar return pa; 94*6e159e7aSVarun Wadekar } 95*6e159e7aSVarun Wadekar 9622038315SVarun Wadekar /******************************************************************************* 9722038315SVarun Wadekar * Given a secure payload entrypoint, register width, cpu id & pointer to a 9822038315SVarun Wadekar * context data structure, this function will create a secure context ready for 9922038315SVarun Wadekar * programming an entry into the secure payload. 10022038315SVarun Wadekar ******************************************************************************/ 10122038315SVarun Wadekar void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point, 10222038315SVarun Wadekar uint32_t rw, 10322038315SVarun Wadekar uint64_t pc, 10422038315SVarun Wadekar tlk_context_t *tlk_ctx) 10522038315SVarun Wadekar { 10622038315SVarun Wadekar uint32_t ep_attr, spsr; 10722038315SVarun Wadekar 10822038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 10922038315SVarun Wadekar assert(tlk_ctx); 11022038315SVarun Wadekar assert(tlk_entry_point); 11122038315SVarun Wadekar assert(pc); 11222038315SVarun Wadekar 11322038315SVarun Wadekar /* Associate this context with the cpu specified */ 11422038315SVarun Wadekar tlk_ctx->mpidr = read_mpidr_el1(); 11522038315SVarun Wadekar clr_std_smc_active_flag(tlk_ctx->state); 11622038315SVarun Wadekar cm_set_context(&tlk_ctx->cpu_ctx, SECURE); 11722038315SVarun Wadekar 11822038315SVarun Wadekar if (rw == SP_AARCH64) 11922038315SVarun Wadekar spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 12022038315SVarun Wadekar else 12122038315SVarun Wadekar spsr = SPSR_MODE32(MODE32_svc, 12222038315SVarun Wadekar SPSR_T_ARM, 12322038315SVarun Wadekar read_sctlr_el3() & SCTLR_EE_BIT, 12422038315SVarun Wadekar DISABLE_ALL_EXCEPTIONS); 12522038315SVarun Wadekar 12622038315SVarun Wadekar /* initialise an entrypoint to set up the CPU context */ 12722038315SVarun Wadekar ep_attr = SECURE | EP_ST_ENABLE; 12822038315SVarun Wadekar if (read_sctlr_el3() & SCTLR_EE_BIT) 12922038315SVarun Wadekar ep_attr |= EP_EE_BIG; 13022038315SVarun Wadekar SET_PARAM_HEAD(tlk_entry_point, PARAM_EP, VERSION_1, ep_attr); 13122038315SVarun Wadekar 13222038315SVarun Wadekar tlk_entry_point->pc = pc; 13322038315SVarun Wadekar tlk_entry_point->spsr = spsr; 13422038315SVarun Wadekar } 13522038315SVarun Wadekar 13622038315SVarun Wadekar /******************************************************************************* 13722038315SVarun Wadekar * This function takes a TLK context pointer and: 13822038315SVarun Wadekar * 1. Applies the S-EL1 system register context from tlk_ctx->cpu_ctx. 13922038315SVarun Wadekar * 2. Saves the current C runtime state (callee saved registers) on the stack 14022038315SVarun Wadekar * frame and saves a reference to this state. 14122038315SVarun Wadekar * 3. Calls el3_exit() so that the EL3 system and general purpose registers 14222038315SVarun Wadekar * from the tlk_ctx->cpu_ctx are used to enter the secure payload image. 14322038315SVarun Wadekar ******************************************************************************/ 14422038315SVarun Wadekar uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx) 14522038315SVarun Wadekar { 14622038315SVarun Wadekar uint64_t rc; 14722038315SVarun Wadekar 14822038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 14922038315SVarun Wadekar assert(tlk_ctx); 15022038315SVarun Wadekar assert(tlk_ctx->c_rt_ctx == 0); 15122038315SVarun Wadekar 15222038315SVarun Wadekar /* Apply the Secure EL1 system register context and switch to it */ 15322038315SVarun Wadekar assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); 15422038315SVarun Wadekar cm_el1_sysregs_context_restore(SECURE); 15522038315SVarun Wadekar cm_set_next_eret_context(SECURE); 15622038315SVarun Wadekar 15722038315SVarun Wadekar rc = tlkd_enter_sp(&tlk_ctx->c_rt_ctx); 15822038315SVarun Wadekar #if DEBUG 15922038315SVarun Wadekar tlk_ctx->c_rt_ctx = 0; 16022038315SVarun Wadekar #endif 16122038315SVarun Wadekar 16222038315SVarun Wadekar return rc; 16322038315SVarun Wadekar } 16422038315SVarun Wadekar 16522038315SVarun Wadekar /******************************************************************************* 16622038315SVarun Wadekar * This function takes a TLK context pointer and: 16722038315SVarun Wadekar * 1. Saves the S-EL1 system register context to tlk_ctx->cpu_ctx. 16822038315SVarun Wadekar * 2. Restores the current C runtime state (callee saved registers) from the 16922038315SVarun Wadekar * stack frame using reference to this state saved in tlkd_enter_sp(). 17022038315SVarun Wadekar * 3. It does not need to save any general purpose or EL3 system register state 17122038315SVarun Wadekar * as the generic smc entry routine should have saved those. 17222038315SVarun Wadekar ******************************************************************************/ 17322038315SVarun Wadekar void tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, uint64_t ret) 17422038315SVarun Wadekar { 17522038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 17622038315SVarun Wadekar assert(tlk_ctx); 17722038315SVarun Wadekar 17822038315SVarun Wadekar /* Save the Secure EL1 system register context */ 17922038315SVarun Wadekar assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); 18022038315SVarun Wadekar cm_el1_sysregs_context_save(SECURE); 18122038315SVarun Wadekar 18222038315SVarun Wadekar assert(tlk_ctx->c_rt_ctx != 0); 18322038315SVarun Wadekar tlkd_exit_sp(tlk_ctx->c_rt_ctx, ret); 18422038315SVarun Wadekar 18522038315SVarun Wadekar /* Should never reach here */ 18622038315SVarun Wadekar assert(0); 18722038315SVarun Wadekar } 188