1*22038315SVarun Wadekar /* 2*22038315SVarun Wadekar * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*22038315SVarun Wadekar * 4*22038315SVarun Wadekar * Redistribution and use in source and binary forms, with or without 5*22038315SVarun Wadekar * modification, are permitted provided that the following conditions are met: 6*22038315SVarun Wadekar * 7*22038315SVarun Wadekar * Redistributions of source code must retain the above copyright notice, this 8*22038315SVarun Wadekar * list of conditions and the following disclaimer. 9*22038315SVarun Wadekar * 10*22038315SVarun Wadekar * Redistributions in binary form must reproduce the above copyright notice, 11*22038315SVarun Wadekar * this list of conditions and the following disclaimer in the documentation 12*22038315SVarun Wadekar * and/or other materials provided with the distribution. 13*22038315SVarun Wadekar * 14*22038315SVarun Wadekar * Neither the name of ARM nor the names of its contributors may be used 15*22038315SVarun Wadekar * to endorse or promote products derived from this software without specific 16*22038315SVarun Wadekar * prior written permission. 17*22038315SVarun Wadekar * 18*22038315SVarun Wadekar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*22038315SVarun Wadekar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*22038315SVarun Wadekar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*22038315SVarun Wadekar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*22038315SVarun Wadekar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*22038315SVarun Wadekar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*22038315SVarun Wadekar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*22038315SVarun Wadekar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*22038315SVarun Wadekar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*22038315SVarun Wadekar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*22038315SVarun Wadekar * POSSIBILITY OF SUCH DAMAGE. 29*22038315SVarun Wadekar */ 30*22038315SVarun Wadekar 31*22038315SVarun Wadekar #include <arch_helpers.h> 32*22038315SVarun Wadekar #include <assert.h> 33*22038315SVarun Wadekar #include <bl_common.h> 34*22038315SVarun Wadekar #include <context_mgmt.h> 35*22038315SVarun Wadekar #include <string.h> 36*22038315SVarun Wadekar #include "tlkd_private.h" 37*22038315SVarun Wadekar 38*22038315SVarun Wadekar /******************************************************************************* 39*22038315SVarun Wadekar * Given a secure payload entrypoint, register width, cpu id & pointer to a 40*22038315SVarun Wadekar * context data structure, this function will create a secure context ready for 41*22038315SVarun Wadekar * programming an entry into the secure payload. 42*22038315SVarun Wadekar ******************************************************************************/ 43*22038315SVarun Wadekar void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point, 44*22038315SVarun Wadekar uint32_t rw, 45*22038315SVarun Wadekar uint64_t pc, 46*22038315SVarun Wadekar tlk_context_t *tlk_ctx) 47*22038315SVarun Wadekar { 48*22038315SVarun Wadekar uint32_t ep_attr, spsr; 49*22038315SVarun Wadekar 50*22038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 51*22038315SVarun Wadekar assert(tlk_ctx); 52*22038315SVarun Wadekar assert(tlk_entry_point); 53*22038315SVarun Wadekar assert(pc); 54*22038315SVarun Wadekar 55*22038315SVarun Wadekar /* Associate this context with the cpu specified */ 56*22038315SVarun Wadekar tlk_ctx->mpidr = read_mpidr_el1(); 57*22038315SVarun Wadekar clr_std_smc_active_flag(tlk_ctx->state); 58*22038315SVarun Wadekar cm_set_context(&tlk_ctx->cpu_ctx, SECURE); 59*22038315SVarun Wadekar 60*22038315SVarun Wadekar if (rw == SP_AARCH64) 61*22038315SVarun Wadekar spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 62*22038315SVarun Wadekar else 63*22038315SVarun Wadekar spsr = SPSR_MODE32(MODE32_svc, 64*22038315SVarun Wadekar SPSR_T_ARM, 65*22038315SVarun Wadekar read_sctlr_el3() & SCTLR_EE_BIT, 66*22038315SVarun Wadekar DISABLE_ALL_EXCEPTIONS); 67*22038315SVarun Wadekar 68*22038315SVarun Wadekar /* initialise an entrypoint to set up the CPU context */ 69*22038315SVarun Wadekar ep_attr = SECURE | EP_ST_ENABLE; 70*22038315SVarun Wadekar if (read_sctlr_el3() & SCTLR_EE_BIT) 71*22038315SVarun Wadekar ep_attr |= EP_EE_BIG; 72*22038315SVarun Wadekar SET_PARAM_HEAD(tlk_entry_point, PARAM_EP, VERSION_1, ep_attr); 73*22038315SVarun Wadekar 74*22038315SVarun Wadekar tlk_entry_point->pc = pc; 75*22038315SVarun Wadekar tlk_entry_point->spsr = spsr; 76*22038315SVarun Wadekar } 77*22038315SVarun Wadekar 78*22038315SVarun Wadekar /******************************************************************************* 79*22038315SVarun Wadekar * This function takes a TLK context pointer and: 80*22038315SVarun Wadekar * 1. Applies the S-EL1 system register context from tlk_ctx->cpu_ctx. 81*22038315SVarun Wadekar * 2. Saves the current C runtime state (callee saved registers) on the stack 82*22038315SVarun Wadekar * frame and saves a reference to this state. 83*22038315SVarun Wadekar * 3. Calls el3_exit() so that the EL3 system and general purpose registers 84*22038315SVarun Wadekar * from the tlk_ctx->cpu_ctx are used to enter the secure payload image. 85*22038315SVarun Wadekar ******************************************************************************/ 86*22038315SVarun Wadekar uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx) 87*22038315SVarun Wadekar { 88*22038315SVarun Wadekar uint64_t rc; 89*22038315SVarun Wadekar 90*22038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 91*22038315SVarun Wadekar assert(tlk_ctx); 92*22038315SVarun Wadekar assert(tlk_ctx->c_rt_ctx == 0); 93*22038315SVarun Wadekar 94*22038315SVarun Wadekar /* Apply the Secure EL1 system register context and switch to it */ 95*22038315SVarun Wadekar assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); 96*22038315SVarun Wadekar cm_el1_sysregs_context_restore(SECURE); 97*22038315SVarun Wadekar cm_set_next_eret_context(SECURE); 98*22038315SVarun Wadekar 99*22038315SVarun Wadekar rc = tlkd_enter_sp(&tlk_ctx->c_rt_ctx); 100*22038315SVarun Wadekar #if DEBUG 101*22038315SVarun Wadekar tlk_ctx->c_rt_ctx = 0; 102*22038315SVarun Wadekar #endif 103*22038315SVarun Wadekar 104*22038315SVarun Wadekar return rc; 105*22038315SVarun Wadekar } 106*22038315SVarun Wadekar 107*22038315SVarun Wadekar /******************************************************************************* 108*22038315SVarun Wadekar * This function takes a TLK context pointer and: 109*22038315SVarun Wadekar * 1. Saves the S-EL1 system register context to tlk_ctx->cpu_ctx. 110*22038315SVarun Wadekar * 2. Restores the current C runtime state (callee saved registers) from the 111*22038315SVarun Wadekar * stack frame using reference to this state saved in tlkd_enter_sp(). 112*22038315SVarun Wadekar * 3. It does not need to save any general purpose or EL3 system register state 113*22038315SVarun Wadekar * as the generic smc entry routine should have saved those. 114*22038315SVarun Wadekar ******************************************************************************/ 115*22038315SVarun Wadekar void tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, uint64_t ret) 116*22038315SVarun Wadekar { 117*22038315SVarun Wadekar /* Passing a NULL context is a critical programming error */ 118*22038315SVarun Wadekar assert(tlk_ctx); 119*22038315SVarun Wadekar 120*22038315SVarun Wadekar /* Save the Secure EL1 system register context */ 121*22038315SVarun Wadekar assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); 122*22038315SVarun Wadekar cm_el1_sysregs_context_save(SECURE); 123*22038315SVarun Wadekar 124*22038315SVarun Wadekar assert(tlk_ctx->c_rt_ctx != 0); 125*22038315SVarun Wadekar tlkd_exit_sp(tlk_ctx->c_rt_ctx, ret); 126*22038315SVarun Wadekar 127*22038315SVarun Wadekar /* Should never reach here */ 128*22038315SVarun Wadekar assert(0); 129*22038315SVarun Wadekar } 130