1*b0980e58SFlorian Lugou /* 2*b0980e58SFlorian Lugou * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. 3*b0980e58SFlorian Lugou * Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. 4*b0980e58SFlorian Lugou * 5*b0980e58SFlorian Lugou * SPDX-License-Identifier: BSD-3-Clause 6*b0980e58SFlorian Lugou */ 7*b0980e58SFlorian Lugou 8*b0980e58SFlorian Lugou #ifndef __PNCD_PRIVATE_H__ 9*b0980e58SFlorian Lugou #define __PNCD_PRIVATE_H__ 10*b0980e58SFlorian Lugou 11*b0980e58SFlorian Lugou #ifndef __ASSEMBLER__ 12*b0980e58SFlorian Lugou #include <stdint.h> 13*b0980e58SFlorian Lugou #endif /* __ASSEMBLER __ */ 14*b0980e58SFlorian Lugou 15*b0980e58SFlorian Lugou #include <context.h> 16*b0980e58SFlorian Lugou #ifndef __ASSEMBLER__ 17*b0980e58SFlorian Lugou #include <lib/cassert.h> 18*b0980e58SFlorian Lugou #endif /* __ASSEMBLER __ */ 19*b0980e58SFlorian Lugou 20*b0980e58SFlorian Lugou #include <platform_def.h> 21*b0980e58SFlorian Lugou 22*b0980e58SFlorian Lugou /******************************************************************************* 23*b0980e58SFlorian Lugou * Constants that allow assembler code to preserve callee-saved registers of the 24*b0980e58SFlorian Lugou * C runtime context while performing a security state switch. 25*b0980e58SFlorian Lugou ******************************************************************************/ 26*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X19 U(0x0) 27*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X20 U(0x8) 28*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X21 U(0x10) 29*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X22 U(0x18) 30*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X23 U(0x20) 31*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X24 U(0x28) 32*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X25 U(0x30) 33*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X26 U(0x38) 34*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X27 U(0x40) 35*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X28 U(0x48) 36*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X29 U(0x50) 37*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_X30 U(0x58) 38*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_SIZE U(0x60) 39*b0980e58SFlorian Lugou #define PNCD_C_RT_CTX_ENTRIES (PNCD_C_RT_CTX_SIZE >> DWORD_SHIFT) 40*b0980e58SFlorian Lugou 41*b0980e58SFlorian Lugou #ifndef __ASSEMBLER__ 42*b0980e58SFlorian Lugou 43*b0980e58SFlorian Lugou /* AArch64 callee saved general purpose register context structure. */ 44*b0980e58SFlorian Lugou DEFINE_REG_STRUCT(c_rt_regs, PNCD_C_RT_CTX_ENTRIES); 45*b0980e58SFlorian Lugou 46*b0980e58SFlorian Lugou /* 47*b0980e58SFlorian Lugou * Compile time assertion to ensure that both the compiler and linker 48*b0980e58SFlorian Lugou * have the same double word aligned view of the size of the C runtime 49*b0980e58SFlorian Lugou * register context. 50*b0980e58SFlorian Lugou */ 51*b0980e58SFlorian Lugou CASSERT(sizeof(c_rt_regs_t) == PNCD_C_RT_CTX_SIZE, 52*b0980e58SFlorian Lugou assert_spd_c_rt_regs_size_mismatch); 53*b0980e58SFlorian Lugou 54*b0980e58SFlorian Lugou /******************************************************************************* 55*b0980e58SFlorian Lugou * Structure which helps the SPD to maintain the per-cpu state of the SP. 56*b0980e58SFlorian Lugou * 'mpidr' - mpidr of the CPU running PNC 57*b0980e58SFlorian Lugou * 'c_rt_ctx' - stack address to restore C runtime context from after 58*b0980e58SFlorian Lugou * returning from a synchronous entry into the SP. 59*b0980e58SFlorian Lugou * 'cpu_ctx' - space to maintain SP architectural state 60*b0980e58SFlorian Lugou ******************************************************************************/ 61*b0980e58SFlorian Lugou typedef struct pnc_context { 62*b0980e58SFlorian Lugou uint64_t mpidr; 63*b0980e58SFlorian Lugou uint64_t c_rt_ctx; 64*b0980e58SFlorian Lugou cpu_context_t cpu_ctx; 65*b0980e58SFlorian Lugou } pnc_context_t; 66*b0980e58SFlorian Lugou 67*b0980e58SFlorian Lugou /******************************************************************************* 68*b0980e58SFlorian Lugou * Function & Data prototypes 69*b0980e58SFlorian Lugou ******************************************************************************/ 70*b0980e58SFlorian Lugou uint64_t pncd_enter_sp(uint64_t *c_rt_ctx); 71*b0980e58SFlorian Lugou void __dead2 pncd_exit_sp(uint64_t c_rt_ctx, uint64_t ret); 72*b0980e58SFlorian Lugou uint64_t pncd_synchronous_sp_entry(pnc_context_t *pnc_ctx); 73*b0980e58SFlorian Lugou void __dead2 pncd_synchronous_sp_exit(pnc_context_t *pnc_ctx, uint64_t ret); 74*b0980e58SFlorian Lugou void pncd_init_pnc_ep_state(struct entry_point_info *pnc_ep, 75*b0980e58SFlorian Lugou uint64_t pc, 76*b0980e58SFlorian Lugou pnc_context_t *pnc_ctx); 77*b0980e58SFlorian Lugou #endif /* __ASSEMBLER__ */ 78*b0980e58SFlorian Lugou 79*b0980e58SFlorian Lugou #endif /* __PNCD_PRIVATE_H__ */ 80