1b0980e58SFlorian Lugou /* 2b0980e58SFlorian Lugou * Copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. 3b0980e58SFlorian Lugou * 4b0980e58SFlorian Lugou * SPDX-License-Identifier: BSD-3-Clause 5b0980e58SFlorian Lugou */ 6b0980e58SFlorian Lugou 7b0980e58SFlorian Lugou #include <assert.h> 8b0980e58SFlorian Lugou #include <string.h> 9b0980e58SFlorian Lugou 10b0980e58SFlorian Lugou #include <arch_helpers.h> 11b0980e58SFlorian Lugou #include <common/bl_common.h> 12b0980e58SFlorian Lugou #include <common/debug.h> 13b0980e58SFlorian Lugou #include <lib/el3_runtime/context_mgmt.h> 14b0980e58SFlorian Lugou #include <lib/utils.h> 15b0980e58SFlorian Lugou #include <plat/common/platform.h> 16b0980e58SFlorian Lugou 17b0980e58SFlorian Lugou #include "pncd_private.h" 18b0980e58SFlorian Lugou 19b0980e58SFlorian Lugou /******************************************************************************* 20b0980e58SFlorian Lugou * Given a secure payload entrypoint info pointer, entry point PC & pointer to a 21b0980e58SFlorian Lugou * context data structure, this function will initialize pnc context and entry 22b0980e58SFlorian Lugou * point info for the secure payload 23b0980e58SFlorian Lugou ******************************************************************************/ 24b0980e58SFlorian Lugou void pncd_init_pnc_ep_state(struct entry_point_info *pnc_entry_point, 25b0980e58SFlorian Lugou uint64_t pc, 26b0980e58SFlorian Lugou pnc_context_t *pnc_ctx) 27b0980e58SFlorian Lugou { 28b0980e58SFlorian Lugou uint32_t ep_attr; 29b0980e58SFlorian Lugou 30b0980e58SFlorian Lugou /* Passing a NULL context is a critical programming error */ 31b0980e58SFlorian Lugou assert(pnc_ctx); 32b0980e58SFlorian Lugou assert(pnc_entry_point); 33b0980e58SFlorian Lugou assert(pc); 34b0980e58SFlorian Lugou 35b0980e58SFlorian Lugou /* Associate this context with the current cpu */ 36b0980e58SFlorian Lugou pnc_ctx->mpidr = read_mpidr(); 37b0980e58SFlorian Lugou 38b0980e58SFlorian Lugou cm_set_context(&pnc_ctx->cpu_ctx, SECURE); 39b0980e58SFlorian Lugou 40b0980e58SFlorian Lugou /* initialise an entrypoint to set up the CPU context */ 41b0980e58SFlorian Lugou ep_attr = SECURE | EP_ST_ENABLE; 42b0980e58SFlorian Lugou if (read_sctlr_el3() & SCTLR_EE_BIT) { 43b0980e58SFlorian Lugou ep_attr |= EP_EE_BIG; 44b0980e58SFlorian Lugou } 45b0980e58SFlorian Lugou SET_PARAM_HEAD(pnc_entry_point, PARAM_EP, VERSION_1, ep_attr); 46b0980e58SFlorian Lugou 47b0980e58SFlorian Lugou pnc_entry_point->pc = pc; 48b0980e58SFlorian Lugou pnc_entry_point->spsr = SPSR_64(MODE_EL1, 49b0980e58SFlorian Lugou MODE_SP_ELX, 50b0980e58SFlorian Lugou DISABLE_ALL_EXCEPTIONS); 51b0980e58SFlorian Lugou memset(&pnc_entry_point->args, 0, sizeof(pnc_entry_point->args)); 52b0980e58SFlorian Lugou } 53b0980e58SFlorian Lugou 54b0980e58SFlorian Lugou /******************************************************************************* 55b0980e58SFlorian Lugou * This function takes an SP context pointer and: 56b0980e58SFlorian Lugou * 1. Applies the S-EL1 system register context from pnc_ctx->cpu_ctx. 57b0980e58SFlorian Lugou * 2. Saves the current C runtime state (callee saved registers) on the stack 58b0980e58SFlorian Lugou * frame and saves a reference to this state. 59b0980e58SFlorian Lugou * 3. Calls el3_exit() so that the EL3 system and general purpose registers 60b0980e58SFlorian Lugou * from the pnc_ctx->cpu_ctx are used to enter the secure payload image. 61b0980e58SFlorian Lugou ******************************************************************************/ 62b0980e58SFlorian Lugou uint64_t pncd_synchronous_sp_entry(pnc_context_t *pnc_ctx) 63b0980e58SFlorian Lugou { 64b0980e58SFlorian Lugou assert(pnc_ctx != NULL); 65b0980e58SFlorian Lugou assert(pnc_ctx->c_rt_ctx == 0U); 66b0980e58SFlorian Lugou 67b0980e58SFlorian Lugou /* Apply the Secure EL1 system register context and switch to it */ 68b0980e58SFlorian Lugou assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx); 69b0980e58SFlorian Lugou cm_el1_sysregs_context_restore(SECURE); 70*a9b64ed9SMadhukar Pappireddy 71b0980e58SFlorian Lugou #if CTX_INCLUDE_FPREGS 72*a9b64ed9SMadhukar Pappireddy simd_ctx_restore(SECURE); 73b0980e58SFlorian Lugou #endif 74b0980e58SFlorian Lugou cm_set_next_eret_context(SECURE); 75b0980e58SFlorian Lugou 76b0980e58SFlorian Lugou return pncd_enter_sp(&pnc_ctx->c_rt_ctx); 77b0980e58SFlorian Lugou } 78b0980e58SFlorian Lugou 79b0980e58SFlorian Lugou 80b0980e58SFlorian Lugou /******************************************************************************* 81b0980e58SFlorian Lugou * This function takes an SP context pointer and: 82b0980e58SFlorian Lugou * 1. Saves the S-EL1 system register context tp pnc_ctx->cpu_ctx. 83b0980e58SFlorian Lugou * 2. Restores the current C runtime state (callee saved registers) from the 84b0980e58SFlorian Lugou * stack frame using the reference to this state saved in pncd_enter_sp(). 85b0980e58SFlorian Lugou * 3. It does not need to save any general purpose or EL3 system register state 86b0980e58SFlorian Lugou * as the generic smc entry routine should have saved those. 87b0980e58SFlorian Lugou ******************************************************************************/ 88b0980e58SFlorian Lugou void pncd_synchronous_sp_exit(pnc_context_t *pnc_ctx, uint64_t ret) 89b0980e58SFlorian Lugou { 90b0980e58SFlorian Lugou assert(pnc_ctx != NULL); 91b0980e58SFlorian Lugou /* Save the Secure EL1 system register context */ 92b0980e58SFlorian Lugou assert(cm_get_context(SECURE) == &pnc_ctx->cpu_ctx); 93b0980e58SFlorian Lugou cm_el1_sysregs_context_save(SECURE); 94*a9b64ed9SMadhukar Pappireddy 95b0980e58SFlorian Lugou #if CTX_INCLUDE_FPREGS 96*a9b64ed9SMadhukar Pappireddy simd_ctx_save(SECURE, false); 97b0980e58SFlorian Lugou #endif 98b0980e58SFlorian Lugou 99b0980e58SFlorian Lugou assert(pnc_ctx->c_rt_ctx != 0); 100b0980e58SFlorian Lugou pncd_exit_sp(pnc_ctx->c_rt_ctx, ret); 101b0980e58SFlorian Lugou 102b0980e58SFlorian Lugou /* Should never reach here */ 103b0980e58SFlorian Lugou panic(); 104b0980e58SFlorian Lugou } 105