1 /* 2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 32 /******************************************************************************* 33 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 34 * plug-in component to the Secure Monitor, registered as a runtime service. The 35 * SPD is expected to be a functional extension of the Secure Payload (SP) that 36 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 37 * the Trusted OS/Applications range to the dispatcher. The SPD will either 38 * handle the request locally or delegate it to the Secure Payload. It is also 39 * responsible for initialising and maintaining communication with the SP. 40 ******************************************************************************/ 41 #include <arch_helpers.h> 42 #include <assert.h> 43 #include <bl_common.h> 44 #include <bl31.h> 45 #include <context_mgmt.h> 46 #include <debug.h> 47 #include <errno.h> 48 #include <platform.h> 49 #include <runtime_svc.h> 50 #include <stddef.h> 51 #include <uuid.h> 52 #include "opteed_private.h" 53 #include "teesmc_opteed_macros.h" 54 #include "teesmc_opteed.h" 55 56 /******************************************************************************* 57 * Address of the entrypoint vector table in OPTEE. It is 58 * initialised once on the primary core after a cold boot. 59 ******************************************************************************/ 60 optee_vectors_t *optee_vectors; 61 62 /******************************************************************************* 63 * Array to keep track of per-cpu OPTEE state 64 ******************************************************************************/ 65 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 66 uint32_t opteed_rw; 67 68 69 70 static int32_t opteed_init(void); 71 72 /******************************************************************************* 73 * This function is the handler registered for S-EL1 interrupts by the 74 * OPTEED. It validates the interrupt and upon success arranges entry into 75 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 76 ******************************************************************************/ 77 static uint64_t opteed_sel1_interrupt_handler(uint32_t id, 78 uint32_t flags, 79 void *handle, 80 void *cookie) 81 { 82 uint32_t linear_id; 83 optee_context_t *optee_ctx; 84 85 /* Check the security state when the exception was generated */ 86 assert(get_interrupt_src_ss(flags) == NON_SECURE); 87 88 #if IMF_READ_INTERRUPT_ID 89 /* Check the security status of the interrupt */ 90 assert(plat_ic_get_interrupt_type(id) == INTR_TYPE_S_EL1); 91 #endif 92 93 /* Sanity check the pointer to this cpu's context */ 94 assert(handle == cm_get_context(NON_SECURE)); 95 96 /* Save the non-secure context before entering the OPTEE */ 97 cm_el1_sysregs_context_save(NON_SECURE); 98 99 /* Get a reference to this cpu's OPTEE context */ 100 linear_id = plat_my_core_pos(); 101 optee_ctx = &opteed_sp_context[linear_id]; 102 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 103 104 cm_set_elr_el3(SECURE, (uint64_t)&optee_vectors->fiq_entry); 105 cm_el1_sysregs_context_restore(SECURE); 106 cm_set_next_eret_context(SECURE); 107 108 /* 109 * Tell the OPTEE that it has to handle an FIQ (synchronously). 110 * Also the instruction in normal world where the interrupt was 111 * generated is passed for debugging purposes. It is safe to 112 * retrieve this address from ELR_EL3 as the secure context will 113 * not take effect until el3_exit(). 114 */ 115 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 116 } 117 118 /******************************************************************************* 119 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 120 * (aarch32/aarch64) if not already known and initialises the context for entry 121 * into OPTEE for its initialization. 122 ******************************************************************************/ 123 int32_t opteed_setup(void) 124 { 125 entry_point_info_t *optee_ep_info; 126 uint32_t linear_id; 127 128 linear_id = plat_my_core_pos(); 129 130 /* 131 * Get information about the Secure Payload (BL32) image. Its 132 * absence is a critical failure. TODO: Add support to 133 * conditionally include the SPD service 134 */ 135 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 136 if (!optee_ep_info) { 137 WARN("No OPTEE provided by BL2 boot loader, Booting device" 138 " without OPTEE initialization. SMC`s destined for OPTEE" 139 " will return SMC_UNK\n"); 140 return 1; 141 } 142 143 /* 144 * If there's no valid entry point for SP, we return a non-zero value 145 * signalling failure initializing the service. We bail out without 146 * registering any handlers 147 */ 148 if (!optee_ep_info->pc) 149 return 1; 150 151 /* 152 * We could inspect the SP image and determine it's execution 153 * state i.e whether AArch32 or AArch64. Assuming it's AArch32 154 * for the time being. 155 */ 156 opteed_rw = OPTEE_AARCH32; 157 opteed_init_optee_ep_state(optee_ep_info, 158 opteed_rw, 159 optee_ep_info->pc, 160 &opteed_sp_context[linear_id]); 161 162 /* 163 * All OPTEED initialization done. Now register our init function with 164 * BL31 for deferred invocation 165 */ 166 bl31_register_bl32_init(&opteed_init); 167 168 return 0; 169 } 170 171 /******************************************************************************* 172 * This function passes control to the OPTEE image (BL32) for the first time 173 * on the primary cpu after a cold boot. It assumes that a valid secure 174 * context has already been created by opteed_setup() which can be directly 175 * used. It also assumes that a valid non-secure context has been 176 * initialised by PSCI so it does not need to save and restore any 177 * non-secure state. This function performs a synchronous entry into 178 * OPTEE. OPTEE passes control back to this routine through a SMC. 179 ******************************************************************************/ 180 static int32_t opteed_init(void) 181 { 182 uint32_t linear_id = plat_my_core_pos(); 183 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 184 entry_point_info_t *optee_entry_point; 185 uint64_t rc; 186 187 /* 188 * Get information about the OPTEE (BL32) image. Its 189 * absence is a critical failure. 190 */ 191 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 192 assert(optee_entry_point); 193 194 cm_init_my_context(optee_entry_point); 195 196 /* 197 * Arrange for an entry into OPTEE. It will be returned via 198 * OPTEE_ENTRY_DONE case 199 */ 200 rc = opteed_synchronous_sp_entry(optee_ctx); 201 assert(rc != 0); 202 203 return rc; 204 } 205 206 207 /******************************************************************************* 208 * This function is responsible for handling all SMCs in the Trusted OS/App 209 * range from the non-secure state as defined in the SMC Calling Convention 210 * Document. It is also responsible for communicating with the Secure 211 * payload to delegate work and return results back to the non-secure 212 * state. Lastly it will also return any information that OPTEE needs to do 213 * the work assigned to it. 214 ******************************************************************************/ 215 uint64_t opteed_smc_handler(uint32_t smc_fid, 216 uint64_t x1, 217 uint64_t x2, 218 uint64_t x3, 219 uint64_t x4, 220 void *cookie, 221 void *handle, 222 uint64_t flags) 223 { 224 cpu_context_t *ns_cpu_context; 225 uint32_t linear_id = plat_my_core_pos(); 226 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 227 uint64_t rc; 228 229 /* 230 * Determine which security state this SMC originated from 231 */ 232 233 if (is_caller_non_secure(flags)) { 234 /* 235 * This is a fresh request from the non-secure client. 236 * The parameters are in x1 and x2. Figure out which 237 * registers need to be preserved, save the non-secure 238 * state and send the request to the secure payload. 239 */ 240 assert(handle == cm_get_context(NON_SECURE)); 241 242 cm_el1_sysregs_context_save(NON_SECURE); 243 244 /* 245 * We are done stashing the non-secure context. Ask the 246 * OPTEE to do the work now. 247 */ 248 249 /* 250 * Verify if there is a valid context to use, copy the 251 * operation type and parameters to the secure context 252 * and jump to the fast smc entry point in the secure 253 * payload. Entry into S-EL1 will take place upon exit 254 * from this function. 255 */ 256 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 257 258 /* Set appropriate entry for SMC. 259 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 260 * flags as appropriate. 261 */ 262 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 263 cm_set_elr_el3(SECURE, (uint64_t) 264 &optee_vectors->fast_smc_entry); 265 } else { 266 cm_set_elr_el3(SECURE, (uint64_t) 267 &optee_vectors->std_smc_entry); 268 } 269 270 cm_el1_sysregs_context_restore(SECURE); 271 cm_set_next_eret_context(SECURE); 272 273 /* Propagate hypervisor client ID */ 274 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 275 CTX_GPREG_X7, 276 read_ctx_reg(get_gpregs_ctx(handle), 277 CTX_GPREG_X7)); 278 279 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 280 } 281 282 /* 283 * Returning from OPTEE 284 */ 285 286 switch (smc_fid) { 287 /* 288 * OPTEE has finished initialising itself after a cold boot 289 */ 290 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 291 /* 292 * Stash the OPTEE entry points information. This is done 293 * only once on the primary cpu 294 */ 295 assert(optee_vectors == NULL); 296 optee_vectors = (optee_vectors_t *) x1; 297 298 if (optee_vectors) { 299 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 300 301 /* 302 * OPTEE has been successfully initialized. 303 * Register power management hooks with PSCI 304 */ 305 psci_register_spd_pm_hook(&opteed_pm); 306 307 /* 308 * Register an interrupt handler for S-EL1 interrupts 309 * when generated during code executing in the 310 * non-secure state. 311 */ 312 flags = 0; 313 set_interrupt_rm_flag(flags, NON_SECURE); 314 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 315 opteed_sel1_interrupt_handler, 316 flags); 317 if (rc) 318 panic(); 319 } 320 321 /* 322 * OPTEE reports completion. The OPTEED must have initiated 323 * the original request through a synchronous entry into 324 * OPTEE. Jump back to the original C runtime context. 325 */ 326 opteed_synchronous_sp_exit(optee_ctx, x1); 327 328 329 /* 330 * These function IDs is used only by OP-TEE to indicate it has 331 * finished: 332 * 1. turning itself on in response to an earlier psci 333 * cpu_on request 334 * 2. resuming itself after an earlier psci cpu_suspend 335 * request. 336 */ 337 case TEESMC_OPTEED_RETURN_ON_DONE: 338 case TEESMC_OPTEED_RETURN_RESUME_DONE: 339 340 341 /* 342 * These function IDs is used only by the SP to indicate it has 343 * finished: 344 * 1. suspending itself after an earlier psci cpu_suspend 345 * request. 346 * 2. turning itself off in response to an earlier psci 347 * cpu_off request. 348 */ 349 case TEESMC_OPTEED_RETURN_OFF_DONE: 350 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 351 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 352 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 353 354 /* 355 * OPTEE reports completion. The OPTEED must have initiated the 356 * original request through a synchronous entry into OPTEE. 357 * Jump back to the original C runtime context, and pass x1 as 358 * return value to the caller 359 */ 360 opteed_synchronous_sp_exit(optee_ctx, x1); 361 362 /* 363 * OPTEE is returning from a call or being preempted from a call, in 364 * either case execution should resume in the normal world. 365 */ 366 case TEESMC_OPTEED_RETURN_CALL_DONE: 367 /* 368 * This is the result from the secure client of an 369 * earlier request. The results are in x0-x3. Copy it 370 * into the non-secure context, save the secure state 371 * and return to the non-secure state. 372 */ 373 assert(handle == cm_get_context(SECURE)); 374 cm_el1_sysregs_context_save(SECURE); 375 376 /* Get a reference to the non-secure context */ 377 ns_cpu_context = cm_get_context(NON_SECURE); 378 assert(ns_cpu_context); 379 380 /* Restore non-secure state */ 381 cm_el1_sysregs_context_restore(NON_SECURE); 382 cm_set_next_eret_context(NON_SECURE); 383 384 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 385 386 /* 387 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 388 * should resume in the normal world. 389 */ 390 case TEESMC_OPTEED_RETURN_FIQ_DONE: 391 /* Get a reference to the non-secure context */ 392 ns_cpu_context = cm_get_context(NON_SECURE); 393 assert(ns_cpu_context); 394 395 /* 396 * Restore non-secure state. There is no need to save the 397 * secure system register context since OPTEE was supposed 398 * to preserve it during S-EL1 interrupt handling. 399 */ 400 cm_el1_sysregs_context_restore(NON_SECURE); 401 cm_set_next_eret_context(NON_SECURE); 402 403 SMC_RET0((uint64_t) ns_cpu_context); 404 405 default: 406 panic(); 407 } 408 } 409 410 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 411 DECLARE_RT_SVC( 412 opteed_fast, 413 414 OEN_TOS_START, 415 OEN_TOS_END, 416 SMC_TYPE_FAST, 417 opteed_setup, 418 opteed_smc_handler 419 ); 420 421 /* Define an OPTEED runtime service descriptor for standard SMC calls */ 422 DECLARE_RT_SVC( 423 opteed_std, 424 425 OEN_TOS_START, 426 OEN_TOS_END, 427 SMC_TYPE_STD, 428 NULL, 429 opteed_smc_handler 430 ); 431