1 /* 2 * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8 /******************************************************************************* 9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 10 * plug-in component to the Secure Monitor, registered as a runtime service. The 11 * SPD is expected to be a functional extension of the Secure Payload (SP) that 12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 13 * the Trusted OS/Applications range to the dispatcher. The SPD will either 14 * handle the request locally or delegate it to the Secure Payload. It is also 15 * responsible for initialising and maintaining communication with the SP. 16 ******************************************************************************/ 17 #include <assert.h> 18 #include <errno.h> 19 #include <inttypes.h> 20 #include <stddef.h> 21 22 #include <arch_helpers.h> 23 #include <bl31/bl31.h> 24 #include <common/bl_common.h> 25 #include <common/debug.h> 26 #include <common/runtime_svc.h> 27 #include <lib/coreboot.h> 28 #include <lib/el3_runtime/context_mgmt.h> 29 #include <lib/optee_utils.h> 30 #include <lib/transfer_list.h> 31 #include <lib/xlat_tables/xlat_tables_v2.h> 32 #if OPTEE_ALLOW_SMC_LOAD 33 #include <libfdt.h> 34 #endif /* OPTEE_ALLOW_SMC_LOAD */ 35 #include <plat/common/platform.h> 36 #include <services/oem/chromeos/widevine_smc_handlers.h> 37 #include <tools_share/uuid.h> 38 39 #include "opteed_private.h" 40 #include "teesmc_opteed.h" 41 42 #if OPTEE_ALLOW_SMC_LOAD 43 static struct transfer_list_header *bl31_tl; 44 #endif 45 46 /******************************************************************************* 47 * Address of the entrypoint vector table in OPTEE. It is 48 * initialised once on the primary core after a cold boot. 49 ******************************************************************************/ 50 struct optee_vectors *optee_vector_table; 51 52 /******************************************************************************* 53 * Array to keep track of per-cpu OPTEE state 54 ******************************************************************************/ 55 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 56 uint32_t opteed_rw; 57 58 #if OPTEE_ALLOW_SMC_LOAD 59 static bool opteed_allow_load; 60 /* OP-TEE image loading service UUID */ 61 DEFINE_SVC_UUID2(optee_image_load_uuid, 62 0xb1eafba3, 0x5d31, 0x4612, 0xb9, 0x06, 63 0xc4, 0xc7, 0xa4, 0xbe, 0x3c, 0xc0); 64 65 #define OPTEED_FDT_SIZE 1024 66 static uint8_t fdt_buf[OPTEED_FDT_SIZE] __aligned(CACHE_WRITEBACK_GRANULE); 67 68 #else 69 static int32_t opteed_init(void); 70 #endif 71 72 uint64_t dual32to64(uint32_t high, uint32_t low) 73 { 74 return ((uint64_t)high << 32) | low; 75 } 76 77 /******************************************************************************* 78 * This function is the handler registered for S-EL1 interrupts by the 79 * OPTEED. It validates the interrupt and upon success arranges entry into 80 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 81 ******************************************************************************/ 82 static uint64_t opteed_sel1_interrupt_handler(uint32_t id, 83 uint32_t flags, 84 void *handle, 85 void *cookie) 86 { 87 uint32_t linear_id; 88 optee_context_t *optee_ctx; 89 90 /* Check the security state when the exception was generated */ 91 assert(get_interrupt_src_ss(flags) == NON_SECURE); 92 93 /* Sanity check the pointer to this cpu's context */ 94 assert(handle == cm_get_context(NON_SECURE)); 95 96 /* Save the non-secure context before entering the OPTEE */ 97 cm_el1_sysregs_context_save(NON_SECURE); 98 99 /* Get a reference to this cpu's OPTEE context */ 100 linear_id = plat_my_core_pos(); 101 optee_ctx = &opteed_sp_context[linear_id]; 102 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 103 104 cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry); 105 cm_el1_sysregs_context_restore(SECURE); 106 cm_set_next_eret_context(SECURE); 107 108 /* 109 * Tell the OPTEE that it has to handle an FIQ (synchronously). 110 * Also the instruction in normal world where the interrupt was 111 * generated is passed for debugging purposes. It is safe to 112 * retrieve this address from ELR_EL3 as the secure context will 113 * not take effect until el3_exit(). 114 */ 115 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 116 } 117 118 /******************************************************************************* 119 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 120 * (aarch32/aarch64) if not already known and initialises the context for entry 121 * into OPTEE for its initialization. 122 ******************************************************************************/ 123 static int32_t opteed_setup(void) 124 { 125 #if OPTEE_ALLOW_SMC_LOAD 126 opteed_allow_load = true; 127 INFO("Delaying OP-TEE setup until we receive an SMC call to load it\n"); 128 return 0; 129 #else 130 entry_point_info_t *optee_ep_info; 131 uint32_t linear_id; 132 uint64_t arg0; 133 uint64_t arg1; 134 uint64_t arg2; 135 uint64_t arg3; 136 struct transfer_list_header *tl = NULL; 137 struct transfer_list_entry *te = NULL; 138 void *dt = NULL; 139 140 linear_id = plat_my_core_pos(); 141 142 /* 143 * Get information about the Secure Payload (BL32) image. Its 144 * absence is a critical failure. TODO: Add support to 145 * conditionally include the SPD service 146 */ 147 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 148 if (!optee_ep_info) { 149 WARN("No OPTEE provided by BL2 boot loader, Booting device" 150 " without OPTEE initialization. SMC`s destined for OPTEE" 151 " will return SMC_UNK\n"); 152 return 1; 153 } 154 155 /* 156 * If there's no valid entry point for SP, we return a non-zero value 157 * signalling failure initializing the service. We bail out without 158 * registering any handlers 159 */ 160 if (!optee_ep_info->pc) 161 return 1; 162 163 if (TRANSFER_LIST && 164 optee_ep_info->args.arg1 == (TRANSFER_LIST_SIGNATURE | 165 REGISTER_CONVENTION_VERSION_MASK)) { 166 tl = (void *)optee_ep_info->args.arg3; 167 if (transfer_list_check_header(tl) == TL_OPS_NON) { 168 return 1; 169 } 170 171 opteed_rw = GET_RW(optee_ep_info->spsr); 172 te = transfer_list_find(tl, TL_TAG_FDT); 173 dt = transfer_list_entry_data(te); 174 175 if (opteed_rw == OPTEE_AARCH64) { 176 arg0 = (uint64_t)dt; 177 arg2 = 0; 178 } else { 179 arg2 = (uint64_t)dt; 180 arg0 = 0; 181 } 182 183 arg1 = optee_ep_info->args.arg1; 184 arg3 = optee_ep_info->args.arg3; 185 } else { 186 /* Default handoff arguments */ 187 opteed_rw = optee_ep_info->args.arg0; 188 arg0 = optee_ep_info->args.arg1; /* opteed_pageable_part */ 189 arg1 = optee_ep_info->args.arg2; /* opteed_mem_limit */ 190 arg2 = optee_ep_info->args.arg3; /* dt_addr */ 191 arg3 = 0; 192 } 193 194 opteed_init_optee_ep_state(optee_ep_info, opteed_rw, optee_ep_info->pc, 195 arg0, arg1, arg2, arg3, 196 &opteed_sp_context[linear_id]); 197 198 /* 199 * All OPTEED initialization done. Now register our init function with 200 * BL31 for deferred invocation 201 */ 202 bl31_register_bl32_init(&opteed_init); 203 204 return 0; 205 #endif /* OPTEE_ALLOW_SMC_LOAD */ 206 } 207 208 /******************************************************************************* 209 * This function passes control to the OPTEE image (BL32) for the first time 210 * on the primary cpu after a cold boot. It assumes that a valid secure 211 * context has already been created by opteed_setup() which can be directly 212 * used. It also assumes that a valid non-secure context has been 213 * initialised by PSCI so it does not need to save and restore any 214 * non-secure state. This function performs a synchronous entry into 215 * OPTEE. OPTEE passes control back to this routine through a SMC. This returns 216 * a non-zero value on success and zero on failure. 217 ******************************************************************************/ 218 static int32_t 219 opteed_init_with_entry_point(entry_point_info_t *optee_entry_point) 220 { 221 uint32_t linear_id = plat_my_core_pos(); 222 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 223 uint64_t rc; 224 assert(optee_entry_point); 225 226 cm_init_my_context(optee_entry_point); 227 228 /* 229 * Arrange for an entry into OPTEE. It will be returned via 230 * OPTEE_ENTRY_DONE case 231 */ 232 rc = opteed_synchronous_sp_entry(optee_ctx); 233 assert(rc != 0); 234 235 return rc; 236 } 237 238 #if !OPTEE_ALLOW_SMC_LOAD 239 static int32_t opteed_init(void) 240 { 241 entry_point_info_t *optee_entry_point; 242 /* 243 * Get information about the OP-TEE (BL32) image. Its 244 * absence is a critical failure. 245 */ 246 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 247 return opteed_init_with_entry_point(optee_entry_point); 248 } 249 #endif /* !OPTEE_ALLOW_SMC_LOAD */ 250 251 #if OPTEE_ALLOW_SMC_LOAD 252 #if COREBOOT 253 /* 254 * Adds a firmware/coreboot node with the coreboot table information to a device 255 * tree. Returns zero on success or if there is no coreboot table information; 256 * failure code otherwise. 257 */ 258 static int add_coreboot_node(void *fdt) 259 { 260 int ret; 261 uint64_t coreboot_table_addr; 262 uint32_t coreboot_table_size; 263 struct { 264 uint64_t addr; 265 uint32_t size; 266 } reg_node; 267 coreboot_get_table_location(&coreboot_table_addr, &coreboot_table_size); 268 if (!coreboot_table_addr || !coreboot_table_size) { 269 WARN("Unable to get coreboot table location for device tree"); 270 return 0; 271 } 272 ret = fdt_begin_node(fdt, "firmware"); 273 if (ret) 274 return ret; 275 276 ret = fdt_property(fdt, "ranges", NULL, 0); 277 if (ret) 278 return ret; 279 280 ret = fdt_begin_node(fdt, "coreboot"); 281 if (ret) 282 return ret; 283 284 ret = fdt_property_string(fdt, "compatible", "coreboot"); 285 if (ret) 286 return ret; 287 288 reg_node.addr = cpu_to_fdt64(coreboot_table_addr); 289 reg_node.size = cpu_to_fdt32(coreboot_table_size); 290 ret = fdt_property(fdt, "reg", ®_node, 291 sizeof(uint64_t) + sizeof(uint32_t)); 292 if (ret) 293 return ret; 294 295 ret = fdt_end_node(fdt); 296 if (ret) 297 return ret; 298 299 return fdt_end_node(fdt); 300 } 301 #endif /* COREBOOT */ 302 303 #if CROS_WIDEVINE_SMC 304 /* 305 * Adds a options/widevine node with the widevine table information to a device 306 * tree. Returns zero on success or if there is no widevine table information; 307 * failure code otherwise. 308 */ 309 static int add_options_widevine_node(void *fdt) 310 { 311 int ret; 312 313 ret = fdt_begin_node(fdt, "options"); 314 if (ret) 315 return ret; 316 317 ret = fdt_begin_node(fdt, "op-tee"); 318 if (ret) 319 return ret; 320 321 ret = fdt_begin_node(fdt, "widevine"); 322 if (ret) 323 return ret; 324 325 if (cros_oem_tpm_auth_pk.length) { 326 ret = fdt_property(fdt, "tcg,tpm-auth-public-key", 327 cros_oem_tpm_auth_pk.buffer, 328 cros_oem_tpm_auth_pk.length); 329 if (ret) 330 return ret; 331 } 332 333 if (cros_oem_huk.length) { 334 ret = fdt_property(fdt, "op-tee,hardware-unique-key", 335 cros_oem_huk.buffer, cros_oem_huk.length); 336 if (ret) 337 return ret; 338 } 339 340 if (cros_oem_rot.length) { 341 ret = fdt_property(fdt, "google,widevine-root-of-trust-ecc-p256", 342 cros_oem_rot.buffer, cros_oem_rot.length); 343 if (ret) 344 return ret; 345 } 346 347 ret = fdt_end_node(fdt); 348 if (ret) 349 return ret; 350 351 ret = fdt_end_node(fdt); 352 if (ret) 353 return ret; 354 355 return fdt_end_node(fdt); 356 } 357 #endif /* CROS_WIDEVINE_SMC */ 358 359 /* 360 * Creates a device tree for passing into OP-TEE. Currently is populated with 361 * the coreboot table address. 362 * Returns 0 on success, error code otherwise. 363 */ 364 static int create_opteed_dt(void) 365 { 366 int ret; 367 368 ret = fdt_create(fdt_buf, OPTEED_FDT_SIZE); 369 if (ret) 370 return ret; 371 372 ret = fdt_finish_reservemap(fdt_buf); 373 if (ret) 374 return ret; 375 376 ret = fdt_begin_node(fdt_buf, ""); 377 if (ret) 378 return ret; 379 380 #if COREBOOT 381 ret = add_coreboot_node(fdt_buf); 382 if (ret) 383 return ret; 384 #endif /* COREBOOT */ 385 386 #if CROS_WIDEVINE_SMC 387 ret = add_options_widevine_node(fdt_buf); 388 if (ret) 389 return ret; 390 #endif /* CROS_WIDEVINE_SMC */ 391 392 ret = fdt_end_node(fdt_buf); 393 if (ret) 394 return ret; 395 396 return fdt_finish(fdt_buf); 397 } 398 399 static int32_t create_smc_tl(const void *fdt, uint32_t fdt_sz) 400 { 401 #if TRANSFER_LIST 402 bl31_tl = transfer_list_init((void *)(uintptr_t)FW_HANDOFF_BASE, 403 FW_HANDOFF_SIZE); 404 if (!bl31_tl) { 405 ERROR("Failed to initialize Transfer List at 0x%lx\n", 406 (unsigned long)FW_HANDOFF_BASE); 407 return -1; 408 } 409 410 if (!transfer_list_add(bl31_tl, TL_TAG_FDT, fdt_sz, fdt)) { 411 return -1; 412 } 413 return 0; 414 #else 415 return -1; 416 #endif 417 } 418 419 /******************************************************************************* 420 * This function is responsible for handling the SMC that loads the OP-TEE 421 * binary image via a non-secure SMC call. It takes the size and physical 422 * address of the payload as parameters. 423 ******************************************************************************/ 424 static int32_t opteed_handle_smc_load(uint64_t data_size, uint32_t data_pa) 425 { 426 uintptr_t data_va = data_pa; 427 uint64_t mapped_data_pa; 428 uintptr_t mapped_data_va; 429 uint64_t data_map_size; 430 int32_t rc; 431 optee_header_t *image_header; 432 uint8_t *image_ptr; 433 uint64_t target_pa; 434 uint64_t target_end_pa; 435 uint64_t image_pa; 436 uintptr_t image_va; 437 optee_image_t *curr_image; 438 uintptr_t target_va; 439 uint64_t target_size; 440 entry_point_info_t optee_ep_info; 441 uint32_t linear_id = plat_my_core_pos(); 442 uint64_t dt_addr = 0; 443 uint64_t arg0 = 0; 444 uint64_t arg1 = 0; 445 uint64_t arg2 = 0; 446 uint64_t arg3 = 0; 447 448 mapped_data_pa = page_align(data_pa, DOWN); 449 mapped_data_va = mapped_data_pa; 450 data_map_size = page_align(data_size + (mapped_data_pa - data_pa), UP); 451 452 /* 453 * We do not validate the passed in address because we are trusting the 454 * non-secure world at this point still. 455 */ 456 rc = mmap_add_dynamic_region(mapped_data_pa, mapped_data_va, 457 data_map_size, MT_MEMORY | MT_RO | MT_NS); 458 if (rc != 0) { 459 return rc; 460 } 461 462 image_header = (optee_header_t *)data_va; 463 if (image_header->magic != TEE_MAGIC_NUM_OPTEE || 464 image_header->version != 2 || image_header->nb_images != 1) { 465 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 466 return -EINVAL; 467 } 468 469 image_ptr = (uint8_t *)data_va + sizeof(optee_header_t) + 470 sizeof(optee_image_t); 471 if (image_header->arch == 1) { 472 opteed_rw = OPTEE_AARCH64; 473 } else { 474 opteed_rw = OPTEE_AARCH32; 475 } 476 477 curr_image = &image_header->optee_image_list[0]; 478 image_pa = dual32to64(curr_image->load_addr_hi, 479 curr_image->load_addr_lo); 480 image_va = image_pa; 481 target_end_pa = image_pa + curr_image->size; 482 483 /* Now also map the memory we want to copy it to. */ 484 target_pa = page_align(image_pa, DOWN); 485 target_va = target_pa; 486 target_size = page_align(target_end_pa, UP) - target_pa; 487 488 rc = mmap_add_dynamic_region(target_pa, target_va, target_size, 489 MT_MEMORY | MT_RW | MT_SECURE); 490 if (rc != 0) { 491 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 492 return rc; 493 } 494 495 INFO("Loaded OP-TEE via SMC: size %d addr 0x%" PRIx64 "\n", 496 curr_image->size, image_va); 497 498 memcpy((void *)image_va, image_ptr, curr_image->size); 499 flush_dcache_range(target_pa, target_size); 500 501 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 502 mmap_remove_dynamic_region(target_va, target_size); 503 504 /* Save the non-secure state */ 505 cm_el1_sysregs_context_save(NON_SECURE); 506 507 rc = create_opteed_dt(); 508 if (rc) { 509 ERROR("Failed device tree creation %d\n", rc); 510 return rc; 511 } 512 dt_addr = (uint64_t)fdt_buf; 513 flush_dcache_range(dt_addr, OPTEED_FDT_SIZE); 514 515 if (TRANSFER_LIST && 516 !create_smc_tl((void *)dt_addr, OPTEED_FDT_SIZE)) { 517 struct transfer_list_entry *te = NULL; 518 void *dt = NULL; 519 520 te = transfer_list_find(bl31_tl, TL_TAG_FDT); 521 dt = transfer_list_entry_data(te); 522 523 if (opteed_rw == OPTEE_AARCH64) { 524 arg0 = (uint64_t)dt; 525 arg2 = 0; 526 } else { 527 arg2 = (uint64_t)dt; 528 arg0 = 0; 529 } 530 arg1 = TRANSFER_LIST_SIGNATURE | 531 REGISTER_CONVENTION_VERSION_MASK; 532 arg3 = (uint64_t)bl31_tl; 533 } else { 534 /* Default handoff arguments */ 535 arg2 = dt_addr; 536 } 537 538 opteed_init_optee_ep_state(&optee_ep_info, 539 opteed_rw, 540 image_pa, 541 arg0, 542 arg1, 543 arg2, 544 arg3, 545 &opteed_sp_context[linear_id]); 546 if (opteed_init_with_entry_point(&optee_ep_info) == 0) { 547 rc = -EFAULT; 548 } 549 550 /* Restore non-secure state */ 551 cm_el1_sysregs_context_restore(NON_SECURE); 552 cm_set_next_eret_context(NON_SECURE); 553 554 return rc; 555 } 556 #endif /* OPTEE_ALLOW_SMC_LOAD */ 557 558 /******************************************************************************* 559 * This function is responsible for handling all SMCs in the Trusted OS/App 560 * range from the non-secure state as defined in the SMC Calling Convention 561 * Document. It is also responsible for communicating with the Secure 562 * payload to delegate work and return results back to the non-secure 563 * state. Lastly it will also return any information that OPTEE needs to do 564 * the work assigned to it. 565 ******************************************************************************/ 566 static uintptr_t opteed_smc_handler(uint32_t smc_fid, 567 u_register_t x1, 568 u_register_t x2, 569 u_register_t x3, 570 u_register_t x4, 571 void *cookie, 572 void *handle, 573 u_register_t flags) 574 { 575 cpu_context_t *ns_cpu_context; 576 uint32_t linear_id = plat_my_core_pos(); 577 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 578 uint64_t rc; 579 580 /* 581 * Determine which security state this SMC originated from 582 */ 583 584 if (is_caller_non_secure(flags)) { 585 #if OPTEE_ALLOW_SMC_LOAD 586 if (opteed_allow_load && smc_fid == NSSMC_OPTEED_CALL_UID) { 587 /* Provide the UUID of the image loading service. */ 588 SMC_UUID_RET(handle, optee_image_load_uuid); 589 } 590 if (smc_fid == NSSMC_OPTEED_CALL_LOAD_IMAGE) { 591 /* 592 * TODO: Consider wiping the code for SMC loading from 593 * memory after it has been invoked similar to what is 594 * done under RECLAIM_INIT, but extended to happen 595 * later. 596 */ 597 if (!opteed_allow_load) { 598 SMC_RET1(handle, -EPERM); 599 } 600 601 opteed_allow_load = false; 602 uint64_t data_size = dual32to64(x1, x2); 603 uint64_t data_pa = dual32to64(x3, x4); 604 if (!data_size || !data_pa) { 605 /* 606 * This is invoked when the OP-TEE image didn't 607 * load correctly in the kernel but we want to 608 * block off loading of it later for security 609 * reasons. 610 */ 611 SMC_RET1(handle, -EINVAL); 612 } 613 SMC_RET1(handle, opteed_handle_smc_load( 614 data_size, data_pa)); 615 } 616 #endif /* OPTEE_ALLOW_SMC_LOAD */ 617 /* 618 * This is a fresh request from the non-secure client. 619 * The parameters are in x1 and x2. Figure out which 620 * registers need to be preserved, save the non-secure 621 * state and send the request to the secure payload. 622 */ 623 assert(handle == cm_get_context(NON_SECURE)); 624 625 cm_el1_sysregs_context_save(NON_SECURE); 626 627 /* 628 * We are done stashing the non-secure context. Ask the 629 * OP-TEE to do the work now. If we are loading vi an SMC, 630 * then we also need to init this CPU context if not done 631 * already. 632 */ 633 if (optee_vector_table == NULL) { 634 SMC_RET1(handle, -EINVAL); 635 } 636 637 if (get_optee_pstate(optee_ctx->state) == 638 OPTEE_PSTATE_UNKNOWN) { 639 opteed_cpu_on_finish_handler(0); 640 } 641 642 /* 643 * Verify if there is a valid context to use, copy the 644 * operation type and parameters to the secure context 645 * and jump to the fast smc entry point in the secure 646 * payload. Entry into S-EL1 will take place upon exit 647 * from this function. 648 */ 649 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 650 651 /* Set appropriate entry for SMC. 652 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 653 * flags as appropriate. 654 */ 655 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 656 cm_set_elr_el3(SECURE, (uint64_t) 657 &optee_vector_table->fast_smc_entry); 658 } else { 659 cm_set_elr_el3(SECURE, (uint64_t) 660 &optee_vector_table->yield_smc_entry); 661 } 662 663 cm_el1_sysregs_context_restore(SECURE); 664 cm_set_next_eret_context(SECURE); 665 666 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 667 CTX_GPREG_X4, 668 read_ctx_reg(get_gpregs_ctx(handle), 669 CTX_GPREG_X4)); 670 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 671 CTX_GPREG_X5, 672 read_ctx_reg(get_gpregs_ctx(handle), 673 CTX_GPREG_X5)); 674 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 675 CTX_GPREG_X6, 676 read_ctx_reg(get_gpregs_ctx(handle), 677 CTX_GPREG_X6)); 678 /* Propagate hypervisor client ID */ 679 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 680 CTX_GPREG_X7, 681 read_ctx_reg(get_gpregs_ctx(handle), 682 CTX_GPREG_X7)); 683 684 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 685 } 686 687 /* 688 * Returning from OPTEE 689 */ 690 691 switch (smc_fid) { 692 /* 693 * OPTEE has finished initialising itself after a cold boot 694 */ 695 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 696 /* 697 * Stash the OPTEE entry points information. This is done 698 * only once on the primary cpu 699 */ 700 assert(optee_vector_table == NULL); 701 optee_vector_table = (optee_vectors_t *) x1; 702 703 if (optee_vector_table) { 704 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 705 706 /* 707 * OPTEE has been successfully initialized. 708 * Register power management hooks with PSCI 709 */ 710 psci_register_spd_pm_hook(&opteed_pm); 711 712 /* 713 * Register an interrupt handler for S-EL1 interrupts 714 * when generated during code executing in the 715 * non-secure state. 716 */ 717 flags = 0; 718 set_interrupt_rm_flag(flags, NON_SECURE); 719 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 720 opteed_sel1_interrupt_handler, 721 flags); 722 if (rc) 723 panic(); 724 } 725 726 /* 727 * OPTEE reports completion. The OPTEED must have initiated 728 * the original request through a synchronous entry into 729 * OPTEE. Jump back to the original C runtime context. 730 */ 731 opteed_synchronous_sp_exit(optee_ctx, x1); 732 break; 733 734 735 /* 736 * These function IDs is used only by OP-TEE to indicate it has 737 * finished: 738 * 1. turning itself on in response to an earlier psci 739 * cpu_on request 740 * 2. resuming itself after an earlier psci cpu_suspend 741 * request. 742 */ 743 case TEESMC_OPTEED_RETURN_ON_DONE: 744 case TEESMC_OPTEED_RETURN_RESUME_DONE: 745 746 747 /* 748 * These function IDs is used only by the SP to indicate it has 749 * finished: 750 * 1. suspending itself after an earlier psci cpu_suspend 751 * request. 752 * 2. turning itself off in response to an earlier psci 753 * cpu_off request. 754 */ 755 case TEESMC_OPTEED_RETURN_OFF_DONE: 756 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 757 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 758 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 759 760 /* 761 * OPTEE reports completion. The OPTEED must have initiated the 762 * original request through a synchronous entry into OPTEE. 763 * Jump back to the original C runtime context, and pass x1 as 764 * return value to the caller 765 */ 766 opteed_synchronous_sp_exit(optee_ctx, x1); 767 break; 768 769 /* 770 * OPTEE is returning from a call or being preempted from a call, in 771 * either case execution should resume in the normal world. 772 */ 773 case TEESMC_OPTEED_RETURN_CALL_DONE: 774 /* 775 * This is the result from the secure client of an 776 * earlier request. The results are in x0-x3. Copy it 777 * into the non-secure context, save the secure state 778 * and return to the non-secure state. 779 */ 780 assert(handle == cm_get_context(SECURE)); 781 cm_el1_sysregs_context_save(SECURE); 782 783 /* Get a reference to the non-secure context */ 784 ns_cpu_context = cm_get_context(NON_SECURE); 785 assert(ns_cpu_context); 786 787 /* Restore non-secure state */ 788 cm_el1_sysregs_context_restore(NON_SECURE); 789 cm_set_next_eret_context(NON_SECURE); 790 791 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 792 793 /* 794 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 795 * should resume in the normal world. 796 */ 797 case TEESMC_OPTEED_RETURN_FIQ_DONE: 798 /* Get a reference to the non-secure context */ 799 ns_cpu_context = cm_get_context(NON_SECURE); 800 assert(ns_cpu_context); 801 802 /* 803 * Restore non-secure state. There is no need to save the 804 * secure system register context since OPTEE was supposed 805 * to preserve it during S-EL1 interrupt handling. 806 */ 807 cm_el1_sysregs_context_restore(NON_SECURE); 808 cm_set_next_eret_context(NON_SECURE); 809 810 SMC_RET0((uint64_t) ns_cpu_context); 811 812 default: 813 panic(); 814 } 815 } 816 817 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 818 DECLARE_RT_SVC( 819 opteed_fast, 820 821 OEN_TOS_START, 822 OEN_TOS_END, 823 SMC_TYPE_FAST, 824 opteed_setup, 825 opteed_smc_handler 826 ); 827 828 /* Define an OPTEED runtime service descriptor for yielding SMC calls */ 829 DECLARE_RT_SVC( 830 opteed_std, 831 832 OEN_TOS_START, 833 OEN_TOS_END, 834 SMC_TYPE_YIELD, 835 NULL, 836 opteed_smc_handler 837 ); 838