1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8 /******************************************************************************* 9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 10 * plug-in component to the Secure Monitor, registered as a runtime service. The 11 * SPD is expected to be a functional extension of the Secure Payload (SP) that 12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 13 * the Trusted OS/Applications range to the dispatcher. The SPD will either 14 * handle the request locally or delegate it to the Secure Payload. It is also 15 * responsible for initialising and maintaining communication with the SP. 16 ******************************************************************************/ 17 #include <arch_helpers.h> 18 #include <assert.h> 19 #include <bl31.h> 20 #include <bl_common.h> 21 #include <context_mgmt.h> 22 #include <debug.h> 23 #include <errno.h> 24 #include <platform.h> 25 #include <runtime_svc.h> 26 #include <stddef.h> 27 #include <uuid.h> 28 #include "opteed_private.h" 29 #include "teesmc_opteed.h" 30 #include "teesmc_opteed_macros.h" 31 32 33 /******************************************************************************* 34 * Address of the entrypoint vector table in OPTEE. It is 35 * initialised once on the primary core after a cold boot. 36 ******************************************************************************/ 37 optee_vectors_t *optee_vectors; 38 39 /******************************************************************************* 40 * Array to keep track of per-cpu OPTEE state 41 ******************************************************************************/ 42 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 43 uint32_t opteed_rw; 44 45 46 47 static int32_t opteed_init(void); 48 49 /******************************************************************************* 50 * This function is the handler registered for S-EL1 interrupts by the 51 * OPTEED. It validates the interrupt and upon success arranges entry into 52 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 53 ******************************************************************************/ 54 static uint64_t opteed_sel1_interrupt_handler(uint32_t id, 55 uint32_t flags, 56 void *handle, 57 void *cookie) 58 { 59 uint32_t linear_id; 60 optee_context_t *optee_ctx; 61 62 /* Check the security state when the exception was generated */ 63 assert(get_interrupt_src_ss(flags) == NON_SECURE); 64 65 /* Sanity check the pointer to this cpu's context */ 66 assert(handle == cm_get_context(NON_SECURE)); 67 68 /* Save the non-secure context before entering the OPTEE */ 69 cm_el1_sysregs_context_save(NON_SECURE); 70 71 /* Get a reference to this cpu's OPTEE context */ 72 linear_id = plat_my_core_pos(); 73 optee_ctx = &opteed_sp_context[linear_id]; 74 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 75 76 cm_set_elr_el3(SECURE, (uint64_t)&optee_vectors->fiq_entry); 77 cm_el1_sysregs_context_restore(SECURE); 78 cm_set_next_eret_context(SECURE); 79 80 /* 81 * Tell the OPTEE that it has to handle an FIQ (synchronously). 82 * Also the instruction in normal world where the interrupt was 83 * generated is passed for debugging purposes. It is safe to 84 * retrieve this address from ELR_EL3 as the secure context will 85 * not take effect until el3_exit(). 86 */ 87 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 88 } 89 90 /******************************************************************************* 91 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 92 * (aarch32/aarch64) if not already known and initialises the context for entry 93 * into OPTEE for its initialization. 94 ******************************************************************************/ 95 int32_t opteed_setup(void) 96 { 97 entry_point_info_t *optee_ep_info; 98 uint32_t linear_id; 99 100 linear_id = plat_my_core_pos(); 101 102 /* 103 * Get information about the Secure Payload (BL32) image. Its 104 * absence is a critical failure. TODO: Add support to 105 * conditionally include the SPD service 106 */ 107 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 108 if (!optee_ep_info) { 109 WARN("No OPTEE provided by BL2 boot loader, Booting device" 110 " without OPTEE initialization. SMC`s destined for OPTEE" 111 " will return SMC_UNK\n"); 112 return 1; 113 } 114 115 /* 116 * If there's no valid entry point for SP, we return a non-zero value 117 * signalling failure initializing the service. We bail out without 118 * registering any handlers 119 */ 120 if (!optee_ep_info->pc) 121 return 1; 122 123 /* 124 * We could inspect the SP image and determine it's execution 125 * state i.e whether AArch32 or AArch64. Assuming it's AArch32 126 * for the time being. 127 */ 128 opteed_rw = OPTEE_AARCH64; 129 opteed_init_optee_ep_state(optee_ep_info, 130 opteed_rw, 131 optee_ep_info->pc, 132 &opteed_sp_context[linear_id]); 133 134 /* 135 * All OPTEED initialization done. Now register our init function with 136 * BL31 for deferred invocation 137 */ 138 bl31_register_bl32_init(&opteed_init); 139 140 return 0; 141 } 142 143 /******************************************************************************* 144 * This function passes control to the OPTEE image (BL32) for the first time 145 * on the primary cpu after a cold boot. It assumes that a valid secure 146 * context has already been created by opteed_setup() which can be directly 147 * used. It also assumes that a valid non-secure context has been 148 * initialised by PSCI so it does not need to save and restore any 149 * non-secure state. This function performs a synchronous entry into 150 * OPTEE. OPTEE passes control back to this routine through a SMC. 151 ******************************************************************************/ 152 static int32_t opteed_init(void) 153 { 154 uint32_t linear_id = plat_my_core_pos(); 155 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 156 entry_point_info_t *optee_entry_point; 157 uint64_t rc; 158 159 /* 160 * Get information about the OPTEE (BL32) image. Its 161 * absence is a critical failure. 162 */ 163 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 164 assert(optee_entry_point); 165 166 cm_init_my_context(optee_entry_point); 167 168 /* 169 * Arrange for an entry into OPTEE. It will be returned via 170 * OPTEE_ENTRY_DONE case 171 */ 172 rc = opteed_synchronous_sp_entry(optee_ctx); 173 assert(rc != 0); 174 175 return rc; 176 } 177 178 179 /******************************************************************************* 180 * This function is responsible for handling all SMCs in the Trusted OS/App 181 * range from the non-secure state as defined in the SMC Calling Convention 182 * Document. It is also responsible for communicating with the Secure 183 * payload to delegate work and return results back to the non-secure 184 * state. Lastly it will also return any information that OPTEE needs to do 185 * the work assigned to it. 186 ******************************************************************************/ 187 uint64_t opteed_smc_handler(uint32_t smc_fid, 188 uint64_t x1, 189 uint64_t x2, 190 uint64_t x3, 191 uint64_t x4, 192 void *cookie, 193 void *handle, 194 uint64_t flags) 195 { 196 cpu_context_t *ns_cpu_context; 197 uint32_t linear_id = plat_my_core_pos(); 198 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 199 uint64_t rc; 200 201 /* 202 * Determine which security state this SMC originated from 203 */ 204 205 if (is_caller_non_secure(flags)) { 206 /* 207 * This is a fresh request from the non-secure client. 208 * The parameters are in x1 and x2. Figure out which 209 * registers need to be preserved, save the non-secure 210 * state and send the request to the secure payload. 211 */ 212 assert(handle == cm_get_context(NON_SECURE)); 213 214 cm_el1_sysregs_context_save(NON_SECURE); 215 216 /* 217 * We are done stashing the non-secure context. Ask the 218 * OPTEE to do the work now. 219 */ 220 221 /* 222 * Verify if there is a valid context to use, copy the 223 * operation type and parameters to the secure context 224 * and jump to the fast smc entry point in the secure 225 * payload. Entry into S-EL1 will take place upon exit 226 * from this function. 227 */ 228 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 229 230 /* Set appropriate entry for SMC. 231 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 232 * flags as appropriate. 233 */ 234 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 235 cm_set_elr_el3(SECURE, (uint64_t) 236 &optee_vectors->fast_smc_entry); 237 } else { 238 cm_set_elr_el3(SECURE, (uint64_t) 239 &optee_vectors->yield_smc_entry); 240 } 241 242 cm_el1_sysregs_context_restore(SECURE); 243 cm_set_next_eret_context(SECURE); 244 245 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 246 CTX_GPREG_X4, 247 read_ctx_reg(get_gpregs_ctx(handle), 248 CTX_GPREG_X4)); 249 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 250 CTX_GPREG_X5, 251 read_ctx_reg(get_gpregs_ctx(handle), 252 CTX_GPREG_X5)); 253 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 254 CTX_GPREG_X6, 255 read_ctx_reg(get_gpregs_ctx(handle), 256 CTX_GPREG_X6)); 257 /* Propagate hypervisor client ID */ 258 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 259 CTX_GPREG_X7, 260 read_ctx_reg(get_gpregs_ctx(handle), 261 CTX_GPREG_X7)); 262 263 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 264 } 265 266 /* 267 * Returning from OPTEE 268 */ 269 270 switch (smc_fid) { 271 /* 272 * OPTEE has finished initialising itself after a cold boot 273 */ 274 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 275 /* 276 * Stash the OPTEE entry points information. This is done 277 * only once on the primary cpu 278 */ 279 assert(optee_vectors == NULL); 280 optee_vectors = (optee_vectors_t *) x1; 281 282 if (optee_vectors) { 283 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 284 285 /* 286 * OPTEE has been successfully initialized. 287 * Register power management hooks with PSCI 288 */ 289 psci_register_spd_pm_hook(&opteed_pm); 290 291 /* 292 * Register an interrupt handler for S-EL1 interrupts 293 * when generated during code executing in the 294 * non-secure state. 295 */ 296 flags = 0; 297 set_interrupt_rm_flag(flags, NON_SECURE); 298 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 299 opteed_sel1_interrupt_handler, 300 flags); 301 if (rc) 302 panic(); 303 } 304 305 /* 306 * OPTEE reports completion. The OPTEED must have initiated 307 * the original request through a synchronous entry into 308 * OPTEE. Jump back to the original C runtime context. 309 */ 310 opteed_synchronous_sp_exit(optee_ctx, x1); 311 312 313 /* 314 * These function IDs is used only by OP-TEE to indicate it has 315 * finished: 316 * 1. turning itself on in response to an earlier psci 317 * cpu_on request 318 * 2. resuming itself after an earlier psci cpu_suspend 319 * request. 320 */ 321 case TEESMC_OPTEED_RETURN_ON_DONE: 322 case TEESMC_OPTEED_RETURN_RESUME_DONE: 323 324 325 /* 326 * These function IDs is used only by the SP to indicate it has 327 * finished: 328 * 1. suspending itself after an earlier psci cpu_suspend 329 * request. 330 * 2. turning itself off in response to an earlier psci 331 * cpu_off request. 332 */ 333 case TEESMC_OPTEED_RETURN_OFF_DONE: 334 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 335 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 336 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 337 338 /* 339 * OPTEE reports completion. The OPTEED must have initiated the 340 * original request through a synchronous entry into OPTEE. 341 * Jump back to the original C runtime context, and pass x1 as 342 * return value to the caller 343 */ 344 opteed_synchronous_sp_exit(optee_ctx, x1); 345 346 /* 347 * OPTEE is returning from a call or being preempted from a call, in 348 * either case execution should resume in the normal world. 349 */ 350 case TEESMC_OPTEED_RETURN_CALL_DONE: 351 /* 352 * This is the result from the secure client of an 353 * earlier request. The results are in x0-x3. Copy it 354 * into the non-secure context, save the secure state 355 * and return to the non-secure state. 356 */ 357 assert(handle == cm_get_context(SECURE)); 358 cm_el1_sysregs_context_save(SECURE); 359 360 /* Get a reference to the non-secure context */ 361 ns_cpu_context = cm_get_context(NON_SECURE); 362 assert(ns_cpu_context); 363 364 /* Restore non-secure state */ 365 cm_el1_sysregs_context_restore(NON_SECURE); 366 cm_set_next_eret_context(NON_SECURE); 367 368 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 369 370 /* 371 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 372 * should resume in the normal world. 373 */ 374 case TEESMC_OPTEED_RETURN_FIQ_DONE: 375 /* Get a reference to the non-secure context */ 376 ns_cpu_context = cm_get_context(NON_SECURE); 377 assert(ns_cpu_context); 378 379 /* 380 * Restore non-secure state. There is no need to save the 381 * secure system register context since OPTEE was supposed 382 * to preserve it during S-EL1 interrupt handling. 383 */ 384 cm_el1_sysregs_context_restore(NON_SECURE); 385 cm_set_next_eret_context(NON_SECURE); 386 387 SMC_RET0((uint64_t) ns_cpu_context); 388 389 default: 390 panic(); 391 } 392 } 393 394 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 395 DECLARE_RT_SVC( 396 opteed_fast, 397 398 OEN_TOS_START, 399 OEN_TOS_END, 400 SMC_TYPE_FAST, 401 opteed_setup, 402 opteed_smc_handler 403 ); 404 405 /* Define an OPTEED runtime service descriptor for yielding SMC calls */ 406 DECLARE_RT_SVC( 407 opteed_std, 408 409 OEN_TOS_START, 410 OEN_TOS_END, 411 SMC_TYPE_YIELD, 412 NULL, 413 opteed_smc_handler 414 ); 415