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1Trusted Firmware-A - version 2.0
2================================
3
4Trusted Firmware-A (TF-A) provides a reference implementation of secure world
5software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing
6at Exception Level 3 (EL3). It implements various Arm interface standards,
7such as:
8
9-  The `Power State Coordination Interface (PSCI)`_
10-  Trusted Board Boot Requirements (TBBR, Arm DEN0006C-1)
11-  `SMC Calling Convention`_
12-  `System Control and Management Interface (SCMI)`_
13-  `Software Delegated Exception Interface (SDEI)`_
14
15Where possible, the code is designed for reuse or porting to other Armv7-A and
16Armv8-A model and hardware platforms.
17
18Arm will continue development in collaboration with interested parties to
19provide a full reference implementation of Secure Monitor code and Arm standards
20to the benefit of all developers working with Armv7-A and Armv8-A TrustZone
21technology.
22
23License
24-------
25
26The software is provided under a BSD-3-Clause `license`_. Contributions to this
27project are accepted under the same license with developer sign-off as
28described in the `Contributing Guidelines`_.
29
30This project contains code from other projects as listed below. The original
31license text is included in those source files.
32
33-  The libc source code is derived from `FreeBSD`_ and `SCC`_. FreeBSD uses
34   various BSD licenses, including BSD-3-Clause and BSD-2-Clause. The SCC code
35   is used under the BSD-3-Clause license with the author's permission.
36
37-  The libfdt source code is disjunctively dual licensed
38   (GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of
39   the BSD-2-Clause license. Any contributions to this code must be made under
40   the terms of both licenses.
41
42-  The LLVM compiler-rt source code is disjunctively dual licensed
43   (NCSA OR MIT). It is used by this project under the terms of the NCSA
44   license (also known as the University of Illinois/NCSA Open Source License),
45   which is a permissive license compatible with BSD-3-Clause. Any
46   contributions to this code must be made under the terms of both licenses.
47
48-  The zlib source code is licensed under the Zlib license, which is a
49   permissive license compatible with BSD-3-Clause.
50
51-  Some STMicroelectronics platform source code is disjunctively dual licensed
52   (GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the
53   BSD-3-Clause license. Any contributions to this code must be made under the
54   terms of both licenses.
55
56This release
57------------
58
59This release provides a suitable starting point for productization of secure
60world boot and runtime firmware, in either the AArch32 or AArch64 execution
61states.
62
63Users are encouraged to do their own security validation, including penetration
64testing, on any secure world code derived from TF-A.
65
66Functionality
67~~~~~~~~~~~~~
68
69-  Initialization of the secure world, for example exception vectors, control
70   registers and interrupts for the platform.
71
72-  Library support for CPU specific reset and power down sequences. This
73   includes support for errata workarounds and the latest Arm DynamIQ CPUs.
74
75-  Drivers to enable standard initialization of Arm System IP, for example
76   Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI),
77   Cache Coherent Network (CCN), Network Interconnect (NIC) and TrustZone
78   Controller (TZC).
79
80-  A generic `SCMI`_ driver to interface with conforming power controllers, for
81   example the Arm System Control Processor (SCP).
82
83-  SMC (Secure Monitor Call) handling, conforming to the `SMC Calling
84   Convention`_ using an EL3 runtime services framework.
85
86-  `PSCI`_ library support for CPU, cluster and system power management
87   use-cases.
88   This library is pre-integrated with the AArch64 EL3 Runtime Software, and
89   is also suitable for integration with other AArch32 EL3 Runtime Software,
90   for example an AArch32 Secure OS.
91
92-  A minimal AArch32 Secure Payload (SP\_MIN) to demonstrate `PSCI`_ library
93   integration with AArch32 EL3 Runtime Software.
94
95-  Secure Monitor library code such as world switching, EL1 context management
96   and interrupt routing.
97   When a Secure-EL1 Payload (SP) is present, for example a Secure OS, the
98   AArch64 EL3 Runtime Software must be integrated with a Secure Payload
99   Dispatcher (SPD) component to customize the interaction with the SP.
100
101-  A Test SP and SPD to demonstrate AArch64 Secure Monitor functionality and SP
102   interaction with PSCI.
103
104-  SPDs for the `OP-TEE Secure OS`_, `NVIDIA Trusted Little Kernel`_
105   and `Trusty Secure OS`_.
106
107-  A Trusted Board Boot implementation, conforming to all mandatory TBBR
108   requirements. This includes image authentication, Firmware Update (or
109   recovery mode), and packaging of the various firmware images into a
110   Firmware Image Package (FIP).
111
112-  Pre-integration of TBB with the Arm CryptoCell product, to take advantage of
113   its hardware Root of Trust and crypto acceleration services.
114
115-  Reliability, Availability, and Serviceability (RAS) functionality, including
116
117   -  A Secure Partition Manager (SPM) to manage Secure Partitions in
118      Secure-EL0, which can be used to implement simple management and
119      security services.
120
121   -  An SDEI dispatcher to route interrupt-based SDEI events.
122
123   -  An Exception Handling Framework (EHF) that allows dispatching of EL3
124      interrupts to their registered handlers, to facilitate firmware-first
125      error handling.
126
127-  A dynamic configuration framework that enables each of the firmware images
128   to be configured at runtime if required by the platform. It also enables
129   loading of a hardware configuration (for example, a kernel device tree)
130   as part of the FIP, to be passed through the firmware stages.
131
132-  Support for alternative boot flows, for example to support platforms where
133   the EL3 Runtime Software is loaded using other firmware or a separate
134   secure system processor, or where a non-TF-A ROM expects BL2 to be loaded
135   at EL3.
136
137-  Support for the GCC, LLVM and Arm Compiler 6 toolchains.
138
139-  Support for combining several libraries into a self-called "romlib" image
140   that may be shared across images to reduce memory footprint. The romlib image
141   is stored in ROM but is accessed through a jump-table that may be stored
142   in read-write memory, allowing for the library code to be patched.
143
144For a full description of functionality and implementation details, please
145see the `Firmware Design`_ and supporting documentation. The `Change Log`_
146provides details of changes made since the last release.
147
148Platforms
149~~~~~~~~~
150
151Various AArch32 and AArch64 builds of this release have been tested on r0, r1
152and r2 variants of the `Juno Arm Development Platform`_.
153
154Various AArch64 builds of this release have been tested on the following Arm
155Fixed Virtual Platforms (`FVP`_) without shifted affinities that do not
156support threaded CPU cores (64-bit host machine only):
157
158NOTE: Unless otherwise stated, the model version is Version 11.4 Build 37.
159
160-  ``FVP_Base_Aresx4``
161-  ``FVP_Base_AEMv8A-AEMv8A``
162-  ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502``
163-  ``FVP_Base_AEMv8A-AEMv8A``
164-  ``FVP_Base_RevC-2xAEMv8A``
165-  ``FVP_Base_Cortex-A32x4``
166-  ``FVP_Base_Cortex-A35x4``
167-  ``FVP_Base_Cortex-A53x4``
168-  ``FVP_Base_Cortex-A55x4+Cortex-A75x4``
169-  ``FVP_Base_Cortex-A55x4``
170-  ``FVP_Base_Cortex-A57x4-A53x4``
171-  ``FVP_Base_Cortex-A57x4``
172-  ``FVP_Base_Cortex-A72x4-A53x4``
173-  ``FVP_Base_Cortex-A72x4``
174-  ``FVP_Base_Cortex-A73x4-A53x4``
175-  ``FVP_Base_Cortex-A73x4``
176-  ``FVP_Base_Cortex-A75x4``
177-  ``FVP_Base_Cortex-A76x4``
178-  ``FVP_CSS_SGI-575`` (Version 11.3 build 40)
179-  ``Foundation_Platform``
180
181The latest version of the AArch32 build of TF-A has been tested on the following
182Arm FVPs without shifted affinities that do not support threaded CPU cores
183(64-bit host machine only).
184
185-  ``FVP_Base_AEMv8A-AEMv8A``
186-  ``FVP_Base_Cortex-A32x4``
187
188The Foundation FVP can be downloaded free of charge. The Base FVPs can be
189licensed from Arm. See the `Arm FVP website`_.
190
191All the above platforms have been tested with `Linaro Release 18.04`_.
192
193This release also contains the following platform support:
194
195-  Allwinner sun50i_64 and sun50i_h6
196-  Amlogic Meson S905 (GXBB)
197-  Arm SGI-575, SGI Clark.A, SGI Clark.H and SGM-775
198-  Arm NeoVerse N1 System Development Platform
199-  HiKey, HiKey960 and Poplar boards
200-  Marvell Armada 3700 and 8K
201-  MediaTek MT6795 and MT8173 SoCs
202-  NVIDIA T132, T186 and T210 SoCs
203-  NXP QorIQ LS1043A, i.MX8MQ, i.MX8QX, i.MX8QM and i.MX7Solo WaRP7
204-  QEMU
205-  Raspberry Pi 3
206-  R-Car Generation 3
207-  RockChip RK3328, RK3368 and RK3399 SoCs
208-  Socionext UniPhier SoC family and SynQuacer SC2A11 SoCs
209-  STMicroelectronics STM32MP1
210-  Texas Instruments K3 SoCs
211-  Xilinx Versal and Zynq UltraScale + MPSoC
212
213Still to come
214~~~~~~~~~~~~~
215
216-  More platform support.
217
218-  Position independent executable (PIE) support.
219
220-  Ongoing support for new architectural features, CPUs and System IP.
221
222-  Ongoing support for new Arm system architecture specifications.
223
224-  Ongoing security hardening, optimization and quality improvements.
225
226For a full list of detailed issues in the current code, please see the `Change
227Log`_ and the `GitHub issue tracker`_.
228
229Getting started
230---------------
231
232Get the TF-A source code from `GitHub`_.
233
234See the `User Guide`_ for instructions on how to install, build and use TF-A
235with the Arm `FVP`_\ s.
236
237See the `Firmware Design`_ for information on how TF-A works.
238
239See the `Porting Guide`_ as well for information about how to use this
240software on another Armv7-A or Armv8-A platform.
241
242See the `Contributing Guidelines`_ for information on how to contribute to this
243project and the `Acknowledgments`_ file for a list of contributors to the
244project.
245
246IRC channel
247~~~~~~~~~~~
248
249Development discussion takes place on the #trusted-firmware-a channel
250on the Freenode IRC network. This is not an official support channel.
251If you have an issue to raise, please use the `GitHub issue tracker`_.
252
253Feedback and support
254~~~~~~~~~~~~~~~~~~~~
255
256Arm welcomes any feedback on TF-A. If you think you have found a security
257vulnerability, please report this using the process defined in the TF-A
258`Security Centre`_. For all other feedback, please use the
259`GitHub issue tracker`_.
260
261Arm licensees may contact Arm directly via their partner managers.
262
263--------------
264
265*Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.*
266
267.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
268.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
269.. _Power State Coordination Interface (PSCI): PSCI_
270.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
271.. _SMC Calling Convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf
272.. _System Control and Management Interface (SCMI): SCMI_
273.. _SCMI: http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
274.. _Software Delegated Exception Interface (SDEI): SDEI_
275.. _SDEI: http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
276.. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php
277.. _Arm FVP website: FVP_
278.. _FVP: https://developer.arm.com/products/system-design/fixed-virtual-platforms
279.. _Linaro Release 18.04: https://community.arm.com/dev-platforms/b/documents/posts/linaro-release-notes-deprecated#LinaroRelease18.04
280.. _OP-TEE Secure OS: https://github.com/OP-TEE/optee_os
281.. _NVIDIA Trusted Little Kernel: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary
282.. _Trusty Secure OS: https://source.android.com/security/trusty
283.. _GitHub: https://www.github.com/ARM-software/arm-trusted-firmware
284.. _GitHub issue tracker: https://github.com/ARM-software/tf-issues/issues
285.. _Security Centre: https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Security-Centre
286.. _license: ./license.rst
287.. _Contributing Guidelines: ./contributing.rst
288.. _Acknowledgments: ./acknowledgements.rst
289.. _Firmware Design: ./docs/firmware-design.rst
290.. _Change Log: ./docs/change-log.rst
291.. _User Guide: ./docs/user-guide.rst
292.. _Porting Guide: ./docs/porting-guide.rst
293.. _FreeBSD: http://www.freebsd.org
294.. _SCC: http://www.simple-cc.org/
295