1 /* 2 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2023-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef ZYNQMP_PM_API_SYS_H 9 #define ZYNQMP_PM_API_SYS_H 10 11 #include <stdint.h> 12 13 #include "pm_defs.h" 14 #include "zynqmp_pm_defs.h" 15 16 enum pm_query_ids { 17 PM_QID_INVALID, 18 PM_QID_CLOCK_GET_NAME, 19 PM_QID_CLOCK_GET_TOPOLOGY, 20 PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, 21 PM_QID_CLOCK_GET_PARENTS, 22 PM_QID_CLOCK_GET_ATTRIBUTES, 23 PM_QID_PINCTRL_GET_NUM_PINS, 24 PM_QID_PINCTRL_GET_NUM_FUNCTIONS, 25 PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, 26 PM_QID_PINCTRL_GET_FUNCTION_NAME, 27 PM_QID_PINCTRL_GET_FUNCTION_GROUPS, 28 PM_QID_PINCTRL_GET_PIN_GROUPS, 29 PM_QID_CLOCK_GET_NUM_CLOCKS, 30 PM_QID_CLOCK_GET_MAX_DIVISOR, 31 }; 32 33 enum pm_register_access_id { 34 CONFIG_REG_WRITE, 35 CONFIG_REG_READ, 36 }; 37 38 /* 39 * Assigning of argument values into array elements. 40 */ 41 #define PM_PACK_PAYLOAD1(pl, flag, arg0) { \ 42 pl[0] = ((uint32_t)(arg0) | ((uint32_t)(flag) << 24U)); \ 43 } 44 45 #define PM_PACK_PAYLOAD2(pl, flag, arg0, arg1) { \ 46 pl[1] = (uint32_t)(arg1); \ 47 PM_PACK_PAYLOAD1(pl, (flag), (arg0)); \ 48 } 49 50 #define PM_PACK_PAYLOAD3(pl, flag, arg0, arg1, arg2) { \ 51 pl[2] = (uint32_t)(arg2); \ 52 PM_PACK_PAYLOAD2(pl, (flag), (arg0), (arg1)); \ 53 } 54 55 #define PM_PACK_PAYLOAD4(pl, flag, arg0, arg1, arg2, arg3) { \ 56 pl[3] = (uint32_t)(arg3); \ 57 PM_PACK_PAYLOAD3(pl, (flag), (arg0), (arg1), (arg2)); \ 58 } 59 60 #define PM_PACK_PAYLOAD5(pl, flag, arg0, arg1, arg2, arg3, arg4) { \ 61 pl[4] = (uint32_t)(arg4); \ 62 PM_PACK_PAYLOAD4(pl, (flag), (arg0), (arg1), (arg2), (arg3)); \ 63 } 64 65 #define PM_PACK_PAYLOAD6(pl, flag, arg0, arg1, arg2, arg3, arg4, arg5) { \ 66 pl[5] = (uint32_t)(arg5); \ 67 PM_PACK_PAYLOAD5(pl, (flag), (arg0), (arg1), (arg2), (arg3), (arg4)); \ 68 } 69 70 /********************************************************** 71 * System-level API function declarations 72 **********************************************************/ 73 enum pm_ret_status pm_req_suspend(enum pm_node_id target, 74 enum pm_request_ack ack, 75 uint32_t latency, 76 uint32_t state, 77 uint32_t flag); 78 79 enum pm_ret_status pm_self_suspend(enum pm_node_id nid, 80 uint32_t latency, 81 uint32_t state, 82 uintptr_t address, 83 uint32_t flag); 84 85 enum pm_ret_status pm_force_powerdown(enum pm_node_id target, 86 enum pm_request_ack ack, 87 uint32_t flag); 88 89 enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, 90 uint32_t flag); 91 92 enum pm_ret_status pm_req_wakeup(enum pm_node_id target, 93 uint32_t set_address, 94 uintptr_t address, 95 enum pm_request_ack ack, 96 uint32_t flag); 97 98 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target, 99 enum pm_node_id wkup_node, 100 uint32_t enable, 101 uint32_t flag); 102 103 enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype, 104 uint32_t flag); 105 106 /* API functions for managing PM Slaves */ 107 enum pm_ret_status pm_req_node(enum pm_node_id nid, 108 uint32_t capabilities, 109 uint32_t qos, 110 enum pm_request_ack ack, 111 uint32_t flag); 112 113 enum pm_ret_status pm_set_requirement(enum pm_node_id nid, 114 uint32_t capabilities, 115 uint32_t qos, 116 enum pm_request_ack ack, 117 uint32_t flag); 118 119 /* Miscellaneous API functions */ 120 enum pm_ret_status pm_get_api_version(uint32_t *version, uint32_t flag); 121 enum pm_ret_status pm_get_node_status(enum pm_node_id nid, 122 uint32_t *ret_buff, uint32_t flag); 123 124 /* Direct-Control API functions */ 125 enum pm_ret_status pm_mmio_write(uintptr_t address, 126 uint32_t mask, 127 uint32_t value, uint32_t flag); 128 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value, 129 uint32_t flag); 130 enum pm_ret_status pm_fpga_load(uint32_t address_low, 131 uint32_t address_high, 132 uint32_t size, 133 uint32_t flags, 134 uint32_t security_flag); 135 enum pm_ret_status pm_fpga_get_status(uint32_t *value, uint32_t flag); 136 137 enum pm_ret_status pm_get_chipid(uint32_t *value, uint32_t flag); 138 enum pm_ret_status pm_secure_rsaaes(uint32_t address_low, 139 uint32_t address_high, 140 uint32_t size, 141 uint32_t flags, 142 uint32_t security_flag); 143 uint32_t pm_get_shutdown_scope(void); 144 enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count); 145 enum pm_ret_status pm_ioctl(enum pm_node_id nid, 146 uint32_t ioctl_id, 147 uint32_t arg1, 148 uint32_t arg2, 149 uint32_t *value, 150 uint32_t flag); 151 enum pm_ret_status pm_clock_enable(uint32_t clock_id, uint32_t flag); 152 enum pm_ret_status pm_clock_disable(uint32_t clock_id, uint32_t flag); 153 enum pm_ret_status pm_clock_getstate(uint32_t clock_id, 154 uint32_t *state, uint32_t flag); 155 enum pm_ret_status pm_clock_setdivider(uint32_t clock_id, 156 uint32_t divider, uint32_t flag); 157 enum pm_ret_status pm_clock_getdivider(uint32_t clock_id, 158 uint32_t *divider, uint32_t flag); 159 enum pm_ret_status pm_clock_setparent(uint32_t clock_id, 160 uint32_t parent_index, uint32_t flag); 161 enum pm_ret_status pm_clock_getparent(uint32_t clock_id, 162 uint32_t *parent_index, uint32_t flag); 163 void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, 164 uint32_t arg3, uint32_t *data, uint32_t flag); 165 enum pm_ret_status pm_sha_hash(uint32_t address_high, 166 uint32_t address_low, 167 uint32_t size, 168 uint32_t flags, 169 uint32_t security_flag); 170 enum pm_ret_status pm_rsa_core(uint32_t address_high, 171 uint32_t address_low, 172 uint32_t size, 173 uint32_t flags, 174 uint32_t security_flag); 175 enum pm_ret_status pm_secure_image(uint32_t address_low, 176 uint32_t address_high, 177 uint32_t key_lo, 178 uint32_t key_hi, 179 uint32_t *value, 180 uint32_t flag); 181 enum pm_ret_status pm_fpga_read(uint32_t reg_numframes, 182 uint32_t address_low, 183 uint32_t address_high, 184 uint32_t readback_type, 185 uint32_t *value, 186 uint32_t flag); 187 enum pm_ret_status pm_aes_engine(uint32_t address_high, 188 uint32_t address_low, 189 uint32_t *value, 190 uint32_t flag); 191 enum pm_ret_status pm_register_access(uint32_t register_access_id, 192 uint32_t address, 193 uint32_t mask, 194 uint32_t value, 195 uint32_t *out, 196 uint32_t flag); 197 enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid, 198 enum pm_pll_param param_id, 199 uint32_t value, 200 uint32_t flag); 201 enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid, 202 enum pm_pll_param param_id, 203 uint32_t *value, 204 uint32_t flag); 205 enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, 206 enum pm_pll_mode mode, 207 uint32_t flag); 208 enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, 209 enum pm_pll_mode *mode, 210 uint32_t flag); 211 enum pm_ret_status pm_efuse_access(uint32_t address_high, 212 uint32_t address_low, uint32_t *value, 213 uint32_t flag); 214 enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version, 215 uint32_t *bit_mask, uint8_t len, 216 uint32_t flag); 217 enum pm_ret_status check_api_dependency(uint8_t id, uint32_t flag); 218 219 #endif /* ZYNQMP_PM_API_SYS_H */ 220