1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * APU specific definition of processors in the subsystem as well as functions 10 * for getting information about and changing state of the APU. 11 */ 12 13 #include <assert.h> 14 #include <string.h> 15 16 #include <common/bl_common.h> 17 #include <drivers/arm/gic_common.h> 18 #include <drivers/arm/gicv2.h> 19 #include <lib/bakery_lock.h> 20 #include <lib/mmio.h> 21 #include <lib/utils.h> 22 23 #include <plat_ipi.h> 24 #include <zynqmp_def.h> 25 #include "pm_client.h" 26 #include "pm_ipi.h" 27 #include "zynqmp_pm_api_sys.h" 28 29 #define IRQ_MAX 84U 30 #define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U) 31 #define UNDEFINED_CPUID (~0U) 32 33 #define PM_SUSPEND_MODE_STD 0U 34 #define PM_SUSPEND_MODE_POWER_OFF 1U 35 36 DEFINE_BAKERY_LOCK(pm_client_secure_lock); 37 38 extern const struct pm_ipi apu_ipi; 39 40 const struct pm_ipi apu_ipi = { 41 .local_ipi_id = IPI_ID_APU, 42 .remote_ipi_id = IPI_ID_PMU0, 43 .buffer_base = IPI_BUFFER_APU_BASE, 44 }; 45 46 static uint32_t suspend_mode = PM_SUSPEND_MODE_STD; 47 48 /* Order in pm_procs_all array must match cpu ids */ 49 static const struct pm_proc pm_procs_all[] = { 50 { 51 .node_id = NODE_APU_0, 52 .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK, 53 .ipi = &apu_ipi, 54 }, 55 { 56 .node_id = NODE_APU_1, 57 .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK, 58 .ipi = &apu_ipi, 59 }, 60 { 61 .node_id = NODE_APU_2, 62 .pwrdn_mask = APU_2_PWRCTL_CPUPWRDWNREQ_MASK, 63 .ipi = &apu_ipi, 64 }, 65 { 66 .node_id = NODE_APU_3, 67 .pwrdn_mask = APU_3_PWRCTL_CPUPWRDWNREQ_MASK, 68 .ipi = &apu_ipi, 69 }, 70 }; 71 72 /* Interrupt to PM node ID map */ 73 static enum pm_node_id irq_node_map[IRQ_MAX + 1U] = { 74 NODE_UNKNOWN, 75 NODE_UNKNOWN, 76 NODE_UNKNOWN, 77 NODE_UNKNOWN, /* 3 */ 78 NODE_UNKNOWN, 79 NODE_UNKNOWN, 80 NODE_UNKNOWN, 81 NODE_UNKNOWN, /* 7 */ 82 NODE_UNKNOWN, 83 NODE_UNKNOWN, 84 NODE_UNKNOWN, 85 NODE_UNKNOWN, /* 11 */ 86 NODE_UNKNOWN, 87 NODE_UNKNOWN, 88 NODE_NAND, 89 NODE_QSPI, /* 15 */ 90 NODE_GPIO, 91 NODE_I2C_0, 92 NODE_I2C_1, 93 NODE_SPI_0, /* 19 */ 94 NODE_SPI_1, 95 NODE_UART_0, 96 NODE_UART_1, 97 NODE_CAN_0, /* 23 */ 98 NODE_CAN_1, 99 NODE_UNKNOWN, 100 NODE_RTC, 101 NODE_RTC, /* 27 */ 102 NODE_UNKNOWN, 103 NODE_UNKNOWN, 104 NODE_UNKNOWN, 105 NODE_UNKNOWN, /* 31 */ 106 NODE_UNKNOWN, 107 NODE_UNKNOWN, 108 NODE_UNKNOWN, 109 NODE_UNKNOWN, /* 35, NODE_IPI_APU */ 110 NODE_TTC_0, 111 NODE_TTC_0, 112 NODE_TTC_0, 113 NODE_TTC_1, /* 39 */ 114 NODE_TTC_1, 115 NODE_TTC_1, 116 NODE_TTC_2, 117 NODE_TTC_2, /* 43 */ 118 NODE_TTC_2, 119 NODE_TTC_3, 120 NODE_TTC_3, 121 NODE_TTC_3, /* 47 */ 122 NODE_SD_0, 123 NODE_SD_1, 124 NODE_SD_0, 125 NODE_SD_1, /* 51 */ 126 NODE_UNKNOWN, 127 NODE_UNKNOWN, 128 NODE_UNKNOWN, 129 NODE_UNKNOWN, /* 55 */ 130 NODE_UNKNOWN, 131 NODE_ETH_0, 132 NODE_ETH_0, 133 NODE_ETH_1, /* 59 */ 134 NODE_ETH_1, 135 NODE_ETH_2, 136 NODE_ETH_2, 137 NODE_ETH_3, /* 63 */ 138 NODE_ETH_3, 139 NODE_USB_0, 140 NODE_USB_0, 141 NODE_USB_0, /* 67 */ 142 NODE_USB_0, 143 NODE_USB_0, 144 NODE_USB_1, 145 NODE_USB_1, /* 71 */ 146 NODE_USB_1, 147 NODE_USB_1, 148 NODE_USB_1, 149 NODE_USB_0, /* 75 */ 150 NODE_USB_0, 151 NODE_ADMA, 152 NODE_ADMA, 153 NODE_ADMA, /* 79 */ 154 NODE_ADMA, 155 NODE_ADMA, 156 NODE_ADMA, 157 NODE_ADMA, /* 83 */ 158 NODE_ADMA, 159 }; 160 161 /** 162 * irq_to_pm_node - Get PM node ID corresponding to the interrupt number 163 * @irq: Interrupt number 164 * 165 * Return: PM node ID corresponding to the specified interrupt 166 */ 167 static enum pm_node_id irq_to_pm_node(uint32_t irq) 168 { 169 assert(irq <= IRQ_MAX); 170 return irq_node_map[irq]; 171 } 172 173 /** 174 * pm_client_set_wakeup_sources - Set all slaves with enabled interrupts as wake 175 * sources in the PMU firmware 176 */ 177 static void pm_client_set_wakeup_sources(void) 178 { 179 uint32_t reg_num; 180 uint8_t pm_wakeup_nodes_set[NODE_MAX] = { 0 }; 181 uintptr_t isenabler1 = BASE_GICD_BASE + GICD_ISENABLER + 4U; 182 183 /* In case of power-off suspend, only NODE_EXTERN must be set */ 184 if (suspend_mode == PM_SUSPEND_MODE_POWER_OFF) { 185 enum pm_ret_status ret; 186 187 ret = pm_set_wakeup_source(NODE_APU, NODE_EXTERN, 1U); 188 /** 189 * If NODE_EXTERN could not be set as wake source, proceed with 190 * standard suspend (no one will wake the system otherwise) 191 */ 192 if (ret == PM_RET_SUCCESS) { 193 return; 194 } 195 } 196 197 zeromem(&pm_wakeup_nodes_set, sizeof(pm_wakeup_nodes_set)); 198 199 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { 200 uint32_t base_irq = reg_num << ISENABLER_SHIFT; 201 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2U)); 202 203 if (reg == 0) { 204 continue; 205 } 206 207 while (reg) { 208 enum pm_node_id node; 209 uint32_t idx, ret, irq, lowest_set = reg & (-reg); 210 211 idx = __builtin_ctz(lowest_set); 212 irq = base_irq + idx; 213 214 if (irq > IRQ_MAX) { 215 break; 216 } 217 218 node = irq_to_pm_node(irq); 219 reg &= ~lowest_set; 220 221 if (node > NODE_UNKNOWN && node < NODE_MAX) { 222 if (pm_wakeup_nodes_set[node] == 0U) { 223 ret = pm_set_wakeup_source(NODE_APU, node, 1U); 224 pm_wakeup_nodes_set[node] = (ret == PM_RET_SUCCESS) ? 1U : 0U; 225 } 226 } 227 } 228 } 229 } 230 231 /** 232 * pm_get_proc() - returns pointer to the proc structure 233 * @cpuid: id of the cpu whose proc struct pointer should be returned 234 * 235 * Return: pointer to a proc structure if proc is found, otherwise NULL 236 */ 237 const struct pm_proc *pm_get_proc(uint32_t cpuid) 238 { 239 if (cpuid < ARRAY_SIZE(pm_procs_all)) { 240 return &pm_procs_all[cpuid]; 241 } 242 243 return NULL; 244 } 245 246 /** 247 * pm_get_proc_by_node() - returns pointer to the proc structure 248 * @nid: node id of the processor 249 * 250 * Return: pointer to a proc structure if proc is found, otherwise NULL 251 */ 252 const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid) 253 { 254 for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { 255 if (nid == pm_procs_all[i].node_id) { 256 return &pm_procs_all[i]; 257 } 258 } 259 return NULL; 260 } 261 262 /** 263 * pm_get_cpuid() - get the local cpu ID for a global node ID 264 * @nid: node id of the processor 265 * 266 * Return: the cpu ID (starting from 0) for the subsystem 267 */ 268 static uint32_t pm_get_cpuid(enum pm_node_id nid) 269 { 270 for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { 271 if (pm_procs_all[i].node_id == nid) { 272 return i; 273 } 274 } 275 return UNDEFINED_CPUID; 276 } 277 278 const struct pm_proc *primary_proc = &pm_procs_all[0]; 279 280 /** 281 * pm_client_suspend() - Client-specific suspend actions 282 * 283 * This function should contain any PU-specific actions 284 * required prior to sending suspend request to PMU 285 * Actions taken depend on the state system is suspending to. 286 */ 287 void pm_client_suspend(const struct pm_proc *proc, uint32_t state) 288 { 289 bakery_lock_get(&pm_client_secure_lock); 290 291 if (state == PM_STATE_SUSPEND_TO_RAM) { 292 pm_client_set_wakeup_sources(); 293 } 294 295 /* Set powerdown request */ 296 mmio_write_32(APU_PWRCTL, mmio_read_32(APU_PWRCTL) | proc->pwrdn_mask); 297 298 bakery_lock_release(&pm_client_secure_lock); 299 } 300 301 302 /** 303 * pm_client_abort_suspend() - Client-specific abort-suspend actions 304 * 305 * This function should contain any PU-specific actions 306 * required for aborting a prior suspend request 307 */ 308 void pm_client_abort_suspend(void) 309 { 310 /* Enable interrupts at processor level (for current cpu) */ 311 gicv2_cpuif_enable(); 312 313 bakery_lock_get(&pm_client_secure_lock); 314 315 /* Clear powerdown request */ 316 mmio_write_32(APU_PWRCTL, 317 mmio_read_32(APU_PWRCTL) & ~primary_proc->pwrdn_mask); 318 319 bakery_lock_release(&pm_client_secure_lock); 320 } 321 322 /** 323 * pm_client_wakeup() - Client-specific wakeup actions 324 * 325 * This function should contain any PU-specific actions 326 * required for waking up another APU core 327 */ 328 void pm_client_wakeup(const struct pm_proc *proc) 329 { 330 uint32_t cpuid = pm_get_cpuid(proc->node_id); 331 332 if (cpuid == UNDEFINED_CPUID) { 333 return; 334 } 335 336 bakery_lock_get(&pm_client_secure_lock); 337 338 /* clear powerdown bit for affected cpu */ 339 uint32_t val = mmio_read_32(APU_PWRCTL); 340 val &= ~(proc->pwrdn_mask); 341 mmio_write_32(APU_PWRCTL, val); 342 343 bakery_lock_release(&pm_client_secure_lock); 344 } 345 346 enum pm_ret_status pm_set_suspend_mode(uint32_t mode) 347 { 348 if ((mode != PM_SUSPEND_MODE_STD) && 349 (mode != PM_SUSPEND_MODE_POWER_OFF)) { 350 return PM_RET_ERROR_ARGS; 351 } 352 353 suspend_mode = mode; 354 return PM_RET_SUCCESS; 355 } 356