1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* 8 * APU specific definition of processors in the subsystem as well as functions 9 * for getting information about and changing state of the APU. 10 */ 11 12 #include <assert.h> 13 #include <string.h> 14 15 #include <common/bl_common.h> 16 #include <drivers/arm/gic_common.h> 17 #include <drivers/arm/gicv2.h> 18 #include <lib/bakery_lock.h> 19 #include <lib/mmio.h> 20 #include <lib/utils.h> 21 22 #include <plat_ipi.h> 23 #include <zynqmp_def.h> 24 #include "pm_api_sys.h" 25 #include "pm_client.h" 26 #include "pm_ipi.h" 27 28 #define IRQ_MAX 84U 29 #define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U) 30 #define UNDEFINED_CPUID (~0U) 31 32 #define PM_SUSPEND_MODE_STD 0U 33 #define PM_SUSPEND_MODE_POWER_OFF 1U 34 35 DEFINE_BAKERY_LOCK(pm_client_secure_lock); 36 37 extern const struct pm_ipi apu_ipi; 38 39 const struct pm_ipi apu_ipi = { 40 .local_ipi_id = IPI_ID_APU, 41 .remote_ipi_id = IPI_ID_PMU0, 42 .buffer_base = IPI_BUFFER_APU_BASE, 43 }; 44 45 static uint32_t suspend_mode = PM_SUSPEND_MODE_STD; 46 47 /* Order in pm_procs_all array must match cpu ids */ 48 static const struct pm_proc pm_procs_all[] = { 49 { 50 .node_id = NODE_APU_0, 51 .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK, 52 .ipi = &apu_ipi, 53 }, 54 { 55 .node_id = NODE_APU_1, 56 .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK, 57 .ipi = &apu_ipi, 58 }, 59 { 60 .node_id = NODE_APU_2, 61 .pwrdn_mask = APU_2_PWRCTL_CPUPWRDWNREQ_MASK, 62 .ipi = &apu_ipi, 63 }, 64 { 65 .node_id = NODE_APU_3, 66 .pwrdn_mask = APU_3_PWRCTL_CPUPWRDWNREQ_MASK, 67 .ipi = &apu_ipi, 68 }, 69 }; 70 71 /* Interrupt to PM node ID map */ 72 static enum pm_node_id irq_node_map[IRQ_MAX + 1U] = { 73 NODE_UNKNOWN, 74 NODE_UNKNOWN, 75 NODE_UNKNOWN, 76 NODE_UNKNOWN, /* 3 */ 77 NODE_UNKNOWN, 78 NODE_UNKNOWN, 79 NODE_UNKNOWN, 80 NODE_UNKNOWN, /* 7 */ 81 NODE_UNKNOWN, 82 NODE_UNKNOWN, 83 NODE_UNKNOWN, 84 NODE_UNKNOWN, /* 11 */ 85 NODE_UNKNOWN, 86 NODE_UNKNOWN, 87 NODE_NAND, 88 NODE_QSPI, /* 15 */ 89 NODE_GPIO, 90 NODE_I2C_0, 91 NODE_I2C_1, 92 NODE_SPI_0, /* 19 */ 93 NODE_SPI_1, 94 NODE_UART_0, 95 NODE_UART_1, 96 NODE_CAN_0, /* 23 */ 97 NODE_CAN_1, 98 NODE_UNKNOWN, 99 NODE_RTC, 100 NODE_RTC, /* 27 */ 101 NODE_UNKNOWN, 102 NODE_UNKNOWN, 103 NODE_UNKNOWN, 104 NODE_UNKNOWN, /* 31 */ 105 NODE_UNKNOWN, 106 NODE_UNKNOWN, 107 NODE_UNKNOWN, 108 NODE_UNKNOWN, /* 35, NODE_IPI_APU */ 109 NODE_TTC_0, 110 NODE_TTC_0, 111 NODE_TTC_0, 112 NODE_TTC_1, /* 39 */ 113 NODE_TTC_1, 114 NODE_TTC_1, 115 NODE_TTC_2, 116 NODE_TTC_2, /* 43 */ 117 NODE_TTC_2, 118 NODE_TTC_3, 119 NODE_TTC_3, 120 NODE_TTC_3, /* 47 */ 121 NODE_SD_0, 122 NODE_SD_1, 123 NODE_SD_0, 124 NODE_SD_1, /* 51 */ 125 NODE_UNKNOWN, 126 NODE_UNKNOWN, 127 NODE_UNKNOWN, 128 NODE_UNKNOWN, /* 55 */ 129 NODE_UNKNOWN, 130 NODE_ETH_0, 131 NODE_ETH_0, 132 NODE_ETH_1, /* 59 */ 133 NODE_ETH_1, 134 NODE_ETH_2, 135 NODE_ETH_2, 136 NODE_ETH_3, /* 63 */ 137 NODE_ETH_3, 138 NODE_USB_0, 139 NODE_USB_0, 140 NODE_USB_0, /* 67 */ 141 NODE_USB_0, 142 NODE_USB_0, 143 NODE_USB_1, 144 NODE_USB_1, /* 71 */ 145 NODE_USB_1, 146 NODE_USB_1, 147 NODE_USB_1, 148 NODE_USB_0, /* 75 */ 149 NODE_USB_0, 150 NODE_ADMA, 151 NODE_ADMA, 152 NODE_ADMA, /* 79 */ 153 NODE_ADMA, 154 NODE_ADMA, 155 NODE_ADMA, 156 NODE_ADMA, /* 83 */ 157 NODE_ADMA, 158 }; 159 160 /** 161 * irq_to_pm_node - Get PM node ID corresponding to the interrupt number 162 * @irq: Interrupt number 163 * 164 * Return: PM node ID corresponding to the specified interrupt 165 */ 166 static enum pm_node_id irq_to_pm_node(uint32_t irq) 167 { 168 assert(irq <= IRQ_MAX); 169 return irq_node_map[irq]; 170 } 171 172 /** 173 * pm_client_set_wakeup_sources - Set all slaves with enabled interrupts as wake 174 * sources in the PMU firmware 175 */ 176 static void pm_client_set_wakeup_sources(void) 177 { 178 uint32_t reg_num; 179 uint8_t pm_wakeup_nodes_set[NODE_MAX] = { 0 }; 180 uintptr_t isenabler1 = BASE_GICD_BASE + GICD_ISENABLER + 4U; 181 182 /* In case of power-off suspend, only NODE_EXTERN must be set */ 183 if (suspend_mode == PM_SUSPEND_MODE_POWER_OFF) { 184 enum pm_ret_status ret; 185 186 ret = pm_set_wakeup_source(NODE_APU, NODE_EXTERN, 1U); 187 /** 188 * If NODE_EXTERN could not be set as wake source, proceed with 189 * standard suspend (no one will wake the system otherwise) 190 */ 191 if (ret == PM_RET_SUCCESS) { 192 return; 193 } 194 } 195 196 zeromem(&pm_wakeup_nodes_set, sizeof(pm_wakeup_nodes_set)); 197 198 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { 199 uint32_t base_irq = reg_num << ISENABLER_SHIFT; 200 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2U)); 201 202 if (reg == 0) { 203 continue; 204 } 205 206 while (reg) { 207 enum pm_node_id node; 208 uint32_t idx, ret, irq, lowest_set = reg & (-reg); 209 210 idx = __builtin_ctz(lowest_set); 211 irq = base_irq + idx; 212 213 if (irq > IRQ_MAX) { 214 break; 215 } 216 217 node = irq_to_pm_node(irq); 218 reg &= ~lowest_set; 219 220 if (node > NODE_UNKNOWN && node < NODE_MAX) { 221 if (pm_wakeup_nodes_set[node] == 0U) { 222 ret = pm_set_wakeup_source(NODE_APU, node, 1U); 223 pm_wakeup_nodes_set[node] = (ret == PM_RET_SUCCESS) ? 1U : 0U; 224 } 225 } 226 } 227 } 228 } 229 230 /** 231 * pm_get_proc() - returns pointer to the proc structure 232 * @cpuid: id of the cpu whose proc struct pointer should be returned 233 * 234 * Return: pointer to a proc structure if proc is found, otherwise NULL 235 */ 236 const struct pm_proc *pm_get_proc(uint32_t cpuid) 237 { 238 if (cpuid < ARRAY_SIZE(pm_procs_all)) { 239 return &pm_procs_all[cpuid]; 240 } 241 242 return NULL; 243 } 244 245 /** 246 * pm_get_proc_by_node() - returns pointer to the proc structure 247 * @nid: node id of the processor 248 * 249 * Return: pointer to a proc structure if proc is found, otherwise NULL 250 */ 251 const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid) 252 { 253 for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { 254 if (nid == pm_procs_all[i].node_id) { 255 return &pm_procs_all[i]; 256 } 257 } 258 return NULL; 259 } 260 261 /** 262 * pm_get_cpuid() - get the local cpu ID for a global node ID 263 * @nid: node id of the processor 264 * 265 * Return: the cpu ID (starting from 0) for the subsystem 266 */ 267 static uint32_t pm_get_cpuid(enum pm_node_id nid) 268 { 269 for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { 270 if (pm_procs_all[i].node_id == nid) { 271 return i; 272 } 273 } 274 return UNDEFINED_CPUID; 275 } 276 277 const struct pm_proc *primary_proc = &pm_procs_all[0]; 278 279 /** 280 * pm_client_suspend() - Client-specific suspend actions 281 * 282 * This function should contain any PU-specific actions 283 * required prior to sending suspend request to PMU 284 * Actions taken depend on the state system is suspending to. 285 */ 286 void pm_client_suspend(const struct pm_proc *proc, uint32_t state) 287 { 288 bakery_lock_get(&pm_client_secure_lock); 289 290 if (state == PM_STATE_SUSPEND_TO_RAM) { 291 pm_client_set_wakeup_sources(); 292 } 293 294 /* Set powerdown request */ 295 mmio_write_32(APU_PWRCTL, mmio_read_32(APU_PWRCTL) | proc->pwrdn_mask); 296 297 bakery_lock_release(&pm_client_secure_lock); 298 } 299 300 301 /** 302 * pm_client_abort_suspend() - Client-specific abort-suspend actions 303 * 304 * This function should contain any PU-specific actions 305 * required for aborting a prior suspend request 306 */ 307 void pm_client_abort_suspend(void) 308 { 309 /* Enable interrupts at processor level (for current cpu) */ 310 gicv2_cpuif_enable(); 311 312 bakery_lock_get(&pm_client_secure_lock); 313 314 /* Clear powerdown request */ 315 mmio_write_32(APU_PWRCTL, 316 mmio_read_32(APU_PWRCTL) & ~primary_proc->pwrdn_mask); 317 318 bakery_lock_release(&pm_client_secure_lock); 319 } 320 321 /** 322 * pm_client_wakeup() - Client-specific wakeup actions 323 * 324 * This function should contain any PU-specific actions 325 * required for waking up another APU core 326 */ 327 void pm_client_wakeup(const struct pm_proc *proc) 328 { 329 uint32_t cpuid = pm_get_cpuid(proc->node_id); 330 331 if (cpuid == UNDEFINED_CPUID) { 332 return; 333 } 334 335 bakery_lock_get(&pm_client_secure_lock); 336 337 /* clear powerdown bit for affected cpu */ 338 uint32_t val = mmio_read_32(APU_PWRCTL); 339 val &= ~(proc->pwrdn_mask); 340 mmio_write_32(APU_PWRCTL, val); 341 342 bakery_lock_release(&pm_client_secure_lock); 343 } 344 345 enum pm_ret_status pm_set_suspend_mode(uint32_t mode) 346 { 347 if ((mode != PM_SUSPEND_MODE_STD) && 348 (mode != PM_SUSPEND_MODE_POWER_OFF)) { 349 return PM_RET_ERROR_ARGS; 350 } 351 352 suspend_mode = mode; 353 return PM_RET_SUCCESS; 354 } 355