1 /* 2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* 8 * ZynqMP system level PM-API functions for pin control. 9 */ 10 11 #include <string.h> 12 13 #include <arch_helpers.h> 14 #include <plat/common/platform.h> 15 16 #include "pm_api_pinctrl.h" 17 #include "pm_api_sys.h" 18 #include "pm_client.h" 19 #include "pm_common.h" 20 #include "pm_ipi.h" 21 22 struct pinctrl_function { 23 char name[FUNCTION_NAME_LEN]; 24 uint16_t (*groups)[]; 25 uint8_t regval; 26 }; 27 28 /* Max groups for one pin */ 29 #define MAX_PIN_GROUPS U(13) 30 31 struct zynqmp_pin_group { 32 uint16_t (*groups)[]; 33 }; 34 35 static struct pinctrl_function pinctrl_functions[MAX_FUNCTION] = { 36 [PINCTRL_FUNC_CAN0] = { 37 .name = "can0", 38 .regval = 0x20, 39 .groups = &((uint16_t []) { 40 PINCTRL_GRP_CAN0_0, 41 PINCTRL_GRP_CAN0_1, 42 PINCTRL_GRP_CAN0_2, 43 PINCTRL_GRP_CAN0_3, 44 PINCTRL_GRP_CAN0_4, 45 PINCTRL_GRP_CAN0_5, 46 PINCTRL_GRP_CAN0_6, 47 PINCTRL_GRP_CAN0_7, 48 PINCTRL_GRP_CAN0_8, 49 PINCTRL_GRP_CAN0_9, 50 PINCTRL_GRP_CAN0_10, 51 PINCTRL_GRP_CAN0_11, 52 PINCTRL_GRP_CAN0_12, 53 PINCTRL_GRP_CAN0_13, 54 PINCTRL_GRP_CAN0_14, 55 PINCTRL_GRP_CAN0_15, 56 PINCTRL_GRP_CAN0_16, 57 PINCTRL_GRP_CAN0_17, 58 PINCTRL_GRP_CAN0_18, 59 END_OF_GROUPS, 60 }), 61 }, 62 [PINCTRL_FUNC_CAN1] = { 63 .name = "can1", 64 .regval = 0x20, 65 .groups = &((uint16_t []) { 66 PINCTRL_GRP_CAN1_0, 67 PINCTRL_GRP_CAN1_1, 68 PINCTRL_GRP_CAN1_2, 69 PINCTRL_GRP_CAN1_3, 70 PINCTRL_GRP_CAN1_4, 71 PINCTRL_GRP_CAN1_5, 72 PINCTRL_GRP_CAN1_6, 73 PINCTRL_GRP_CAN1_7, 74 PINCTRL_GRP_CAN1_8, 75 PINCTRL_GRP_CAN1_9, 76 PINCTRL_GRP_CAN1_10, 77 PINCTRL_GRP_CAN1_11, 78 PINCTRL_GRP_CAN1_12, 79 PINCTRL_GRP_CAN1_13, 80 PINCTRL_GRP_CAN1_14, 81 PINCTRL_GRP_CAN1_15, 82 PINCTRL_GRP_CAN1_16, 83 PINCTRL_GRP_CAN1_17, 84 PINCTRL_GRP_CAN1_18, 85 PINCTRL_GRP_CAN1_19, 86 END_OF_GROUPS, 87 }), 88 }, 89 [PINCTRL_FUNC_ETHERNET0] = { 90 .name = "ethernet0", 91 .regval = 0x02, 92 .groups = &((uint16_t []) { 93 PINCTRL_GRP_ETHERNET0_0, 94 END_OF_GROUPS, 95 }), 96 }, 97 [PINCTRL_FUNC_ETHERNET1] = { 98 .name = "ethernet1", 99 .regval = 0x02, 100 .groups = &((uint16_t []) { 101 PINCTRL_GRP_ETHERNET1_0, 102 END_OF_GROUPS, 103 }), 104 }, 105 [PINCTRL_FUNC_ETHERNET2] = { 106 .name = "ethernet2", 107 .regval = 0x02, 108 .groups = &((uint16_t []) { 109 PINCTRL_GRP_ETHERNET2_0, 110 END_OF_GROUPS, 111 }), 112 }, 113 [PINCTRL_FUNC_ETHERNET3] = { 114 .name = "ethernet3", 115 .regval = 0x02, 116 .groups = &((uint16_t []) { 117 PINCTRL_GRP_ETHERNET3_0, 118 END_OF_GROUPS, 119 }), 120 }, 121 [PINCTRL_FUNC_GEMTSU0] = { 122 .name = "gemtsu0", 123 .regval = 0x02, 124 .groups = &((uint16_t []) { 125 PINCTRL_GRP_GEMTSU0_0, 126 PINCTRL_GRP_GEMTSU0_1, 127 PINCTRL_GRP_GEMTSU0_2, 128 END_OF_GROUPS, 129 }), 130 }, 131 [PINCTRL_FUNC_GPIO0] = { 132 .name = "gpio0", 133 .regval = 0x00, 134 .groups = &((uint16_t []) { 135 PINCTRL_GRP_GPIO0_0, 136 PINCTRL_GRP_GPIO0_1, 137 PINCTRL_GRP_GPIO0_2, 138 PINCTRL_GRP_GPIO0_3, 139 PINCTRL_GRP_GPIO0_4, 140 PINCTRL_GRP_GPIO0_5, 141 PINCTRL_GRP_GPIO0_6, 142 PINCTRL_GRP_GPIO0_7, 143 PINCTRL_GRP_GPIO0_8, 144 PINCTRL_GRP_GPIO0_9, 145 PINCTRL_GRP_GPIO0_10, 146 PINCTRL_GRP_GPIO0_11, 147 PINCTRL_GRP_GPIO0_12, 148 PINCTRL_GRP_GPIO0_13, 149 PINCTRL_GRP_GPIO0_14, 150 PINCTRL_GRP_GPIO0_15, 151 PINCTRL_GRP_GPIO0_16, 152 PINCTRL_GRP_GPIO0_17, 153 PINCTRL_GRP_GPIO0_18, 154 PINCTRL_GRP_GPIO0_19, 155 PINCTRL_GRP_GPIO0_20, 156 PINCTRL_GRP_GPIO0_21, 157 PINCTRL_GRP_GPIO0_22, 158 PINCTRL_GRP_GPIO0_23, 159 PINCTRL_GRP_GPIO0_24, 160 PINCTRL_GRP_GPIO0_25, 161 PINCTRL_GRP_GPIO0_26, 162 PINCTRL_GRP_GPIO0_27, 163 PINCTRL_GRP_GPIO0_28, 164 PINCTRL_GRP_GPIO0_29, 165 PINCTRL_GRP_GPIO0_30, 166 PINCTRL_GRP_GPIO0_31, 167 PINCTRL_GRP_GPIO0_32, 168 PINCTRL_GRP_GPIO0_33, 169 PINCTRL_GRP_GPIO0_34, 170 PINCTRL_GRP_GPIO0_35, 171 PINCTRL_GRP_GPIO0_36, 172 PINCTRL_GRP_GPIO0_37, 173 PINCTRL_GRP_GPIO0_38, 174 PINCTRL_GRP_GPIO0_39, 175 PINCTRL_GRP_GPIO0_40, 176 PINCTRL_GRP_GPIO0_41, 177 PINCTRL_GRP_GPIO0_42, 178 PINCTRL_GRP_GPIO0_43, 179 PINCTRL_GRP_GPIO0_44, 180 PINCTRL_GRP_GPIO0_45, 181 PINCTRL_GRP_GPIO0_46, 182 PINCTRL_GRP_GPIO0_47, 183 PINCTRL_GRP_GPIO0_48, 184 PINCTRL_GRP_GPIO0_49, 185 PINCTRL_GRP_GPIO0_50, 186 PINCTRL_GRP_GPIO0_51, 187 PINCTRL_GRP_GPIO0_52, 188 PINCTRL_GRP_GPIO0_53, 189 PINCTRL_GRP_GPIO0_54, 190 PINCTRL_GRP_GPIO0_55, 191 PINCTRL_GRP_GPIO0_56, 192 PINCTRL_GRP_GPIO0_57, 193 PINCTRL_GRP_GPIO0_58, 194 PINCTRL_GRP_GPIO0_59, 195 PINCTRL_GRP_GPIO0_60, 196 PINCTRL_GRP_GPIO0_61, 197 PINCTRL_GRP_GPIO0_62, 198 PINCTRL_GRP_GPIO0_63, 199 PINCTRL_GRP_GPIO0_64, 200 PINCTRL_GRP_GPIO0_65, 201 PINCTRL_GRP_GPIO0_66, 202 PINCTRL_GRP_GPIO0_67, 203 PINCTRL_GRP_GPIO0_68, 204 PINCTRL_GRP_GPIO0_69, 205 PINCTRL_GRP_GPIO0_70, 206 PINCTRL_GRP_GPIO0_71, 207 PINCTRL_GRP_GPIO0_72, 208 PINCTRL_GRP_GPIO0_73, 209 PINCTRL_GRP_GPIO0_74, 210 PINCTRL_GRP_GPIO0_75, 211 PINCTRL_GRP_GPIO0_76, 212 PINCTRL_GRP_GPIO0_77, 213 END_OF_GROUPS, 214 }), 215 }, 216 [PINCTRL_FUNC_I2C0] = { 217 .name = "i2c0", 218 .regval = 0x40, 219 .groups = &((uint16_t []) { 220 PINCTRL_GRP_I2C0_0, 221 PINCTRL_GRP_I2C0_1, 222 PINCTRL_GRP_I2C0_2, 223 PINCTRL_GRP_I2C0_3, 224 PINCTRL_GRP_I2C0_4, 225 PINCTRL_GRP_I2C0_5, 226 PINCTRL_GRP_I2C0_6, 227 PINCTRL_GRP_I2C0_7, 228 PINCTRL_GRP_I2C0_8, 229 PINCTRL_GRP_I2C0_9, 230 PINCTRL_GRP_I2C0_10, 231 PINCTRL_GRP_I2C0_11, 232 PINCTRL_GRP_I2C0_12, 233 PINCTRL_GRP_I2C0_13, 234 PINCTRL_GRP_I2C0_14, 235 PINCTRL_GRP_I2C0_15, 236 PINCTRL_GRP_I2C0_16, 237 PINCTRL_GRP_I2C0_17, 238 PINCTRL_GRP_I2C0_18, 239 END_OF_GROUPS, 240 }), 241 }, 242 [PINCTRL_FUNC_I2C1] = { 243 .name = "i2c1", 244 .regval = 0x40, 245 .groups = &((uint16_t []) { 246 PINCTRL_GRP_I2C1_0, 247 PINCTRL_GRP_I2C1_1, 248 PINCTRL_GRP_I2C1_2, 249 PINCTRL_GRP_I2C1_3, 250 PINCTRL_GRP_I2C1_4, 251 PINCTRL_GRP_I2C1_5, 252 PINCTRL_GRP_I2C1_6, 253 PINCTRL_GRP_I2C1_7, 254 PINCTRL_GRP_I2C1_8, 255 PINCTRL_GRP_I2C1_9, 256 PINCTRL_GRP_I2C1_10, 257 PINCTRL_GRP_I2C1_11, 258 PINCTRL_GRP_I2C1_12, 259 PINCTRL_GRP_I2C1_13, 260 PINCTRL_GRP_I2C1_14, 261 PINCTRL_GRP_I2C1_15, 262 PINCTRL_GRP_I2C1_16, 263 PINCTRL_GRP_I2C1_17, 264 PINCTRL_GRP_I2C1_18, 265 PINCTRL_GRP_I2C1_19, 266 END_OF_GROUPS, 267 }), 268 }, 269 [PINCTRL_FUNC_MDIO0] = { 270 .name = "mdio0", 271 .regval = 0x60, 272 .groups = &((uint16_t []) { 273 PINCTRL_GRP_MDIO0_0, 274 END_OF_GROUPS, 275 }), 276 }, 277 [PINCTRL_FUNC_MDIO1] = { 278 .name = "mdio1", 279 .regval = 0x80, 280 .groups = &((uint16_t []) { 281 PINCTRL_GRP_MDIO1_0, 282 PINCTRL_GRP_MDIO1_1, 283 END_OF_GROUPS, 284 }), 285 }, 286 [PINCTRL_FUNC_MDIO2] = { 287 .name = "mdio2", 288 .regval = 0xa0, 289 .groups = &((uint16_t []) { 290 PINCTRL_GRP_MDIO2_0, 291 END_OF_GROUPS, 292 }), 293 }, 294 [PINCTRL_FUNC_MDIO3] = { 295 .name = "mdio3", 296 .regval = 0xc0, 297 .groups = &((uint16_t []) { 298 PINCTRL_GRP_MDIO3_0, 299 END_OF_GROUPS, 300 }), 301 }, 302 [PINCTRL_FUNC_QSPI0] = { 303 .name = "qspi0", 304 .regval = 0x02, 305 .groups = &((uint16_t []) { 306 PINCTRL_GRP_QSPI0_0, 307 END_OF_GROUPS, 308 }), 309 }, 310 [PINCTRL_FUNC_QSPI_FBCLK] = { 311 .name = "qspi_fbclk", 312 .regval = 0x02, 313 .groups = &((uint16_t []) { 314 PINCTRL_GRP_QSPI_FBCLK, 315 END_OF_GROUPS, 316 }), 317 }, 318 [PINCTRL_FUNC_QSPI_SS] = { 319 .name = "qspi_ss", 320 .regval = 0x02, 321 .groups = &((uint16_t []) { 322 PINCTRL_GRP_QSPI_SS, 323 END_OF_GROUPS, 324 }), 325 }, 326 [PINCTRL_FUNC_SPI0] = { 327 .name = "spi0", 328 .regval = 0x80, 329 .groups = &((uint16_t []) { 330 PINCTRL_GRP_SPI0_0, 331 PINCTRL_GRP_SPI0_1, 332 PINCTRL_GRP_SPI0_2, 333 PINCTRL_GRP_SPI0_3, 334 PINCTRL_GRP_SPI0_4, 335 PINCTRL_GRP_SPI0_5, 336 END_OF_GROUPS, 337 }), 338 }, 339 [PINCTRL_FUNC_SPI1] = { 340 .name = "spi1", 341 .regval = 0x80, 342 .groups = &((uint16_t []) { 343 PINCTRL_GRP_SPI1_0, 344 PINCTRL_GRP_SPI1_1, 345 PINCTRL_GRP_SPI1_2, 346 PINCTRL_GRP_SPI1_3, 347 PINCTRL_GRP_SPI1_4, 348 PINCTRL_GRP_SPI1_5, 349 END_OF_GROUPS, 350 }), 351 }, 352 [PINCTRL_FUNC_SPI0_SS] = { 353 .name = "spi0_ss", 354 .regval = 0x80, 355 .groups = &((uint16_t []) { 356 PINCTRL_GRP_SPI0_0_SS0, 357 PINCTRL_GRP_SPI0_0_SS1, 358 PINCTRL_GRP_SPI0_0_SS2, 359 PINCTRL_GRP_SPI0_1_SS0, 360 PINCTRL_GRP_SPI0_1_SS1, 361 PINCTRL_GRP_SPI0_1_SS2, 362 PINCTRL_GRP_SPI0_2_SS0, 363 PINCTRL_GRP_SPI0_2_SS1, 364 PINCTRL_GRP_SPI0_2_SS2, 365 PINCTRL_GRP_SPI0_3_SS0, 366 PINCTRL_GRP_SPI0_3_SS1, 367 PINCTRL_GRP_SPI0_3_SS2, 368 PINCTRL_GRP_SPI0_4_SS0, 369 PINCTRL_GRP_SPI0_4_SS1, 370 PINCTRL_GRP_SPI0_4_SS2, 371 PINCTRL_GRP_SPI0_5_SS0, 372 PINCTRL_GRP_SPI0_5_SS1, 373 PINCTRL_GRP_SPI0_5_SS2, 374 END_OF_GROUPS, 375 }), 376 }, 377 [PINCTRL_FUNC_SPI1_SS] = { 378 .name = "spi1_ss", 379 .regval = 0x80, 380 .groups = &((uint16_t []) { 381 PINCTRL_GRP_SPI1_0_SS0, 382 PINCTRL_GRP_SPI1_0_SS1, 383 PINCTRL_GRP_SPI1_0_SS2, 384 PINCTRL_GRP_SPI1_1_SS0, 385 PINCTRL_GRP_SPI1_1_SS1, 386 PINCTRL_GRP_SPI1_1_SS2, 387 PINCTRL_GRP_SPI1_2_SS0, 388 PINCTRL_GRP_SPI1_2_SS1, 389 PINCTRL_GRP_SPI1_2_SS2, 390 PINCTRL_GRP_SPI1_3_SS0, 391 PINCTRL_GRP_SPI1_3_SS1, 392 PINCTRL_GRP_SPI1_3_SS2, 393 PINCTRL_GRP_SPI1_4_SS0, 394 PINCTRL_GRP_SPI1_4_SS1, 395 PINCTRL_GRP_SPI1_4_SS2, 396 PINCTRL_GRP_SPI1_5_SS0, 397 PINCTRL_GRP_SPI1_5_SS1, 398 PINCTRL_GRP_SPI1_5_SS2, 399 END_OF_GROUPS, 400 }), 401 }, 402 [PINCTRL_FUNC_SDIO0] = { 403 .name = "sdio0", 404 .regval = 0x08, 405 .groups = &((uint16_t []) { 406 PINCTRL_GRP_SDIO0_0, 407 PINCTRL_GRP_SDIO0_1, 408 PINCTRL_GRP_SDIO0_2, 409 PINCTRL_GRP_SDIO0_4BIT_0_0, 410 PINCTRL_GRP_SDIO0_4BIT_0_1, 411 PINCTRL_GRP_SDIO0_4BIT_1_0, 412 PINCTRL_GRP_SDIO0_4BIT_1_1, 413 PINCTRL_GRP_SDIO0_4BIT_2_0, 414 PINCTRL_GRP_SDIO0_4BIT_2_1, 415 PINCTRL_GRP_SDIO0_1BIT_0_0, 416 PINCTRL_GRP_SDIO0_1BIT_0_1, 417 PINCTRL_GRP_SDIO0_1BIT_0_2, 418 PINCTRL_GRP_SDIO0_1BIT_0_3, 419 PINCTRL_GRP_SDIO0_1BIT_0_4, 420 PINCTRL_GRP_SDIO0_1BIT_0_5, 421 PINCTRL_GRP_SDIO0_1BIT_0_6, 422 PINCTRL_GRP_SDIO0_1BIT_0_7, 423 PINCTRL_GRP_SDIO0_1BIT_1_0, 424 PINCTRL_GRP_SDIO0_1BIT_1_1, 425 PINCTRL_GRP_SDIO0_1BIT_1_2, 426 PINCTRL_GRP_SDIO0_1BIT_1_3, 427 PINCTRL_GRP_SDIO0_1BIT_1_4, 428 PINCTRL_GRP_SDIO0_1BIT_1_5, 429 PINCTRL_GRP_SDIO0_1BIT_1_6, 430 PINCTRL_GRP_SDIO0_1BIT_1_7, 431 PINCTRL_GRP_SDIO0_1BIT_2_0, 432 PINCTRL_GRP_SDIO0_1BIT_2_1, 433 PINCTRL_GRP_SDIO0_1BIT_2_2, 434 PINCTRL_GRP_SDIO0_1BIT_2_3, 435 PINCTRL_GRP_SDIO0_1BIT_2_4, 436 PINCTRL_GRP_SDIO0_1BIT_2_5, 437 PINCTRL_GRP_SDIO0_1BIT_2_6, 438 PINCTRL_GRP_SDIO0_1BIT_2_7, 439 END_OF_GROUPS, 440 }), 441 }, 442 [PINCTRL_FUNC_SDIO0_PC] = { 443 .name = "sdio0_pc", 444 .regval = 0x08, 445 .groups = &((uint16_t []) { 446 PINCTRL_GRP_SDIO0_0_PC, 447 PINCTRL_GRP_SDIO0_1_PC, 448 PINCTRL_GRP_SDIO0_2_PC, 449 END_OF_GROUPS, 450 }), 451 }, 452 [PINCTRL_FUNC_SDIO0_CD] = { 453 .name = "sdio0_cd", 454 .regval = 0x08, 455 .groups = &((uint16_t []) { 456 PINCTRL_GRP_SDIO0_0_CD, 457 PINCTRL_GRP_SDIO0_1_CD, 458 PINCTRL_GRP_SDIO0_2_CD, 459 END_OF_GROUPS, 460 }), 461 }, 462 [PINCTRL_FUNC_SDIO0_WP] = { 463 .name = "sdio0_wp", 464 .regval = 0x08, 465 .groups = &((uint16_t []) { 466 PINCTRL_GRP_SDIO0_0_WP, 467 PINCTRL_GRP_SDIO0_1_WP, 468 PINCTRL_GRP_SDIO0_2_WP, 469 END_OF_GROUPS, 470 }), 471 }, 472 [PINCTRL_FUNC_SDIO1] = { 473 .name = "sdio1", 474 .regval = 0x10, 475 .groups = &((uint16_t []) { 476 PINCTRL_GRP_SDIO1_0, 477 PINCTRL_GRP_SDIO1_4BIT_0_0, 478 PINCTRL_GRP_SDIO1_4BIT_0_1, 479 PINCTRL_GRP_SDIO1_4BIT_1_0, 480 PINCTRL_GRP_SDIO1_1BIT_0_0, 481 PINCTRL_GRP_SDIO1_1BIT_0_1, 482 PINCTRL_GRP_SDIO1_1BIT_0_2, 483 PINCTRL_GRP_SDIO1_1BIT_0_3, 484 PINCTRL_GRP_SDIO1_1BIT_0_4, 485 PINCTRL_GRP_SDIO1_1BIT_0_5, 486 PINCTRL_GRP_SDIO1_1BIT_0_6, 487 PINCTRL_GRP_SDIO1_1BIT_0_7, 488 PINCTRL_GRP_SDIO1_1BIT_1_0, 489 PINCTRL_GRP_SDIO1_1BIT_1_1, 490 PINCTRL_GRP_SDIO1_1BIT_1_2, 491 PINCTRL_GRP_SDIO1_1BIT_1_3, 492 END_OF_GROUPS, 493 }), 494 }, 495 [PINCTRL_FUNC_SDIO1_PC] = { 496 .name = "sdio1_pc", 497 .regval = 0x10, 498 .groups = &((uint16_t []) { 499 PINCTRL_GRP_SDIO1_0_PC, 500 PINCTRL_GRP_SDIO1_1_PC, 501 END_OF_GROUPS, 502 }), 503 }, 504 [PINCTRL_FUNC_SDIO1_CD] = { 505 .name = "sdio1_cd", 506 .regval = 0x10, 507 .groups = &((uint16_t []) { 508 PINCTRL_GRP_SDIO1_0_CD, 509 PINCTRL_GRP_SDIO1_1_CD, 510 END_OF_GROUPS, 511 }), 512 }, 513 [PINCTRL_FUNC_SDIO1_WP] = { 514 .name = "sdio1_wp", 515 .regval = 0x10, 516 .groups = &((uint16_t []) { 517 PINCTRL_GRP_SDIO1_0_WP, 518 PINCTRL_GRP_SDIO1_1_WP, 519 END_OF_GROUPS, 520 }), 521 }, 522 [PINCTRL_FUNC_NAND0] = { 523 .name = "nand0", 524 .regval = 0x04, 525 .groups = &((uint16_t []) { 526 PINCTRL_GRP_NAND0_0, 527 END_OF_GROUPS, 528 }), 529 }, 530 [PINCTRL_FUNC_NAND0_CE] = { 531 .name = "nand0_ce", 532 .regval = 0x04, 533 .groups = &((uint16_t []) { 534 PINCTRL_GRP_NAND0_0_CE, 535 PINCTRL_GRP_NAND0_1_CE, 536 END_OF_GROUPS, 537 }), 538 }, 539 [PINCTRL_FUNC_NAND0_RB] = { 540 .name = "nand0_rb", 541 .regval = 0x04, 542 .groups = &((uint16_t []) { 543 PINCTRL_GRP_NAND0_0_RB, 544 PINCTRL_GRP_NAND0_1_RB, 545 END_OF_GROUPS, 546 }), 547 }, 548 [PINCTRL_FUNC_NAND0_DQS] = { 549 .name = "nand0_dqs", 550 .regval = 0x04, 551 .groups = &((uint16_t []) { 552 PINCTRL_GRP_NAND0_0_DQS, 553 PINCTRL_GRP_NAND0_1_DQS, 554 END_OF_GROUPS, 555 }), 556 }, 557 [PINCTRL_FUNC_TTC0_CLK] = { 558 .name = "ttc0_clk", 559 .regval = 0xa0, 560 .groups = &((uint16_t []) { 561 PINCTRL_GRP_TTC0_0_CLK, 562 PINCTRL_GRP_TTC0_1_CLK, 563 PINCTRL_GRP_TTC0_2_CLK, 564 PINCTRL_GRP_TTC0_3_CLK, 565 PINCTRL_GRP_TTC0_4_CLK, 566 PINCTRL_GRP_TTC0_5_CLK, 567 PINCTRL_GRP_TTC0_6_CLK, 568 PINCTRL_GRP_TTC0_7_CLK, 569 PINCTRL_GRP_TTC0_8_CLK, 570 END_OF_GROUPS, 571 }), 572 }, 573 [PINCTRL_FUNC_TTC0_WAV] = { 574 .name = "ttc0_wav", 575 .regval = 0xa0, 576 .groups = &((uint16_t []) { 577 PINCTRL_GRP_TTC0_0_WAV, 578 PINCTRL_GRP_TTC0_1_WAV, 579 PINCTRL_GRP_TTC0_2_WAV, 580 PINCTRL_GRP_TTC0_3_WAV, 581 PINCTRL_GRP_TTC0_4_WAV, 582 PINCTRL_GRP_TTC0_5_WAV, 583 PINCTRL_GRP_TTC0_6_WAV, 584 PINCTRL_GRP_TTC0_7_WAV, 585 PINCTRL_GRP_TTC0_8_WAV, 586 END_OF_GROUPS, 587 }), 588 }, 589 [PINCTRL_FUNC_TTC1_CLK] = { 590 .name = "ttc1_clk", 591 .regval = 0xa0, 592 .groups = &((uint16_t []) { 593 PINCTRL_GRP_TTC1_0_CLK, 594 PINCTRL_GRP_TTC1_1_CLK, 595 PINCTRL_GRP_TTC1_2_CLK, 596 PINCTRL_GRP_TTC1_3_CLK, 597 PINCTRL_GRP_TTC1_4_CLK, 598 PINCTRL_GRP_TTC1_5_CLK, 599 PINCTRL_GRP_TTC1_6_CLK, 600 PINCTRL_GRP_TTC1_7_CLK, 601 PINCTRL_GRP_TTC1_8_CLK, 602 END_OF_GROUPS, 603 }), 604 }, 605 [PINCTRL_FUNC_TTC1_WAV] = { 606 .name = "ttc1_wav", 607 .regval = 0xa0, 608 .groups = &((uint16_t []) { 609 PINCTRL_GRP_TTC1_0_WAV, 610 PINCTRL_GRP_TTC1_1_WAV, 611 PINCTRL_GRP_TTC1_2_WAV, 612 PINCTRL_GRP_TTC1_3_WAV, 613 PINCTRL_GRP_TTC1_4_WAV, 614 PINCTRL_GRP_TTC1_5_WAV, 615 PINCTRL_GRP_TTC1_6_WAV, 616 PINCTRL_GRP_TTC1_7_WAV, 617 PINCTRL_GRP_TTC1_8_WAV, 618 END_OF_GROUPS, 619 }), 620 }, 621 [PINCTRL_FUNC_TTC2_CLK] = { 622 .name = "ttc2_clk", 623 .regval = 0xa0, 624 .groups = &((uint16_t []) { 625 PINCTRL_GRP_TTC2_0_CLK, 626 PINCTRL_GRP_TTC2_1_CLK, 627 PINCTRL_GRP_TTC2_2_CLK, 628 PINCTRL_GRP_TTC2_3_CLK, 629 PINCTRL_GRP_TTC2_4_CLK, 630 PINCTRL_GRP_TTC2_5_CLK, 631 PINCTRL_GRP_TTC2_6_CLK, 632 PINCTRL_GRP_TTC2_7_CLK, 633 PINCTRL_GRP_TTC2_8_CLK, 634 END_OF_GROUPS, 635 }), 636 }, 637 [PINCTRL_FUNC_TTC2_WAV] = { 638 .name = "ttc2_wav", 639 .regval = 0xa0, 640 .groups = &((uint16_t []) { 641 PINCTRL_GRP_TTC2_0_WAV, 642 PINCTRL_GRP_TTC2_1_WAV, 643 PINCTRL_GRP_TTC2_2_WAV, 644 PINCTRL_GRP_TTC2_3_WAV, 645 PINCTRL_GRP_TTC2_4_WAV, 646 PINCTRL_GRP_TTC2_5_WAV, 647 PINCTRL_GRP_TTC2_6_WAV, 648 PINCTRL_GRP_TTC2_7_WAV, 649 PINCTRL_GRP_TTC2_8_WAV, 650 END_OF_GROUPS, 651 }), 652 }, 653 [PINCTRL_FUNC_TTC3_CLK] = { 654 .name = "ttc3_clk", 655 .regval = 0xa0, 656 .groups = &((uint16_t []) { 657 PINCTRL_GRP_TTC3_0_CLK, 658 PINCTRL_GRP_TTC3_1_CLK, 659 PINCTRL_GRP_TTC3_2_CLK, 660 PINCTRL_GRP_TTC3_3_CLK, 661 PINCTRL_GRP_TTC3_4_CLK, 662 PINCTRL_GRP_TTC3_5_CLK, 663 PINCTRL_GRP_TTC3_6_CLK, 664 PINCTRL_GRP_TTC3_7_CLK, 665 PINCTRL_GRP_TTC3_8_CLK, 666 END_OF_GROUPS, 667 }), 668 }, 669 [PINCTRL_FUNC_TTC3_WAV] = { 670 .name = "ttc3_wav", 671 .regval = 0xa0, 672 .groups = &((uint16_t []) { 673 PINCTRL_GRP_TTC3_0_WAV, 674 PINCTRL_GRP_TTC3_1_WAV, 675 PINCTRL_GRP_TTC3_2_WAV, 676 PINCTRL_GRP_TTC3_3_WAV, 677 PINCTRL_GRP_TTC3_4_WAV, 678 PINCTRL_GRP_TTC3_5_WAV, 679 PINCTRL_GRP_TTC3_6_WAV, 680 PINCTRL_GRP_TTC3_7_WAV, 681 PINCTRL_GRP_TTC3_8_WAV, 682 END_OF_GROUPS, 683 }), 684 }, 685 [PINCTRL_FUNC_UART0] = { 686 .name = "uart0", 687 .regval = 0xc0, 688 .groups = &((uint16_t []) { 689 PINCTRL_GRP_UART0_0, 690 PINCTRL_GRP_UART0_1, 691 PINCTRL_GRP_UART0_2, 692 PINCTRL_GRP_UART0_3, 693 PINCTRL_GRP_UART0_4, 694 PINCTRL_GRP_UART0_5, 695 PINCTRL_GRP_UART0_6, 696 PINCTRL_GRP_UART0_7, 697 PINCTRL_GRP_UART0_8, 698 PINCTRL_GRP_UART0_9, 699 PINCTRL_GRP_UART0_10, 700 PINCTRL_GRP_UART0_11, 701 PINCTRL_GRP_UART0_12, 702 PINCTRL_GRP_UART0_13, 703 PINCTRL_GRP_UART0_14, 704 PINCTRL_GRP_UART0_15, 705 PINCTRL_GRP_UART0_16, 706 PINCTRL_GRP_UART0_17, 707 PINCTRL_GRP_UART0_18, 708 END_OF_GROUPS, 709 }), 710 }, 711 [PINCTRL_FUNC_UART1] = { 712 .name = "uart1", 713 .regval = 0xc0, 714 .groups = &((uint16_t []) { 715 PINCTRL_GRP_UART1_0, 716 PINCTRL_GRP_UART1_1, 717 PINCTRL_GRP_UART1_2, 718 PINCTRL_GRP_UART1_3, 719 PINCTRL_GRP_UART1_4, 720 PINCTRL_GRP_UART1_5, 721 PINCTRL_GRP_UART1_6, 722 PINCTRL_GRP_UART1_7, 723 PINCTRL_GRP_UART1_8, 724 PINCTRL_GRP_UART1_9, 725 PINCTRL_GRP_UART1_10, 726 PINCTRL_GRP_UART1_11, 727 PINCTRL_GRP_UART1_12, 728 PINCTRL_GRP_UART1_13, 729 PINCTRL_GRP_UART1_14, 730 PINCTRL_GRP_UART1_15, 731 PINCTRL_GRP_UART1_16, 732 PINCTRL_GRP_UART1_17, 733 PINCTRL_GRP_UART1_18, 734 END_OF_GROUPS, 735 }), 736 }, 737 [PINCTRL_FUNC_USB0] = { 738 .name = "usb0", 739 .regval = 0x04, 740 .groups = &((uint16_t []) { 741 PINCTRL_GRP_USB0_0, 742 END_OF_GROUPS, 743 }), 744 }, 745 [PINCTRL_FUNC_USB1] = { 746 .name = "usb1", 747 .regval = 0x04, 748 .groups = &((uint16_t []) { 749 PINCTRL_GRP_USB1_0, 750 END_OF_GROUPS, 751 }), 752 }, 753 [PINCTRL_FUNC_SWDT0_CLK] = { 754 .name = "swdt0_clk", 755 .regval = 0x60, 756 .groups = &((uint16_t []) { 757 PINCTRL_GRP_SWDT0_0_CLK, 758 PINCTRL_GRP_SWDT0_1_CLK, 759 PINCTRL_GRP_SWDT0_2_CLK, 760 PINCTRL_GRP_SWDT0_3_CLK, 761 PINCTRL_GRP_SWDT0_4_CLK, 762 PINCTRL_GRP_SWDT0_5_CLK, 763 PINCTRL_GRP_SWDT0_6_CLK, 764 PINCTRL_GRP_SWDT0_7_CLK, 765 PINCTRL_GRP_SWDT0_8_CLK, 766 PINCTRL_GRP_SWDT0_9_CLK, 767 PINCTRL_GRP_SWDT0_10_CLK, 768 PINCTRL_GRP_SWDT0_11_CLK, 769 PINCTRL_GRP_SWDT0_12_CLK, 770 END_OF_GROUPS, 771 }), 772 }, 773 [PINCTRL_FUNC_SWDT0_RST] = { 774 .name = "swdt0_rst", 775 .regval = 0x60, 776 .groups = &((uint16_t []) { 777 PINCTRL_GRP_SWDT0_0_RST, 778 PINCTRL_GRP_SWDT0_1_RST, 779 PINCTRL_GRP_SWDT0_2_RST, 780 PINCTRL_GRP_SWDT0_3_RST, 781 PINCTRL_GRP_SWDT0_4_RST, 782 PINCTRL_GRP_SWDT0_5_RST, 783 PINCTRL_GRP_SWDT0_6_RST, 784 PINCTRL_GRP_SWDT0_7_RST, 785 PINCTRL_GRP_SWDT0_8_RST, 786 PINCTRL_GRP_SWDT0_9_RST, 787 PINCTRL_GRP_SWDT0_10_RST, 788 PINCTRL_GRP_SWDT0_11_RST, 789 PINCTRL_GRP_SWDT0_12_RST, 790 END_OF_GROUPS, 791 }), 792 }, 793 [PINCTRL_FUNC_SWDT1_CLK] = { 794 .name = "swdt1_clk", 795 .regval = 0x60, 796 .groups = &((uint16_t []) { 797 PINCTRL_GRP_SWDT1_0_CLK, 798 PINCTRL_GRP_SWDT1_1_CLK, 799 PINCTRL_GRP_SWDT1_2_CLK, 800 PINCTRL_GRP_SWDT1_3_CLK, 801 PINCTRL_GRP_SWDT1_4_CLK, 802 PINCTRL_GRP_SWDT1_5_CLK, 803 PINCTRL_GRP_SWDT1_6_CLK, 804 PINCTRL_GRP_SWDT1_7_CLK, 805 PINCTRL_GRP_SWDT1_8_CLK, 806 PINCTRL_GRP_SWDT1_9_CLK, 807 PINCTRL_GRP_SWDT1_10_CLK, 808 PINCTRL_GRP_SWDT1_11_CLK, 809 PINCTRL_GRP_SWDT1_12_CLK, 810 END_OF_GROUPS, 811 }), 812 }, 813 [PINCTRL_FUNC_SWDT1_RST] = { 814 .name = "swdt1_rst", 815 .regval = 0x60, 816 .groups = &((uint16_t []) { 817 PINCTRL_GRP_SWDT1_0_RST, 818 PINCTRL_GRP_SWDT1_1_RST, 819 PINCTRL_GRP_SWDT1_2_RST, 820 PINCTRL_GRP_SWDT1_3_RST, 821 PINCTRL_GRP_SWDT1_4_RST, 822 PINCTRL_GRP_SWDT1_5_RST, 823 PINCTRL_GRP_SWDT1_6_RST, 824 PINCTRL_GRP_SWDT1_7_RST, 825 PINCTRL_GRP_SWDT1_8_RST, 826 PINCTRL_GRP_SWDT1_9_RST, 827 PINCTRL_GRP_SWDT1_10_RST, 828 PINCTRL_GRP_SWDT1_11_RST, 829 PINCTRL_GRP_SWDT1_12_RST, 830 END_OF_GROUPS, 831 }), 832 }, 833 [PINCTRL_FUNC_PMU0] = { 834 .name = "pmu0", 835 .regval = 0x08, 836 .groups = &((uint16_t []) { 837 PINCTRL_GRP_PMU0_0, 838 PINCTRL_GRP_PMU0_1, 839 PINCTRL_GRP_PMU0_2, 840 PINCTRL_GRP_PMU0_3, 841 PINCTRL_GRP_PMU0_4, 842 PINCTRL_GRP_PMU0_5, 843 PINCTRL_GRP_PMU0_6, 844 PINCTRL_GRP_PMU0_7, 845 PINCTRL_GRP_PMU0_8, 846 PINCTRL_GRP_PMU0_9, 847 PINCTRL_GRP_PMU0_10, 848 PINCTRL_GRP_PMU0_11, 849 END_OF_GROUPS, 850 }), 851 }, 852 [PINCTRL_FUNC_PCIE0] = { 853 .name = "pcie0", 854 .regval = 0x04, 855 .groups = &((uint16_t []) { 856 PINCTRL_GRP_PCIE0_0, 857 PINCTRL_GRP_PCIE0_1, 858 PINCTRL_GRP_PCIE0_2, 859 PINCTRL_GRP_PCIE0_3, 860 PINCTRL_GRP_PCIE0_4, 861 PINCTRL_GRP_PCIE0_5, 862 PINCTRL_GRP_PCIE0_6, 863 PINCTRL_GRP_PCIE0_7, 864 END_OF_GROUPS, 865 }), 866 }, 867 [PINCTRL_FUNC_CSU0] = { 868 .name = "csu0", 869 .regval = 0x18, 870 .groups = &((uint16_t []) { 871 PINCTRL_GRP_CSU0_0, 872 PINCTRL_GRP_CSU0_1, 873 PINCTRL_GRP_CSU0_2, 874 PINCTRL_GRP_CSU0_3, 875 PINCTRL_GRP_CSU0_4, 876 PINCTRL_GRP_CSU0_5, 877 PINCTRL_GRP_CSU0_6, 878 PINCTRL_GRP_CSU0_7, 879 PINCTRL_GRP_CSU0_8, 880 PINCTRL_GRP_CSU0_9, 881 PINCTRL_GRP_CSU0_10, 882 PINCTRL_GRP_CSU0_11, 883 END_OF_GROUPS, 884 }), 885 }, 886 [PINCTRL_FUNC_DPAUX0] = { 887 .name = "dpaux0", 888 .regval = 0x18, 889 .groups = &((uint16_t []) { 890 PINCTRL_GRP_DPAUX0_0, 891 PINCTRL_GRP_DPAUX0_1, 892 PINCTRL_GRP_DPAUX0_2, 893 PINCTRL_GRP_DPAUX0_3, 894 END_OF_GROUPS, 895 }), 896 }, 897 [PINCTRL_FUNC_PJTAG0] = { 898 .name = "pjtag0", 899 .regval = 0x60, 900 .groups = &((uint16_t []) { 901 PINCTRL_GRP_PJTAG0_0, 902 PINCTRL_GRP_PJTAG0_1, 903 PINCTRL_GRP_PJTAG0_2, 904 PINCTRL_GRP_PJTAG0_3, 905 PINCTRL_GRP_PJTAG0_4, 906 PINCTRL_GRP_PJTAG0_5, 907 END_OF_GROUPS, 908 }), 909 }, 910 [PINCTRL_FUNC_TRACE0] = { 911 .name = "trace0", 912 .regval = 0xe0, 913 .groups = &((uint16_t []) { 914 PINCTRL_GRP_TRACE0_0, 915 PINCTRL_GRP_TRACE0_1, 916 PINCTRL_GRP_TRACE0_2, 917 END_OF_GROUPS, 918 }), 919 }, 920 [PINCTRL_FUNC_TRACE0_CLK] = { 921 .name = "trace0_clk", 922 .regval = 0xe0, 923 .groups = &((uint16_t []) { 924 PINCTRL_GRP_TRACE0_0_CLK, 925 PINCTRL_GRP_TRACE0_1_CLK, 926 PINCTRL_GRP_TRACE0_2_CLK, 927 END_OF_GROUPS, 928 }), 929 }, 930 [PINCTRL_FUNC_TESTSCAN0] = { 931 .name = "testscan0", 932 .regval = 0x10, 933 .groups = &((uint16_t []) { 934 PINCTRL_GRP_TESTSCAN0_0, 935 END_OF_GROUPS, 936 }), 937 }, 938 }; 939 940 static struct zynqmp_pin_group zynqmp_pin_groups[MAX_PIN] = { 941 [PINCTRL_PIN_0] = { 942 .groups = &((uint16_t []) { 943 PINCTRL_GRP_QSPI0_0, 944 PINCTRL_GRP_RESERVED, 945 PINCTRL_GRP_RESERVED, 946 PINCTRL_GRP_TESTSCAN0_0, 947 PINCTRL_GRP_RESERVED, 948 PINCTRL_GRP_GPIO0_0, 949 PINCTRL_GRP_CAN1_0, 950 PINCTRL_GRP_I2C1_0, 951 PINCTRL_GRP_PJTAG0_0, 952 PINCTRL_GRP_SPI0_0, 953 PINCTRL_GRP_TTC3_0_CLK, 954 PINCTRL_GRP_UART1_0, 955 PINCTRL_GRP_TRACE0_0_CLK, 956 END_OF_GROUPS, 957 }), 958 }, 959 [PINCTRL_PIN_1] = { 960 .groups = &((uint16_t []) { 961 PINCTRL_GRP_QSPI0_0, 962 PINCTRL_GRP_RESERVED, 963 PINCTRL_GRP_RESERVED, 964 PINCTRL_GRP_TESTSCAN0_0, 965 PINCTRL_GRP_RESERVED, 966 PINCTRL_GRP_GPIO0_1, 967 PINCTRL_GRP_CAN1_0, 968 PINCTRL_GRP_I2C1_0, 969 PINCTRL_GRP_PJTAG0_0, 970 PINCTRL_GRP_SPI0_0_SS2, 971 PINCTRL_GRP_TTC3_0_WAV, 972 PINCTRL_GRP_UART1_0, 973 PINCTRL_GRP_TRACE0_0_CLK, 974 END_OF_GROUPS, 975 }), 976 }, 977 [PINCTRL_PIN_2] = { 978 .groups = &((uint16_t []) { 979 PINCTRL_GRP_QSPI0_0, 980 PINCTRL_GRP_RESERVED, 981 PINCTRL_GRP_RESERVED, 982 PINCTRL_GRP_TESTSCAN0_0, 983 PINCTRL_GRP_RESERVED, 984 PINCTRL_GRP_GPIO0_2, 985 PINCTRL_GRP_CAN0_0, 986 PINCTRL_GRP_I2C0_0, 987 PINCTRL_GRP_PJTAG0_0, 988 PINCTRL_GRP_SPI0_0_SS1, 989 PINCTRL_GRP_TTC2_0_CLK, 990 PINCTRL_GRP_UART0_0, 991 PINCTRL_GRP_TRACE0_0, 992 END_OF_GROUPS, 993 }), 994 }, 995 [PINCTRL_PIN_3] = { 996 .groups = &((uint16_t []) { 997 PINCTRL_GRP_QSPI0_0, 998 PINCTRL_GRP_RESERVED, 999 PINCTRL_GRP_RESERVED, 1000 PINCTRL_GRP_TESTSCAN0_0, 1001 PINCTRL_GRP_RESERVED, 1002 PINCTRL_GRP_GPIO0_3, 1003 PINCTRL_GRP_CAN0_0, 1004 PINCTRL_GRP_I2C0_0, 1005 PINCTRL_GRP_PJTAG0_0, 1006 PINCTRL_GRP_SPI0_0_SS0, 1007 PINCTRL_GRP_TTC2_0_WAV, 1008 PINCTRL_GRP_UART0_0, 1009 PINCTRL_GRP_TRACE0_0, 1010 END_OF_GROUPS, 1011 }), 1012 }, 1013 [PINCTRL_PIN_4] = { 1014 .groups = &((uint16_t []) { 1015 PINCTRL_GRP_QSPI0_0, 1016 PINCTRL_GRP_RESERVED, 1017 PINCTRL_GRP_RESERVED, 1018 PINCTRL_GRP_TESTSCAN0_0, 1019 PINCTRL_GRP_RESERVED, 1020 PINCTRL_GRP_GPIO0_4, 1021 PINCTRL_GRP_CAN1_1, 1022 PINCTRL_GRP_I2C1_1, 1023 PINCTRL_GRP_SWDT1_0_CLK, 1024 PINCTRL_GRP_SPI0_0, 1025 PINCTRL_GRP_TTC1_0_CLK, 1026 PINCTRL_GRP_UART1_1, 1027 PINCTRL_GRP_TRACE0_0, 1028 END_OF_GROUPS, 1029 }), 1030 }, 1031 [PINCTRL_PIN_5] = { 1032 .groups = &((uint16_t []) { 1033 PINCTRL_GRP_QSPI_SS, 1034 PINCTRL_GRP_RESERVED, 1035 PINCTRL_GRP_RESERVED, 1036 PINCTRL_GRP_TESTSCAN0_0, 1037 PINCTRL_GRP_RESERVED, 1038 PINCTRL_GRP_GPIO0_5, 1039 PINCTRL_GRP_CAN1_1, 1040 PINCTRL_GRP_I2C1_1, 1041 PINCTRL_GRP_SWDT1_0_RST, 1042 PINCTRL_GRP_SPI0_0, 1043 PINCTRL_GRP_TTC1_0_WAV, 1044 PINCTRL_GRP_UART1_1, 1045 PINCTRL_GRP_TRACE0_0, 1046 END_OF_GROUPS, 1047 }), 1048 }, 1049 [PINCTRL_PIN_6] = { 1050 .groups = &((uint16_t []) { 1051 PINCTRL_GRP_QSPI_FBCLK, 1052 PINCTRL_GRP_RESERVED, 1053 PINCTRL_GRP_RESERVED, 1054 PINCTRL_GRP_TESTSCAN0_0, 1055 PINCTRL_GRP_RESERVED, 1056 PINCTRL_GRP_GPIO0_6, 1057 PINCTRL_GRP_CAN0_1, 1058 PINCTRL_GRP_I2C0_1, 1059 PINCTRL_GRP_SWDT0_0_CLK, 1060 PINCTRL_GRP_SPI1_0, 1061 PINCTRL_GRP_TTC0_0_CLK, 1062 PINCTRL_GRP_UART0_1, 1063 PINCTRL_GRP_TRACE0_0, 1064 END_OF_GROUPS, 1065 }), 1066 }, 1067 [PINCTRL_PIN_7] = { 1068 .groups = &((uint16_t []) { 1069 PINCTRL_GRP_QSPI_SS, 1070 PINCTRL_GRP_RESERVED, 1071 PINCTRL_GRP_RESERVED, 1072 PINCTRL_GRP_TESTSCAN0_0, 1073 PINCTRL_GRP_RESERVED, 1074 PINCTRL_GRP_GPIO0_7, 1075 PINCTRL_GRP_CAN0_1, 1076 PINCTRL_GRP_I2C0_1, 1077 PINCTRL_GRP_SWDT0_0_RST, 1078 PINCTRL_GRP_SPI1_0_SS2, 1079 PINCTRL_GRP_TTC0_0_WAV, 1080 PINCTRL_GRP_UART0_1, 1081 PINCTRL_GRP_TRACE0_0, 1082 END_OF_GROUPS, 1083 }), 1084 }, 1085 [PINCTRL_PIN_8] = { 1086 .groups = &((uint16_t []) { 1087 PINCTRL_GRP_QSPI0_0, 1088 PINCTRL_GRP_RESERVED, 1089 PINCTRL_GRP_RESERVED, 1090 PINCTRL_GRP_TESTSCAN0_0, 1091 PINCTRL_GRP_RESERVED, 1092 PINCTRL_GRP_GPIO0_8, 1093 PINCTRL_GRP_CAN1_2, 1094 PINCTRL_GRP_I2C1_2, 1095 PINCTRL_GRP_SWDT1_1_CLK, 1096 PINCTRL_GRP_SPI1_0_SS1, 1097 PINCTRL_GRP_TTC3_1_CLK, 1098 PINCTRL_GRP_UART1_2, 1099 PINCTRL_GRP_TRACE0_0, 1100 END_OF_GROUPS, 1101 }), 1102 }, 1103 [PINCTRL_PIN_9] = { 1104 .groups = &((uint16_t []) { 1105 PINCTRL_GRP_QSPI0_0, 1106 PINCTRL_GRP_NAND0_0_CE, 1107 PINCTRL_GRP_RESERVED, 1108 PINCTRL_GRP_TESTSCAN0_0, 1109 PINCTRL_GRP_RESERVED, 1110 PINCTRL_GRP_GPIO0_9, 1111 PINCTRL_GRP_CAN1_2, 1112 PINCTRL_GRP_I2C1_2, 1113 PINCTRL_GRP_SWDT1_1_RST, 1114 PINCTRL_GRP_SPI1_0_SS0, 1115 PINCTRL_GRP_TTC3_1_WAV, 1116 PINCTRL_GRP_UART1_2, 1117 PINCTRL_GRP_TRACE0_0, 1118 END_OF_GROUPS, 1119 }), 1120 }, 1121 [PINCTRL_PIN_10] = { 1122 .groups = &((uint16_t []) { 1123 PINCTRL_GRP_QSPI0_0, 1124 PINCTRL_GRP_NAND0_0_RB, 1125 PINCTRL_GRP_RESERVED, 1126 PINCTRL_GRP_TESTSCAN0_0, 1127 PINCTRL_GRP_RESERVED, 1128 PINCTRL_GRP_GPIO0_10, 1129 PINCTRL_GRP_CAN0_2, 1130 PINCTRL_GRP_I2C0_2, 1131 PINCTRL_GRP_SWDT0_1_CLK, 1132 PINCTRL_GRP_SPI1_0, 1133 PINCTRL_GRP_TTC2_1_CLK, 1134 PINCTRL_GRP_UART0_2, 1135 PINCTRL_GRP_TRACE0_0, 1136 END_OF_GROUPS, 1137 }), 1138 }, 1139 [PINCTRL_PIN_11] = { 1140 .groups = &((uint16_t []) { 1141 PINCTRL_GRP_QSPI0_0, 1142 PINCTRL_GRP_NAND0_0_RB, 1143 PINCTRL_GRP_RESERVED, 1144 PINCTRL_GRP_TESTSCAN0_0, 1145 PINCTRL_GRP_RESERVED, 1146 PINCTRL_GRP_GPIO0_11, 1147 PINCTRL_GRP_CAN0_2, 1148 PINCTRL_GRP_I2C0_2, 1149 PINCTRL_GRP_SWDT0_1_RST, 1150 PINCTRL_GRP_SPI1_0, 1151 PINCTRL_GRP_TTC2_1_WAV, 1152 PINCTRL_GRP_UART0_2, 1153 PINCTRL_GRP_TRACE0_0, 1154 END_OF_GROUPS, 1155 }), 1156 }, 1157 [PINCTRL_PIN_12] = { 1158 .groups = &((uint16_t []) { 1159 PINCTRL_GRP_QSPI0_0, 1160 PINCTRL_GRP_NAND0_0_DQS, 1161 PINCTRL_GRP_RESERVED, 1162 PINCTRL_GRP_TESTSCAN0_0, 1163 PINCTRL_GRP_RESERVED, 1164 PINCTRL_GRP_GPIO0_12, 1165 PINCTRL_GRP_CAN1_3, 1166 PINCTRL_GRP_I2C1_3, 1167 PINCTRL_GRP_PJTAG0_1, 1168 PINCTRL_GRP_SPI0_1, 1169 PINCTRL_GRP_TTC1_1_CLK, 1170 PINCTRL_GRP_UART1_3, 1171 PINCTRL_GRP_TRACE0_0, 1172 END_OF_GROUPS, 1173 }), 1174 }, 1175 [PINCTRL_PIN_13] = { 1176 .groups = &((uint16_t []) { 1177 PINCTRL_GRP_RESERVED, 1178 PINCTRL_GRP_NAND0_0, 1179 PINCTRL_GRP_SDIO0_0, 1180 PINCTRL_GRP_TESTSCAN0_0, 1181 PINCTRL_GRP_RESERVED, 1182 PINCTRL_GRP_GPIO0_13, 1183 PINCTRL_GRP_CAN1_3, 1184 PINCTRL_GRP_I2C1_3, 1185 PINCTRL_GRP_PJTAG0_1, 1186 PINCTRL_GRP_SPI0_1_SS2, 1187 PINCTRL_GRP_TTC1_1_WAV, 1188 PINCTRL_GRP_UART1_3, 1189 PINCTRL_GRP_TRACE0_0, 1190 PINCTRL_GRP_SDIO0_4BIT_0_0, 1191 PINCTRL_GRP_SDIO0_1BIT_0_0, 1192 END_OF_GROUPS, 1193 }), 1194 }, 1195 [PINCTRL_PIN_14] = { 1196 .groups = &((uint16_t []) { 1197 PINCTRL_GRP_RESERVED, 1198 PINCTRL_GRP_NAND0_0, 1199 PINCTRL_GRP_SDIO0_0, 1200 PINCTRL_GRP_TESTSCAN0_0, 1201 PINCTRL_GRP_RESERVED, 1202 PINCTRL_GRP_GPIO0_14, 1203 PINCTRL_GRP_CAN0_3, 1204 PINCTRL_GRP_I2C0_3, 1205 PINCTRL_GRP_PJTAG0_1, 1206 PINCTRL_GRP_SPI0_1_SS1, 1207 PINCTRL_GRP_TTC0_1_CLK, 1208 PINCTRL_GRP_UART0_3, 1209 PINCTRL_GRP_TRACE0_0, 1210 PINCTRL_GRP_SDIO0_4BIT_0_0, 1211 PINCTRL_GRP_SDIO0_1BIT_0_1, 1212 END_OF_GROUPS, 1213 }), 1214 }, 1215 [PINCTRL_PIN_15] = { 1216 .groups = &((uint16_t []) { 1217 PINCTRL_GRP_RESERVED, 1218 PINCTRL_GRP_NAND0_0, 1219 PINCTRL_GRP_SDIO0_0, 1220 PINCTRL_GRP_TESTSCAN0_0, 1221 PINCTRL_GRP_RESERVED, 1222 PINCTRL_GRP_GPIO0_15, 1223 PINCTRL_GRP_CAN0_3, 1224 PINCTRL_GRP_I2C0_3, 1225 PINCTRL_GRP_PJTAG0_1, 1226 PINCTRL_GRP_SPI0_1_SS0, 1227 PINCTRL_GRP_TTC0_1_WAV, 1228 PINCTRL_GRP_UART0_3, 1229 PINCTRL_GRP_TRACE0_0, 1230 PINCTRL_GRP_SDIO0_4BIT_0_0, 1231 PINCTRL_GRP_SDIO0_1BIT_0_2, 1232 END_OF_GROUPS, 1233 }), 1234 }, 1235 [PINCTRL_PIN_16] = { 1236 .groups = &((uint16_t []) { 1237 PINCTRL_GRP_RESERVED, 1238 PINCTRL_GRP_NAND0_0, 1239 PINCTRL_GRP_SDIO0_0, 1240 PINCTRL_GRP_TESTSCAN0_0, 1241 PINCTRL_GRP_RESERVED, 1242 PINCTRL_GRP_GPIO0_16, 1243 PINCTRL_GRP_CAN1_4, 1244 PINCTRL_GRP_I2C1_4, 1245 PINCTRL_GRP_SWDT1_2_CLK, 1246 PINCTRL_GRP_SPI0_1, 1247 PINCTRL_GRP_TTC3_2_CLK, 1248 PINCTRL_GRP_UART1_4, 1249 PINCTRL_GRP_TRACE0_0, 1250 PINCTRL_GRP_SDIO0_4BIT_0_0, 1251 PINCTRL_GRP_SDIO0_1BIT_0_3, 1252 END_OF_GROUPS, 1253 }), 1254 }, 1255 [PINCTRL_PIN_17] = { 1256 .groups = &((uint16_t []) { 1257 PINCTRL_GRP_RESERVED, 1258 PINCTRL_GRP_NAND0_0, 1259 PINCTRL_GRP_SDIO0_0, 1260 PINCTRL_GRP_TESTSCAN0_0, 1261 PINCTRL_GRP_RESERVED, 1262 PINCTRL_GRP_GPIO0_17, 1263 PINCTRL_GRP_CAN1_4, 1264 PINCTRL_GRP_I2C1_4, 1265 PINCTRL_GRP_SWDT1_2_RST, 1266 PINCTRL_GRP_SPI0_1, 1267 PINCTRL_GRP_TTC3_2_WAV, 1268 PINCTRL_GRP_UART1_4, 1269 PINCTRL_GRP_TRACE0_0, 1270 PINCTRL_GRP_SDIO0_4BIT_0_1, 1271 PINCTRL_GRP_SDIO0_1BIT_0_4, 1272 END_OF_GROUPS, 1273 }), 1274 }, 1275 [PINCTRL_PIN_18] = { 1276 .groups = &((uint16_t []) { 1277 PINCTRL_GRP_RESERVED, 1278 PINCTRL_GRP_NAND0_0, 1279 PINCTRL_GRP_SDIO0_0, 1280 PINCTRL_GRP_TESTSCAN0_0, 1281 PINCTRL_GRP_CSU0_0, 1282 PINCTRL_GRP_GPIO0_18, 1283 PINCTRL_GRP_CAN0_4, 1284 PINCTRL_GRP_I2C0_4, 1285 PINCTRL_GRP_SWDT0_2_CLK, 1286 PINCTRL_GRP_SPI1_1, 1287 PINCTRL_GRP_TTC2_2_CLK, 1288 PINCTRL_GRP_UART0_4, 1289 PINCTRL_GRP_RESERVED, 1290 PINCTRL_GRP_SDIO0_4BIT_0_1, 1291 PINCTRL_GRP_SDIO0_1BIT_0_5, 1292 END_OF_GROUPS, 1293 }), 1294 }, 1295 [PINCTRL_PIN_19] = { 1296 .groups = &((uint16_t []) { 1297 PINCTRL_GRP_RESERVED, 1298 PINCTRL_GRP_NAND0_0, 1299 PINCTRL_GRP_SDIO0_0, 1300 PINCTRL_GRP_TESTSCAN0_0, 1301 PINCTRL_GRP_CSU0_1, 1302 PINCTRL_GRP_GPIO0_19, 1303 PINCTRL_GRP_CAN0_4, 1304 PINCTRL_GRP_I2C0_4, 1305 PINCTRL_GRP_SWDT0_2_RST, 1306 PINCTRL_GRP_SPI1_1_SS2, 1307 PINCTRL_GRP_TTC2_2_WAV, 1308 PINCTRL_GRP_UART0_4, 1309 PINCTRL_GRP_RESERVED, 1310 PINCTRL_GRP_SDIO0_4BIT_0_1, 1311 PINCTRL_GRP_SDIO0_1BIT_0_6, 1312 END_OF_GROUPS, 1313 }), 1314 }, 1315 [PINCTRL_PIN_20] = { 1316 .groups = &((uint16_t []) { 1317 PINCTRL_GRP_RESERVED, 1318 PINCTRL_GRP_NAND0_0, 1319 PINCTRL_GRP_SDIO0_0, 1320 PINCTRL_GRP_TESTSCAN0_0, 1321 PINCTRL_GRP_CSU0_2, 1322 PINCTRL_GRP_GPIO0_20, 1323 PINCTRL_GRP_CAN1_5, 1324 PINCTRL_GRP_I2C1_5, 1325 PINCTRL_GRP_SWDT1_3_CLK, 1326 PINCTRL_GRP_SPI1_1_SS1, 1327 PINCTRL_GRP_TTC1_2_CLK, 1328 PINCTRL_GRP_UART1_5, 1329 PINCTRL_GRP_RESERVED, 1330 PINCTRL_GRP_SDIO0_4BIT_0_1, 1331 PINCTRL_GRP_SDIO0_1BIT_0_7, 1332 END_OF_GROUPS, 1333 }), 1334 }, 1335 [PINCTRL_PIN_21] = { 1336 .groups = &((uint16_t []) { 1337 PINCTRL_GRP_RESERVED, 1338 PINCTRL_GRP_NAND0_0, 1339 PINCTRL_GRP_SDIO0_0, 1340 PINCTRL_GRP_TESTSCAN0_0, 1341 PINCTRL_GRP_CSU0_3, 1342 PINCTRL_GRP_GPIO0_21, 1343 PINCTRL_GRP_CAN1_5, 1344 PINCTRL_GRP_I2C1_5, 1345 PINCTRL_GRP_SWDT1_3_RST, 1346 PINCTRL_GRP_SPI1_1_SS0, 1347 PINCTRL_GRP_TTC1_2_WAV, 1348 PINCTRL_GRP_UART1_5, 1349 PINCTRL_GRP_RESERVED, 1350 PINCTRL_GRP_SDIO0_4BIT_0_0, 1351 PINCTRL_GRP_SDIO0_4BIT_0_1, 1352 PINCTRL_GRP_SDIO0_1BIT_0_0, 1353 PINCTRL_GRP_SDIO0_1BIT_0_1, 1354 PINCTRL_GRP_SDIO0_1BIT_0_2, 1355 PINCTRL_GRP_SDIO0_1BIT_0_3, 1356 PINCTRL_GRP_SDIO0_1BIT_0_4, 1357 PINCTRL_GRP_SDIO0_1BIT_0_5, 1358 PINCTRL_GRP_SDIO0_1BIT_0_6, 1359 PINCTRL_GRP_SDIO0_1BIT_0_7, 1360 END_OF_GROUPS, 1361 }), 1362 }, 1363 [PINCTRL_PIN_22] = { 1364 .groups = &((uint16_t []) { 1365 PINCTRL_GRP_RESERVED, 1366 PINCTRL_GRP_NAND0_0, 1367 PINCTRL_GRP_SDIO0_0, 1368 PINCTRL_GRP_TESTSCAN0_0, 1369 PINCTRL_GRP_CSU0_4, 1370 PINCTRL_GRP_GPIO0_22, 1371 PINCTRL_GRP_CAN0_5, 1372 PINCTRL_GRP_I2C0_5, 1373 PINCTRL_GRP_SWDT0_3_CLK, 1374 PINCTRL_GRP_SPI1_1, 1375 PINCTRL_GRP_TTC0_2_CLK, 1376 PINCTRL_GRP_UART0_5, 1377 PINCTRL_GRP_RESERVED, 1378 PINCTRL_GRP_SDIO0_4BIT_0_0, 1379 PINCTRL_GRP_SDIO0_4BIT_0_1, 1380 PINCTRL_GRP_SDIO0_1BIT_0_0, 1381 PINCTRL_GRP_SDIO0_1BIT_0_1, 1382 PINCTRL_GRP_SDIO0_1BIT_0_2, 1383 PINCTRL_GRP_SDIO0_1BIT_0_3, 1384 PINCTRL_GRP_SDIO0_1BIT_0_4, 1385 PINCTRL_GRP_SDIO0_1BIT_0_5, 1386 PINCTRL_GRP_SDIO0_1BIT_0_6, 1387 PINCTRL_GRP_SDIO0_1BIT_0_7, 1388 END_OF_GROUPS, 1389 }), 1390 }, 1391 [PINCTRL_PIN_23] = { 1392 .groups = &((uint16_t []) { 1393 PINCTRL_GRP_RESERVED, 1394 PINCTRL_GRP_NAND0_0, 1395 PINCTRL_GRP_SDIO0_0_PC, 1396 PINCTRL_GRP_TESTSCAN0_0, 1397 PINCTRL_GRP_CSU0_5, 1398 PINCTRL_GRP_GPIO0_23, 1399 PINCTRL_GRP_CAN0_5, 1400 PINCTRL_GRP_I2C0_5, 1401 PINCTRL_GRP_SWDT0_3_RST, 1402 PINCTRL_GRP_SPI1_1, 1403 PINCTRL_GRP_TTC0_2_WAV, 1404 PINCTRL_GRP_UART0_5, 1405 PINCTRL_GRP_RESERVED, 1406 END_OF_GROUPS, 1407 }), 1408 }, 1409 [PINCTRL_PIN_24] = { 1410 .groups = &((uint16_t []) { 1411 PINCTRL_GRP_RESERVED, 1412 PINCTRL_GRP_NAND0_0, 1413 PINCTRL_GRP_SDIO0_0_CD, 1414 PINCTRL_GRP_TESTSCAN0_0, 1415 PINCTRL_GRP_CSU0_6, 1416 PINCTRL_GRP_GPIO0_24, 1417 PINCTRL_GRP_CAN1_6, 1418 PINCTRL_GRP_I2C1_6, 1419 PINCTRL_GRP_SWDT1_4_CLK, 1420 PINCTRL_GRP_RESERVED, 1421 PINCTRL_GRP_TTC3_3_CLK, 1422 PINCTRL_GRP_UART1_6, 1423 PINCTRL_GRP_RESERVED, 1424 END_OF_GROUPS, 1425 }), 1426 }, 1427 [PINCTRL_PIN_25] = { 1428 .groups = &((uint16_t []) { 1429 PINCTRL_GRP_RESERVED, 1430 PINCTRL_GRP_NAND0_0, 1431 PINCTRL_GRP_SDIO0_0_WP, 1432 PINCTRL_GRP_TESTSCAN0_0, 1433 PINCTRL_GRP_CSU0_7, 1434 PINCTRL_GRP_GPIO0_25, 1435 PINCTRL_GRP_CAN1_6, 1436 PINCTRL_GRP_I2C1_6, 1437 PINCTRL_GRP_SWDT1_4_RST, 1438 PINCTRL_GRP_RESERVED, 1439 PINCTRL_GRP_TTC3_3_WAV, 1440 PINCTRL_GRP_UART1_6, 1441 PINCTRL_GRP_RESERVED, 1442 END_OF_GROUPS, 1443 }), 1444 }, 1445 [PINCTRL_PIN_26] = { 1446 .groups = &((uint16_t []) { 1447 PINCTRL_GRP_ETHERNET0_0, 1448 PINCTRL_GRP_GEMTSU0_0, 1449 PINCTRL_GRP_NAND0_1_CE, 1450 PINCTRL_GRP_PMU0_0, 1451 PINCTRL_GRP_TESTSCAN0_0, 1452 PINCTRL_GRP_CSU0_8, 1453 PINCTRL_GRP_GPIO0_26, 1454 PINCTRL_GRP_CAN0_6, 1455 PINCTRL_GRP_I2C0_6, 1456 PINCTRL_GRP_PJTAG0_2, 1457 PINCTRL_GRP_SPI0_2, 1458 PINCTRL_GRP_TTC2_3_CLK, 1459 PINCTRL_GRP_UART0_6, 1460 PINCTRL_GRP_TRACE0_1, 1461 END_OF_GROUPS, 1462 }), 1463 }, 1464 [PINCTRL_PIN_27] = { 1465 .groups = &((uint16_t []) { 1466 PINCTRL_GRP_ETHERNET0_0, 1467 PINCTRL_GRP_NAND0_1_RB, 1468 PINCTRL_GRP_PMU0_1, 1469 PINCTRL_GRP_TESTSCAN0_0, 1470 PINCTRL_GRP_DPAUX0_0, 1471 PINCTRL_GRP_GPIO0_27, 1472 PINCTRL_GRP_CAN0_6, 1473 PINCTRL_GRP_I2C0_6, 1474 PINCTRL_GRP_PJTAG0_2, 1475 PINCTRL_GRP_SPI0_2_SS2, 1476 PINCTRL_GRP_TTC2_3_WAV, 1477 PINCTRL_GRP_UART0_6, 1478 PINCTRL_GRP_TRACE0_1, 1479 END_OF_GROUPS, 1480 }), 1481 }, 1482 [PINCTRL_PIN_28] = { 1483 .groups = &((uint16_t []) { 1484 PINCTRL_GRP_ETHERNET0_0, 1485 PINCTRL_GRP_NAND0_1_RB, 1486 PINCTRL_GRP_PMU0_2, 1487 PINCTRL_GRP_TESTSCAN0_0, 1488 PINCTRL_GRP_DPAUX0_0, 1489 PINCTRL_GRP_GPIO0_28, 1490 PINCTRL_GRP_CAN1_7, 1491 PINCTRL_GRP_I2C1_7, 1492 PINCTRL_GRP_PJTAG0_2, 1493 PINCTRL_GRP_SPI0_2_SS1, 1494 PINCTRL_GRP_TTC1_3_CLK, 1495 PINCTRL_GRP_UART1_7, 1496 PINCTRL_GRP_TRACE0_1, 1497 END_OF_GROUPS, 1498 }), 1499 }, 1500 [PINCTRL_PIN_29] = { 1501 .groups = &((uint16_t []) { 1502 PINCTRL_GRP_ETHERNET0_0, 1503 PINCTRL_GRP_PCIE0_0, 1504 PINCTRL_GRP_PMU0_3, 1505 PINCTRL_GRP_TESTSCAN0_0, 1506 PINCTRL_GRP_DPAUX0_1, 1507 PINCTRL_GRP_GPIO0_29, 1508 PINCTRL_GRP_CAN1_7, 1509 PINCTRL_GRP_I2C1_7, 1510 PINCTRL_GRP_PJTAG0_2, 1511 PINCTRL_GRP_SPI0_2_SS0, 1512 PINCTRL_GRP_TTC1_3_WAV, 1513 PINCTRL_GRP_UART1_7, 1514 PINCTRL_GRP_TRACE0_1, 1515 END_OF_GROUPS, 1516 }), 1517 }, 1518 [PINCTRL_PIN_30] = { 1519 .groups = &((uint16_t []) { 1520 PINCTRL_GRP_ETHERNET0_0, 1521 PINCTRL_GRP_PCIE0_1, 1522 PINCTRL_GRP_PMU0_4, 1523 PINCTRL_GRP_TESTSCAN0_0, 1524 PINCTRL_GRP_DPAUX0_1, 1525 PINCTRL_GRP_GPIO0_30, 1526 PINCTRL_GRP_CAN0_7, 1527 PINCTRL_GRP_I2C0_7, 1528 PINCTRL_GRP_SWDT0_4_CLK, 1529 PINCTRL_GRP_SPI0_2, 1530 PINCTRL_GRP_TTC0_3_CLK, 1531 PINCTRL_GRP_UART0_7, 1532 PINCTRL_GRP_TRACE0_1, 1533 END_OF_GROUPS, 1534 }), 1535 }, 1536 [PINCTRL_PIN_31] = { 1537 .groups = &((uint16_t []) { 1538 PINCTRL_GRP_ETHERNET0_0, 1539 PINCTRL_GRP_PCIE0_2, 1540 PINCTRL_GRP_PMU0_5, 1541 PINCTRL_GRP_TESTSCAN0_0, 1542 PINCTRL_GRP_CSU0_9, 1543 PINCTRL_GRP_GPIO0_31, 1544 PINCTRL_GRP_CAN0_7, 1545 PINCTRL_GRP_I2C0_7, 1546 PINCTRL_GRP_SWDT0_4_RST, 1547 PINCTRL_GRP_SPI0_2, 1548 PINCTRL_GRP_TTC0_3_WAV, 1549 PINCTRL_GRP_UART0_7, 1550 PINCTRL_GRP_TRACE0_1, 1551 END_OF_GROUPS, 1552 }), 1553 }, 1554 [PINCTRL_PIN_32] = { 1555 .groups = &((uint16_t []) { 1556 PINCTRL_GRP_ETHERNET0_0, 1557 PINCTRL_GRP_NAND0_1_DQS, 1558 PINCTRL_GRP_PMU0_6, 1559 PINCTRL_GRP_TESTSCAN0_0, 1560 PINCTRL_GRP_CSU0_10, 1561 PINCTRL_GRP_GPIO0_32, 1562 PINCTRL_GRP_CAN1_8, 1563 PINCTRL_GRP_I2C1_8, 1564 PINCTRL_GRP_SWDT1_5_CLK, 1565 PINCTRL_GRP_SPI1_2, 1566 PINCTRL_GRP_TTC3_4_CLK, 1567 PINCTRL_GRP_UART1_8, 1568 PINCTRL_GRP_TRACE0_1, 1569 END_OF_GROUPS, 1570 }), 1571 }, 1572 [PINCTRL_PIN_33] = { 1573 .groups = &((uint16_t []) { 1574 PINCTRL_GRP_ETHERNET0_0, 1575 PINCTRL_GRP_PCIE0_3, 1576 PINCTRL_GRP_PMU0_7, 1577 PINCTRL_GRP_TESTSCAN0_0, 1578 PINCTRL_GRP_CSU0_11, 1579 PINCTRL_GRP_GPIO0_33, 1580 PINCTRL_GRP_CAN1_8, 1581 PINCTRL_GRP_I2C1_8, 1582 PINCTRL_GRP_SWDT1_5_RST, 1583 PINCTRL_GRP_SPI1_2_SS2, 1584 PINCTRL_GRP_TTC3_4_WAV, 1585 PINCTRL_GRP_UART1_8, 1586 PINCTRL_GRP_TRACE0_1, 1587 END_OF_GROUPS, 1588 }), 1589 }, 1590 [PINCTRL_PIN_34] = { 1591 .groups = &((uint16_t []) { 1592 PINCTRL_GRP_ETHERNET0_0, 1593 PINCTRL_GRP_PCIE0_4, 1594 PINCTRL_GRP_PMU0_8, 1595 PINCTRL_GRP_TESTSCAN0_0, 1596 PINCTRL_GRP_DPAUX0_2, 1597 PINCTRL_GRP_GPIO0_34, 1598 PINCTRL_GRP_CAN0_8, 1599 PINCTRL_GRP_I2C0_8, 1600 PINCTRL_GRP_SWDT0_5_CLK, 1601 PINCTRL_GRP_SPI1_2_SS1, 1602 PINCTRL_GRP_TTC2_4_CLK, 1603 PINCTRL_GRP_UART0_8, 1604 PINCTRL_GRP_TRACE0_1, 1605 END_OF_GROUPS, 1606 }), 1607 }, 1608 [PINCTRL_PIN_35] = { 1609 .groups = &((uint16_t []) { 1610 PINCTRL_GRP_ETHERNET0_0, 1611 PINCTRL_GRP_PCIE0_5, 1612 PINCTRL_GRP_PMU0_9, 1613 PINCTRL_GRP_TESTSCAN0_0, 1614 PINCTRL_GRP_DPAUX0_2, 1615 PINCTRL_GRP_GPIO0_35, 1616 PINCTRL_GRP_CAN0_8, 1617 PINCTRL_GRP_I2C0_8, 1618 PINCTRL_GRP_SWDT0_5_RST, 1619 PINCTRL_GRP_SPI1_2_SS0, 1620 PINCTRL_GRP_TTC2_4_WAV, 1621 PINCTRL_GRP_UART0_8, 1622 PINCTRL_GRP_TRACE0_1, 1623 END_OF_GROUPS, 1624 }), 1625 }, 1626 [PINCTRL_PIN_36] = { 1627 .groups = &((uint16_t []) { 1628 PINCTRL_GRP_ETHERNET0_0, 1629 PINCTRL_GRP_PCIE0_6, 1630 PINCTRL_GRP_PMU0_10, 1631 PINCTRL_GRP_TESTSCAN0_0, 1632 PINCTRL_GRP_DPAUX0_3, 1633 PINCTRL_GRP_GPIO0_36, 1634 PINCTRL_GRP_CAN1_9, 1635 PINCTRL_GRP_I2C1_9, 1636 PINCTRL_GRP_SWDT1_6_CLK, 1637 PINCTRL_GRP_SPI1_2, 1638 PINCTRL_GRP_TTC1_4_CLK, 1639 PINCTRL_GRP_UART1_9, 1640 PINCTRL_GRP_TRACE0_1, 1641 END_OF_GROUPS, 1642 }), 1643 }, 1644 [PINCTRL_PIN_37] = { 1645 .groups = &((uint16_t []) { 1646 PINCTRL_GRP_ETHERNET0_0, 1647 PINCTRL_GRP_PCIE0_7, 1648 PINCTRL_GRP_PMU0_11, 1649 PINCTRL_GRP_TESTSCAN0_0, 1650 PINCTRL_GRP_DPAUX0_3, 1651 PINCTRL_GRP_GPIO0_37, 1652 PINCTRL_GRP_CAN1_9, 1653 PINCTRL_GRP_I2C1_9, 1654 PINCTRL_GRP_SWDT1_6_RST, 1655 PINCTRL_GRP_SPI1_2, 1656 PINCTRL_GRP_TTC1_4_WAV, 1657 PINCTRL_GRP_UART1_9, 1658 PINCTRL_GRP_TRACE0_1, 1659 END_OF_GROUPS, 1660 }), 1661 }, 1662 [PINCTRL_PIN_38] = { 1663 .groups = &((uint16_t []) { 1664 PINCTRL_GRP_ETHERNET1_0, 1665 PINCTRL_GRP_RESERVED, 1666 PINCTRL_GRP_SDIO0_1, 1667 PINCTRL_GRP_RESERVED, 1668 PINCTRL_GRP_RESERVED, 1669 PINCTRL_GRP_GPIO0_38, 1670 PINCTRL_GRP_CAN0_9, 1671 PINCTRL_GRP_I2C0_9, 1672 PINCTRL_GRP_PJTAG0_3, 1673 PINCTRL_GRP_SPI0_3, 1674 PINCTRL_GRP_TTC0_4_CLK, 1675 PINCTRL_GRP_UART0_9, 1676 PINCTRL_GRP_TRACE0_1_CLK, 1677 PINCTRL_GRP_SDIO0_4BIT_1_0, 1678 PINCTRL_GRP_SDIO0_4BIT_1_1, 1679 PINCTRL_GRP_SDIO0_1BIT_1_0, 1680 PINCTRL_GRP_SDIO0_1BIT_1_1, 1681 PINCTRL_GRP_SDIO0_1BIT_1_2, 1682 PINCTRL_GRP_SDIO0_1BIT_1_3, 1683 PINCTRL_GRP_SDIO0_1BIT_1_4, 1684 PINCTRL_GRP_SDIO0_1BIT_1_5, 1685 PINCTRL_GRP_SDIO0_1BIT_1_6, 1686 PINCTRL_GRP_SDIO0_1BIT_1_7, 1687 END_OF_GROUPS, 1688 }), 1689 }, 1690 [PINCTRL_PIN_39] = { 1691 .groups = &((uint16_t []) { 1692 PINCTRL_GRP_ETHERNET1_0, 1693 PINCTRL_GRP_RESERVED, 1694 PINCTRL_GRP_SDIO0_1_CD, 1695 PINCTRL_GRP_SDIO1_0, 1696 PINCTRL_GRP_RESERVED, 1697 PINCTRL_GRP_GPIO0_39, 1698 PINCTRL_GRP_CAN0_9, 1699 PINCTRL_GRP_I2C0_9, 1700 PINCTRL_GRP_PJTAG0_3, 1701 PINCTRL_GRP_SPI0_3_SS2, 1702 PINCTRL_GRP_TTC0_4_WAV, 1703 PINCTRL_GRP_UART0_9, 1704 PINCTRL_GRP_TRACE0_1_CLK, 1705 PINCTRL_GRP_SDIO1_4BIT_0_0, 1706 PINCTRL_GRP_SDIO1_1BIT_0_0, 1707 END_OF_GROUPS, 1708 }), 1709 }, 1710 [PINCTRL_PIN_40] = { 1711 .groups = &((uint16_t []) { 1712 PINCTRL_GRP_ETHERNET1_0, 1713 PINCTRL_GRP_RESERVED, 1714 PINCTRL_GRP_SDIO0_1, 1715 PINCTRL_GRP_SDIO1_0, 1716 PINCTRL_GRP_RESERVED, 1717 PINCTRL_GRP_GPIO0_40, 1718 PINCTRL_GRP_CAN1_10, 1719 PINCTRL_GRP_I2C1_10, 1720 PINCTRL_GRP_PJTAG0_3, 1721 PINCTRL_GRP_SPI0_3_SS1, 1722 PINCTRL_GRP_TTC3_5_CLK, 1723 PINCTRL_GRP_UART1_10, 1724 PINCTRL_GRP_TRACE0_1, 1725 PINCTRL_GRP_SDIO0_4BIT_1_0, 1726 PINCTRL_GRP_SDIO0_4BIT_1_1, 1727 PINCTRL_GRP_SDIO0_1BIT_1_0, 1728 PINCTRL_GRP_SDIO0_1BIT_1_1, 1729 PINCTRL_GRP_SDIO0_1BIT_1_2, 1730 PINCTRL_GRP_SDIO0_1BIT_1_3, 1731 PINCTRL_GRP_SDIO0_1BIT_1_4, 1732 PINCTRL_GRP_SDIO0_1BIT_1_5, 1733 PINCTRL_GRP_SDIO0_1BIT_1_6, 1734 PINCTRL_GRP_SDIO0_1BIT_1_7, 1735 PINCTRL_GRP_SDIO1_4BIT_0_0, 1736 PINCTRL_GRP_SDIO1_1BIT_0_1, 1737 END_OF_GROUPS, 1738 }), 1739 }, 1740 [PINCTRL_PIN_41] = { 1741 .groups = &((uint16_t []) { 1742 PINCTRL_GRP_ETHERNET1_0, 1743 PINCTRL_GRP_RESERVED, 1744 PINCTRL_GRP_SDIO0_1, 1745 PINCTRL_GRP_SDIO1_0, 1746 PINCTRL_GRP_RESERVED, 1747 PINCTRL_GRP_GPIO0_41, 1748 PINCTRL_GRP_CAN1_10, 1749 PINCTRL_GRP_I2C1_10, 1750 PINCTRL_GRP_PJTAG0_3, 1751 PINCTRL_GRP_SPI0_3_SS0, 1752 PINCTRL_GRP_TTC3_5_WAV, 1753 PINCTRL_GRP_UART1_10, 1754 PINCTRL_GRP_TRACE0_1, 1755 PINCTRL_GRP_SDIO0_4BIT_1_0, 1756 PINCTRL_GRP_SDIO0_1BIT_1_0, 1757 PINCTRL_GRP_SDIO1_4BIT_0_0, 1758 PINCTRL_GRP_SDIO1_1BIT_0_2, 1759 END_OF_GROUPS, 1760 }), 1761 }, 1762 [PINCTRL_PIN_42] = { 1763 .groups = &((uint16_t []) { 1764 PINCTRL_GRP_ETHERNET1_0, 1765 PINCTRL_GRP_RESERVED, 1766 PINCTRL_GRP_SDIO0_1, 1767 PINCTRL_GRP_SDIO1_0, 1768 PINCTRL_GRP_RESERVED, 1769 PINCTRL_GRP_GPIO0_42, 1770 PINCTRL_GRP_CAN0_10, 1771 PINCTRL_GRP_I2C0_10, 1772 PINCTRL_GRP_SWDT0_6_CLK, 1773 PINCTRL_GRP_SPI0_3, 1774 PINCTRL_GRP_TTC2_5_CLK, 1775 PINCTRL_GRP_UART0_10, 1776 PINCTRL_GRP_TRACE0_1, 1777 PINCTRL_GRP_SDIO0_1, 1778 PINCTRL_GRP_SDIO0_4BIT_1_0, 1779 PINCTRL_GRP_SDIO0_1BIT_1_1, 1780 PINCTRL_GRP_SDIO1_4BIT_0_0, 1781 PINCTRL_GRP_SDIO1_1BIT_0_3, 1782 END_OF_GROUPS, 1783 }), 1784 }, 1785 [PINCTRL_PIN_43] = { 1786 .groups = &((uint16_t []) { 1787 PINCTRL_GRP_ETHERNET1_0, 1788 PINCTRL_GRP_RESERVED, 1789 PINCTRL_GRP_SDIO0_1, 1790 PINCTRL_GRP_SDIO1_0_PC, 1791 PINCTRL_GRP_RESERVED, 1792 PINCTRL_GRP_GPIO0_43, 1793 PINCTRL_GRP_CAN0_10, 1794 PINCTRL_GRP_I2C0_10, 1795 PINCTRL_GRP_SWDT0_6_RST, 1796 PINCTRL_GRP_SPI0_3, 1797 PINCTRL_GRP_TTC2_5_WAV, 1798 PINCTRL_GRP_UART0_10, 1799 PINCTRL_GRP_TRACE0_1, 1800 PINCTRL_GRP_SDIO0_4BIT_1_0, 1801 PINCTRL_GRP_SDIO0_1BIT_1_2, 1802 END_OF_GROUPS, 1803 }), 1804 }, 1805 [PINCTRL_PIN_44] = { 1806 .groups = &((uint16_t []) { 1807 PINCTRL_GRP_ETHERNET1_0, 1808 PINCTRL_GRP_RESERVED, 1809 PINCTRL_GRP_SDIO0_1, 1810 PINCTRL_GRP_SDIO1_0_WP, 1811 PINCTRL_GRP_RESERVED, 1812 PINCTRL_GRP_GPIO0_44, 1813 PINCTRL_GRP_CAN1_11, 1814 PINCTRL_GRP_I2C1_11, 1815 PINCTRL_GRP_SWDT1_7_CLK, 1816 PINCTRL_GRP_SPI1_3, 1817 PINCTRL_GRP_TTC1_5_CLK, 1818 PINCTRL_GRP_UART1_11, 1819 PINCTRL_GRP_RESERVED, 1820 PINCTRL_GRP_SDIO0_4BIT_1_0, 1821 PINCTRL_GRP_SDIO0_1BIT_1_3, 1822 END_OF_GROUPS, 1823 }), 1824 }, 1825 [PINCTRL_PIN_45] = { 1826 .groups = &((uint16_t []) { 1827 PINCTRL_GRP_ETHERNET1_0, 1828 PINCTRL_GRP_RESERVED, 1829 PINCTRL_GRP_SDIO0_1, 1830 PINCTRL_GRP_SDIO1_0_CD, 1831 PINCTRL_GRP_RESERVED, 1832 PINCTRL_GRP_GPIO0_45, 1833 PINCTRL_GRP_CAN1_11, 1834 PINCTRL_GRP_I2C1_11, 1835 PINCTRL_GRP_SWDT1_7_RST, 1836 PINCTRL_GRP_SPI1_3_SS2, 1837 PINCTRL_GRP_TTC1_5_WAV, 1838 PINCTRL_GRP_UART1_11, 1839 PINCTRL_GRP_RESERVED, 1840 PINCTRL_GRP_SDIO0_4BIT_1_1, 1841 PINCTRL_GRP_SDIO0_1BIT_1_4, 1842 END_OF_GROUPS, 1843 }), 1844 }, 1845 [PINCTRL_PIN_46] = { 1846 .groups = &((uint16_t []) { 1847 PINCTRL_GRP_ETHERNET1_0, 1848 PINCTRL_GRP_RESERVED, 1849 PINCTRL_GRP_SDIO0_1, 1850 PINCTRL_GRP_SDIO1_0, 1851 PINCTRL_GRP_RESERVED, 1852 PINCTRL_GRP_GPIO0_46, 1853 PINCTRL_GRP_CAN0_11, 1854 PINCTRL_GRP_I2C0_11, 1855 PINCTRL_GRP_SWDT0_7_CLK, 1856 PINCTRL_GRP_SPI1_3_SS1, 1857 PINCTRL_GRP_TTC0_5_CLK, 1858 PINCTRL_GRP_UART0_11, 1859 PINCTRL_GRP_RESERVED, 1860 PINCTRL_GRP_SDIO0_4BIT_1_1, 1861 PINCTRL_GRP_SDIO0_1BIT_1_5, 1862 PINCTRL_GRP_SDIO1_4BIT_0_1, 1863 PINCTRL_GRP_SDIO1_1BIT_0_4, 1864 END_OF_GROUPS, 1865 }), 1866 }, 1867 [PINCTRL_PIN_47] = { 1868 .groups = &((uint16_t []) { 1869 PINCTRL_GRP_ETHERNET1_0, 1870 PINCTRL_GRP_RESERVED, 1871 PINCTRL_GRP_SDIO0_1, 1872 PINCTRL_GRP_SDIO1_0, 1873 PINCTRL_GRP_RESERVED, 1874 PINCTRL_GRP_GPIO0_47, 1875 PINCTRL_GRP_CAN0_11, 1876 PINCTRL_GRP_I2C0_11, 1877 PINCTRL_GRP_SWDT0_7_RST, 1878 PINCTRL_GRP_SPI1_3_SS0, 1879 PINCTRL_GRP_TTC0_5_WAV, 1880 PINCTRL_GRP_UART0_11, 1881 PINCTRL_GRP_RESERVED, 1882 PINCTRL_GRP_SDIO0_4BIT_1_1, 1883 PINCTRL_GRP_SDIO0_1BIT_1_6, 1884 PINCTRL_GRP_SDIO1_4BIT_0_1, 1885 PINCTRL_GRP_SDIO1_1BIT_0_5, 1886 END_OF_GROUPS, 1887 }), 1888 }, 1889 [PINCTRL_PIN_48] = { 1890 .groups = &((uint16_t []) { 1891 PINCTRL_GRP_ETHERNET1_0, 1892 PINCTRL_GRP_RESERVED, 1893 PINCTRL_GRP_SDIO0_1, 1894 PINCTRL_GRP_SDIO1_0, 1895 PINCTRL_GRP_RESERVED, 1896 PINCTRL_GRP_GPIO0_48, 1897 PINCTRL_GRP_CAN1_12, 1898 PINCTRL_GRP_I2C1_12, 1899 PINCTRL_GRP_SWDT1_8_CLK, 1900 PINCTRL_GRP_SPI1_3, 1901 PINCTRL_GRP_TTC3_6_CLK, 1902 PINCTRL_GRP_UART1_12, 1903 PINCTRL_GRP_RESERVED, 1904 PINCTRL_GRP_SDIO0_4BIT_1_1, 1905 PINCTRL_GRP_SDIO0_1BIT_1_7, 1906 PINCTRL_GRP_SDIO1_4BIT_0_1, 1907 PINCTRL_GRP_SDIO1_1BIT_0_6, 1908 END_OF_GROUPS, 1909 }), 1910 }, 1911 [PINCTRL_PIN_49] = { 1912 .groups = &((uint16_t []) { 1913 PINCTRL_GRP_ETHERNET1_0, 1914 PINCTRL_GRP_RESERVED, 1915 PINCTRL_GRP_SDIO0_1_PC, 1916 PINCTRL_GRP_SDIO1_0, 1917 PINCTRL_GRP_RESERVED, 1918 PINCTRL_GRP_GPIO0_49, 1919 PINCTRL_GRP_CAN1_12, 1920 PINCTRL_GRP_I2C1_12, 1921 PINCTRL_GRP_SWDT1_8_RST, 1922 PINCTRL_GRP_SPI1_3, 1923 PINCTRL_GRP_TTC3_6_WAV, 1924 PINCTRL_GRP_UART1_12, 1925 PINCTRL_GRP_RESERVED, 1926 PINCTRL_GRP_SDIO1_4BIT_0_1, 1927 PINCTRL_GRP_SDIO1_1BIT_0_7, 1928 END_OF_GROUPS, 1929 }), 1930 }, 1931 [PINCTRL_PIN_50] = { 1932 .groups = &((uint16_t []) { 1933 PINCTRL_GRP_GEMTSU0_1, 1934 PINCTRL_GRP_RESERVED, 1935 PINCTRL_GRP_SDIO0_1_WP, 1936 PINCTRL_GRP_SDIO1_0, 1937 PINCTRL_GRP_RESERVED, 1938 PINCTRL_GRP_GPIO0_50, 1939 PINCTRL_GRP_CAN0_12, 1940 PINCTRL_GRP_I2C0_12, 1941 PINCTRL_GRP_SWDT0_8_CLK, 1942 PINCTRL_GRP_MDIO1_0, 1943 PINCTRL_GRP_TTC2_6_CLK, 1944 PINCTRL_GRP_UART0_12, 1945 PINCTRL_GRP_RESERVED, 1946 PINCTRL_GRP_SDIO1_4BIT_0_0, 1947 PINCTRL_GRP_SDIO1_4BIT_0_1, 1948 PINCTRL_GRP_SDIO1_1BIT_0_0, 1949 PINCTRL_GRP_SDIO1_1BIT_0_1, 1950 PINCTRL_GRP_SDIO1_1BIT_0_2, 1951 PINCTRL_GRP_SDIO1_1BIT_0_3, 1952 PINCTRL_GRP_SDIO1_1BIT_0_4, 1953 PINCTRL_GRP_SDIO1_1BIT_0_5, 1954 PINCTRL_GRP_SDIO1_1BIT_0_6, 1955 PINCTRL_GRP_SDIO1_1BIT_0_7, 1956 END_OF_GROUPS, 1957 }), 1958 }, 1959 [PINCTRL_PIN_51] = { 1960 .groups = &((uint16_t []) { 1961 PINCTRL_GRP_GEMTSU0_2, 1962 PINCTRL_GRP_RESERVED, 1963 PINCTRL_GRP_RESERVED, 1964 PINCTRL_GRP_SDIO1_0, 1965 PINCTRL_GRP_RESERVED, 1966 PINCTRL_GRP_GPIO0_51, 1967 PINCTRL_GRP_CAN0_12, 1968 PINCTRL_GRP_I2C0_12, 1969 PINCTRL_GRP_SWDT0_8_RST, 1970 PINCTRL_GRP_MDIO1_0, 1971 PINCTRL_GRP_TTC2_6_WAV, 1972 PINCTRL_GRP_UART0_12, 1973 PINCTRL_GRP_RESERVED, 1974 PINCTRL_GRP_SDIO1_4BIT_0_0, 1975 PINCTRL_GRP_SDIO1_4BIT_0_1, 1976 PINCTRL_GRP_SDIO1_1BIT_0_0, 1977 PINCTRL_GRP_SDIO1_1BIT_0_1, 1978 PINCTRL_GRP_SDIO1_1BIT_0_2, 1979 PINCTRL_GRP_SDIO1_1BIT_0_3, 1980 PINCTRL_GRP_SDIO1_1BIT_0_4, 1981 PINCTRL_GRP_SDIO1_1BIT_0_5, 1982 PINCTRL_GRP_SDIO1_1BIT_0_6, 1983 PINCTRL_GRP_SDIO1_1BIT_0_7, 1984 END_OF_GROUPS, 1985 }), 1986 }, 1987 [PINCTRL_PIN_52] = { 1988 .groups = &((uint16_t []) { 1989 PINCTRL_GRP_ETHERNET2_0, 1990 PINCTRL_GRP_USB0_0, 1991 PINCTRL_GRP_RESERVED, 1992 PINCTRL_GRP_RESERVED, 1993 PINCTRL_GRP_RESERVED, 1994 PINCTRL_GRP_GPIO0_52, 1995 PINCTRL_GRP_CAN1_13, 1996 PINCTRL_GRP_I2C1_13, 1997 PINCTRL_GRP_PJTAG0_4, 1998 PINCTRL_GRP_SPI0_4, 1999 PINCTRL_GRP_TTC1_6_CLK, 2000 PINCTRL_GRP_UART1_13, 2001 PINCTRL_GRP_TRACE0_2_CLK, 2002 END_OF_GROUPS, 2003 }), 2004 }, 2005 [PINCTRL_PIN_53] = { 2006 .groups = &((uint16_t []) { 2007 PINCTRL_GRP_ETHERNET2_0, 2008 PINCTRL_GRP_USB0_0, 2009 PINCTRL_GRP_RESERVED, 2010 PINCTRL_GRP_RESERVED, 2011 PINCTRL_GRP_RESERVED, 2012 PINCTRL_GRP_GPIO0_53, 2013 PINCTRL_GRP_CAN1_13, 2014 PINCTRL_GRP_I2C1_13, 2015 PINCTRL_GRP_PJTAG0_4, 2016 PINCTRL_GRP_SPI0_4_SS2, 2017 PINCTRL_GRP_TTC1_6_WAV, 2018 PINCTRL_GRP_UART1_13, 2019 PINCTRL_GRP_TRACE0_2_CLK, 2020 END_OF_GROUPS, 2021 }), 2022 }, 2023 [PINCTRL_PIN_54] = { 2024 .groups = &((uint16_t []) { 2025 PINCTRL_GRP_ETHERNET2_0, 2026 PINCTRL_GRP_USB0_0, 2027 PINCTRL_GRP_RESERVED, 2028 PINCTRL_GRP_RESERVED, 2029 PINCTRL_GRP_RESERVED, 2030 PINCTRL_GRP_GPIO0_54, 2031 PINCTRL_GRP_CAN0_13, 2032 PINCTRL_GRP_I2C0_13, 2033 PINCTRL_GRP_PJTAG0_4, 2034 PINCTRL_GRP_SPI0_4_SS1, 2035 PINCTRL_GRP_TTC0_6_CLK, 2036 PINCTRL_GRP_UART0_13, 2037 PINCTRL_GRP_TRACE0_2, 2038 END_OF_GROUPS, 2039 }), 2040 }, 2041 [PINCTRL_PIN_55] = { 2042 .groups = &((uint16_t []) { 2043 PINCTRL_GRP_ETHERNET2_0, 2044 PINCTRL_GRP_USB0_0, 2045 PINCTRL_GRP_RESERVED, 2046 PINCTRL_GRP_RESERVED, 2047 PINCTRL_GRP_RESERVED, 2048 PINCTRL_GRP_GPIO0_55, 2049 PINCTRL_GRP_CAN0_13, 2050 PINCTRL_GRP_I2C0_13, 2051 PINCTRL_GRP_PJTAG0_4, 2052 PINCTRL_GRP_SPI0_4_SS0, 2053 PINCTRL_GRP_TTC0_6_WAV, 2054 PINCTRL_GRP_UART0_13, 2055 PINCTRL_GRP_TRACE0_2, 2056 END_OF_GROUPS, 2057 }), 2058 }, 2059 [PINCTRL_PIN_56] = { 2060 .groups = &((uint16_t []) { 2061 PINCTRL_GRP_ETHERNET2_0, 2062 PINCTRL_GRP_USB0_0, 2063 PINCTRL_GRP_RESERVED, 2064 PINCTRL_GRP_RESERVED, 2065 PINCTRL_GRP_RESERVED, 2066 PINCTRL_GRP_GPIO0_56, 2067 PINCTRL_GRP_CAN1_14, 2068 PINCTRL_GRP_I2C1_14, 2069 PINCTRL_GRP_SWDT1_9_CLK, 2070 PINCTRL_GRP_SPI0_4, 2071 PINCTRL_GRP_TTC3_7_CLK, 2072 PINCTRL_GRP_UART1_14, 2073 PINCTRL_GRP_TRACE0_2, 2074 END_OF_GROUPS, 2075 }), 2076 }, 2077 [PINCTRL_PIN_57] = { 2078 .groups = &((uint16_t []) { 2079 PINCTRL_GRP_ETHERNET2_0, 2080 PINCTRL_GRP_USB0_0, 2081 PINCTRL_GRP_RESERVED, 2082 PINCTRL_GRP_RESERVED, 2083 PINCTRL_GRP_RESERVED, 2084 PINCTRL_GRP_GPIO0_57, 2085 PINCTRL_GRP_CAN1_14, 2086 PINCTRL_GRP_I2C1_14, 2087 PINCTRL_GRP_SWDT1_9_RST, 2088 PINCTRL_GRP_SPI0_4, 2089 PINCTRL_GRP_TTC3_7_WAV, 2090 PINCTRL_GRP_UART1_14, 2091 PINCTRL_GRP_TRACE0_2, 2092 END_OF_GROUPS, 2093 }), 2094 }, 2095 [PINCTRL_PIN_58] = { 2096 .groups = &((uint16_t []) { 2097 PINCTRL_GRP_ETHERNET2_0, 2098 PINCTRL_GRP_USB0_0, 2099 PINCTRL_GRP_RESERVED, 2100 PINCTRL_GRP_RESERVED, 2101 PINCTRL_GRP_RESERVED, 2102 PINCTRL_GRP_GPIO0_58, 2103 PINCTRL_GRP_CAN0_14, 2104 PINCTRL_GRP_I2C0_14, 2105 PINCTRL_GRP_PJTAG0_5, 2106 PINCTRL_GRP_SPI1_4, 2107 PINCTRL_GRP_TTC2_7_CLK, 2108 PINCTRL_GRP_UART0_14, 2109 PINCTRL_GRP_TRACE0_2, 2110 END_OF_GROUPS, 2111 }), 2112 }, 2113 [PINCTRL_PIN_59] = { 2114 .groups = &((uint16_t []) { 2115 PINCTRL_GRP_ETHERNET2_0, 2116 PINCTRL_GRP_USB0_0, 2117 PINCTRL_GRP_RESERVED, 2118 PINCTRL_GRP_RESERVED, 2119 PINCTRL_GRP_RESERVED, 2120 PINCTRL_GRP_GPIO0_59, 2121 PINCTRL_GRP_CAN0_14, 2122 PINCTRL_GRP_I2C0_14, 2123 PINCTRL_GRP_PJTAG0_5, 2124 PINCTRL_GRP_SPI1_4_SS2, 2125 PINCTRL_GRP_TTC2_7_WAV, 2126 PINCTRL_GRP_UART0_14, 2127 PINCTRL_GRP_TRACE0_2, 2128 END_OF_GROUPS, 2129 }), 2130 }, 2131 [PINCTRL_PIN_60] = { 2132 .groups = &((uint16_t []) { 2133 PINCTRL_GRP_ETHERNET2_0, 2134 PINCTRL_GRP_USB0_0, 2135 PINCTRL_GRP_RESERVED, 2136 PINCTRL_GRP_RESERVED, 2137 PINCTRL_GRP_RESERVED, 2138 PINCTRL_GRP_GPIO0_60, 2139 PINCTRL_GRP_CAN1_15, 2140 PINCTRL_GRP_I2C1_15, 2141 PINCTRL_GRP_PJTAG0_5, 2142 PINCTRL_GRP_SPI1_4_SS1, 2143 PINCTRL_GRP_TTC1_7_CLK, 2144 PINCTRL_GRP_UART1_15, 2145 PINCTRL_GRP_TRACE0_2, 2146 END_OF_GROUPS, 2147 }), 2148 }, 2149 [PINCTRL_PIN_61] = { 2150 .groups = &((uint16_t []) { 2151 PINCTRL_GRP_ETHERNET2_0, 2152 PINCTRL_GRP_USB0_0, 2153 PINCTRL_GRP_RESERVED, 2154 PINCTRL_GRP_RESERVED, 2155 PINCTRL_GRP_RESERVED, 2156 PINCTRL_GRP_GPIO0_61, 2157 PINCTRL_GRP_CAN1_15, 2158 PINCTRL_GRP_I2C1_15, 2159 PINCTRL_GRP_PJTAG0_5, 2160 PINCTRL_GRP_SPI1_4_SS0, 2161 PINCTRL_GRP_TTC1_7_WAV, 2162 PINCTRL_GRP_UART1_15, 2163 PINCTRL_GRP_TRACE0_2, 2164 END_OF_GROUPS, 2165 }), 2166 }, 2167 [PINCTRL_PIN_62] = { 2168 .groups = &((uint16_t []) { 2169 PINCTRL_GRP_ETHERNET2_0, 2170 PINCTRL_GRP_USB0_0, 2171 PINCTRL_GRP_RESERVED, 2172 PINCTRL_GRP_RESERVED, 2173 PINCTRL_GRP_RESERVED, 2174 PINCTRL_GRP_GPIO0_62, 2175 PINCTRL_GRP_CAN0_15, 2176 PINCTRL_GRP_I2C0_15, 2177 PINCTRL_GRP_SWDT0_9_CLK, 2178 PINCTRL_GRP_SPI1_4, 2179 PINCTRL_GRP_TTC0_7_CLK, 2180 PINCTRL_GRP_UART0_15, 2181 PINCTRL_GRP_TRACE0_2, 2182 END_OF_GROUPS, 2183 }), 2184 }, 2185 [PINCTRL_PIN_63] = { 2186 .groups = &((uint16_t []) { 2187 PINCTRL_GRP_ETHERNET2_0, 2188 PINCTRL_GRP_USB0_0, 2189 PINCTRL_GRP_RESERVED, 2190 PINCTRL_GRP_RESERVED, 2191 PINCTRL_GRP_RESERVED, 2192 PINCTRL_GRP_GPIO0_63, 2193 PINCTRL_GRP_CAN0_15, 2194 PINCTRL_GRP_I2C0_15, 2195 PINCTRL_GRP_SWDT0_9_RST, 2196 PINCTRL_GRP_SPI1_4, 2197 PINCTRL_GRP_TTC0_7_WAV, 2198 PINCTRL_GRP_UART0_15, 2199 PINCTRL_GRP_TRACE0_2, 2200 END_OF_GROUPS, 2201 }), 2202 }, 2203 [PINCTRL_PIN_64] = { 2204 .groups = &((uint16_t []) { 2205 PINCTRL_GRP_ETHERNET3_0, 2206 PINCTRL_GRP_USB1_0, 2207 PINCTRL_GRP_SDIO0_2, 2208 PINCTRL_GRP_RESERVED, 2209 PINCTRL_GRP_RESERVED, 2210 PINCTRL_GRP_GPIO0_64, 2211 PINCTRL_GRP_CAN1_16, 2212 PINCTRL_GRP_I2C1_16, 2213 PINCTRL_GRP_SWDT1_10_CLK, 2214 PINCTRL_GRP_SPI0_5, 2215 PINCTRL_GRP_TTC3_8_CLK, 2216 PINCTRL_GRP_UART1_16, 2217 PINCTRL_GRP_TRACE0_2, 2218 PINCTRL_GRP_SDIO0_4BIT_2_0, 2219 PINCTRL_GRP_SDIO0_4BIT_2_1, 2220 PINCTRL_GRP_SDIO0_1BIT_2_0, 2221 PINCTRL_GRP_SDIO0_1BIT_2_1, 2222 PINCTRL_GRP_SDIO0_1BIT_2_2, 2223 PINCTRL_GRP_SDIO0_1BIT_2_3, 2224 PINCTRL_GRP_SDIO0_1BIT_2_4, 2225 PINCTRL_GRP_SDIO0_1BIT_2_5, 2226 PINCTRL_GRP_SDIO0_1BIT_2_6, 2227 PINCTRL_GRP_SDIO0_1BIT_2_7, 2228 END_OF_GROUPS, 2229 }), 2230 }, 2231 [PINCTRL_PIN_65] = { 2232 .groups = &((uint16_t []) { 2233 PINCTRL_GRP_ETHERNET3_0, 2234 PINCTRL_GRP_USB1_0, 2235 PINCTRL_GRP_SDIO0_2_CD, 2236 PINCTRL_GRP_RESERVED, 2237 PINCTRL_GRP_RESERVED, 2238 PINCTRL_GRP_GPIO0_65, 2239 PINCTRL_GRP_CAN1_16, 2240 PINCTRL_GRP_I2C1_16, 2241 PINCTRL_GRP_SWDT1_10_RST, 2242 PINCTRL_GRP_SPI0_5_SS2, 2243 PINCTRL_GRP_TTC3_8_WAV, 2244 PINCTRL_GRP_UART1_16, 2245 PINCTRL_GRP_TRACE0_2, 2246 END_OF_GROUPS, 2247 }), 2248 }, 2249 [PINCTRL_PIN_66] = { 2250 .groups = &((uint16_t []) { 2251 PINCTRL_GRP_ETHERNET3_0, 2252 PINCTRL_GRP_USB1_0, 2253 PINCTRL_GRP_SDIO0_2, 2254 PINCTRL_GRP_RESERVED, 2255 PINCTRL_GRP_RESERVED, 2256 PINCTRL_GRP_GPIO0_66, 2257 PINCTRL_GRP_CAN0_16, 2258 PINCTRL_GRP_I2C0_16, 2259 PINCTRL_GRP_SWDT0_10_CLK, 2260 PINCTRL_GRP_SPI0_5_SS1, 2261 PINCTRL_GRP_TTC2_8_CLK, 2262 PINCTRL_GRP_UART0_16, 2263 PINCTRL_GRP_TRACE0_2, 2264 PINCTRL_GRP_SDIO0_4BIT_2_0, 2265 PINCTRL_GRP_SDIO0_4BIT_2_1, 2266 PINCTRL_GRP_SDIO0_1BIT_2_0, 2267 PINCTRL_GRP_SDIO0_1BIT_2_1, 2268 PINCTRL_GRP_SDIO0_1BIT_2_2, 2269 PINCTRL_GRP_SDIO0_1BIT_2_3, 2270 PINCTRL_GRP_SDIO0_1BIT_2_4, 2271 PINCTRL_GRP_SDIO0_1BIT_2_5, 2272 PINCTRL_GRP_SDIO0_1BIT_2_6, 2273 PINCTRL_GRP_SDIO0_1BIT_2_7, 2274 END_OF_GROUPS, 2275 }), 2276 }, 2277 [PINCTRL_PIN_67] = { 2278 .groups = &((uint16_t []) { 2279 PINCTRL_GRP_ETHERNET3_0, 2280 PINCTRL_GRP_USB1_0, 2281 PINCTRL_GRP_SDIO0_2, 2282 PINCTRL_GRP_RESERVED, 2283 PINCTRL_GRP_RESERVED, 2284 PINCTRL_GRP_GPIO0_67, 2285 PINCTRL_GRP_CAN0_16, 2286 PINCTRL_GRP_I2C0_16, 2287 PINCTRL_GRP_SWDT0_10_RST, 2288 PINCTRL_GRP_SPI0_5_SS0, 2289 PINCTRL_GRP_TTC2_8_WAV, 2290 PINCTRL_GRP_UART0_16, 2291 PINCTRL_GRP_TRACE0_2, 2292 PINCTRL_GRP_SDIO0_4BIT_2_0, 2293 PINCTRL_GRP_SDIO0_1BIT_2_0, 2294 END_OF_GROUPS, 2295 }), 2296 }, 2297 [PINCTRL_PIN_68] = { 2298 .groups = &((uint16_t []) { 2299 PINCTRL_GRP_ETHERNET3_0, 2300 PINCTRL_GRP_USB1_0, 2301 PINCTRL_GRP_SDIO0_2, 2302 PINCTRL_GRP_RESERVED, 2303 PINCTRL_GRP_RESERVED, 2304 PINCTRL_GRP_GPIO0_68, 2305 PINCTRL_GRP_CAN1_17, 2306 PINCTRL_GRP_I2C1_17, 2307 PINCTRL_GRP_SWDT1_11_CLK, 2308 PINCTRL_GRP_SPI0_5, 2309 PINCTRL_GRP_TTC1_8_CLK, 2310 PINCTRL_GRP_UART1_17, 2311 PINCTRL_GRP_TRACE0_2, 2312 PINCTRL_GRP_SDIO0_4BIT_2_0, 2313 PINCTRL_GRP_SDIO0_1BIT_2_1, 2314 END_OF_GROUPS, 2315 }), 2316 }, 2317 [PINCTRL_PIN_69] = { 2318 .groups = &((uint16_t []) { 2319 PINCTRL_GRP_ETHERNET3_0, 2320 PINCTRL_GRP_USB1_0, 2321 PINCTRL_GRP_SDIO0_2, 2322 PINCTRL_GRP_SDIO1_1_WP, 2323 PINCTRL_GRP_RESERVED, 2324 PINCTRL_GRP_GPIO0_69, 2325 PINCTRL_GRP_CAN1_17, 2326 PINCTRL_GRP_I2C1_17, 2327 PINCTRL_GRP_SWDT1_11_RST, 2328 PINCTRL_GRP_SPI0_5, 2329 PINCTRL_GRP_TTC1_8_WAV, 2330 PINCTRL_GRP_UART1_17, 2331 PINCTRL_GRP_TRACE0_2, 2332 PINCTRL_GRP_SDIO0_4BIT_2_0, 2333 PINCTRL_GRP_SDIO0_1BIT_2_2, 2334 END_OF_GROUPS, 2335 }), 2336 }, 2337 [PINCTRL_PIN_70] = { 2338 .groups = &((uint16_t []) { 2339 PINCTRL_GRP_ETHERNET3_0, 2340 PINCTRL_GRP_USB1_0, 2341 PINCTRL_GRP_SDIO0_2, 2342 PINCTRL_GRP_SDIO1_1_PC, 2343 PINCTRL_GRP_RESERVED, 2344 PINCTRL_GRP_GPIO0_70, 2345 PINCTRL_GRP_CAN0_17, 2346 PINCTRL_GRP_I2C0_17, 2347 PINCTRL_GRP_SWDT0_11_CLK, 2348 PINCTRL_GRP_SPI1_5, 2349 PINCTRL_GRP_TTC0_8_CLK, 2350 PINCTRL_GRP_UART0_17, 2351 PINCTRL_GRP_RESERVED, 2352 PINCTRL_GRP_SDIO0_4BIT_2_0, 2353 PINCTRL_GRP_SDIO0_1BIT_2_3, 2354 END_OF_GROUPS, 2355 }), 2356 }, 2357 [PINCTRL_PIN_71] = { 2358 .groups = &((uint16_t []) { 2359 PINCTRL_GRP_ETHERNET3_0, 2360 PINCTRL_GRP_USB1_0, 2361 PINCTRL_GRP_SDIO0_2, 2362 PINCTRL_GRP_SDIO1_4BIT_1_0, 2363 PINCTRL_GRP_RESERVED, 2364 PINCTRL_GRP_GPIO0_71, 2365 PINCTRL_GRP_CAN0_17, 2366 PINCTRL_GRP_I2C0_17, 2367 PINCTRL_GRP_SWDT0_11_RST, 2368 PINCTRL_GRP_SPI1_5_SS2, 2369 PINCTRL_GRP_TTC0_8_WAV, 2370 PINCTRL_GRP_UART0_17, 2371 PINCTRL_GRP_RESERVED, 2372 PINCTRL_GRP_SDIO0_2, 2373 PINCTRL_GRP_SDIO0_4BIT_2_1, 2374 PINCTRL_GRP_SDIO0_1BIT_2_4, 2375 PINCTRL_GRP_SDIO1_1BIT_1_0, 2376 END_OF_GROUPS, 2377 }), 2378 }, 2379 [PINCTRL_PIN_72] = { 2380 .groups = &((uint16_t []) { 2381 PINCTRL_GRP_ETHERNET3_0, 2382 PINCTRL_GRP_USB1_0, 2383 PINCTRL_GRP_SDIO0_2, 2384 PINCTRL_GRP_SDIO1_4BIT_1_0, 2385 PINCTRL_GRP_RESERVED, 2386 PINCTRL_GRP_GPIO0_72, 2387 PINCTRL_GRP_CAN1_18, 2388 PINCTRL_GRP_I2C1_18, 2389 PINCTRL_GRP_SWDT1_12_CLK, 2390 PINCTRL_GRP_SPI1_5_SS1, 2391 PINCTRL_GRP_RESERVED, 2392 PINCTRL_GRP_UART1_18, 2393 PINCTRL_GRP_RESERVED, 2394 PINCTRL_GRP_SDIO0_4BIT_2_1, 2395 PINCTRL_GRP_SDIO0_1BIT_2_5, 2396 PINCTRL_GRP_SDIO1_1BIT_1_1, 2397 END_OF_GROUPS, 2398 }), 2399 }, 2400 [PINCTRL_PIN_73] = { 2401 .groups = &((uint16_t []) { 2402 PINCTRL_GRP_ETHERNET3_0, 2403 PINCTRL_GRP_USB1_0, 2404 PINCTRL_GRP_SDIO0_2, 2405 PINCTRL_GRP_SDIO1_4BIT_1_0, 2406 PINCTRL_GRP_RESERVED, 2407 PINCTRL_GRP_GPIO0_73, 2408 PINCTRL_GRP_CAN1_18, 2409 PINCTRL_GRP_I2C1_18, 2410 PINCTRL_GRP_SWDT1_12_RST, 2411 PINCTRL_GRP_SPI1_5_SS0, 2412 PINCTRL_GRP_RESERVED, 2413 PINCTRL_GRP_UART1_18, 2414 PINCTRL_GRP_RESERVED, 2415 PINCTRL_GRP_SDIO0_4BIT_2_1, 2416 PINCTRL_GRP_SDIO0_1BIT_2_6, 2417 PINCTRL_GRP_SDIO1_1BIT_1_2, 2418 END_OF_GROUPS, 2419 }), 2420 }, 2421 [PINCTRL_PIN_74] = { 2422 .groups = &((uint16_t []) { 2423 PINCTRL_GRP_ETHERNET3_0, 2424 PINCTRL_GRP_USB1_0, 2425 PINCTRL_GRP_SDIO0_2, 2426 PINCTRL_GRP_SDIO1_4BIT_1_0, 2427 PINCTRL_GRP_RESERVED, 2428 PINCTRL_GRP_GPIO0_74, 2429 PINCTRL_GRP_CAN0_18, 2430 PINCTRL_GRP_I2C0_18, 2431 PINCTRL_GRP_SWDT0_12_CLK, 2432 PINCTRL_GRP_SPI1_5, 2433 PINCTRL_GRP_RESERVED, 2434 PINCTRL_GRP_UART0_18, 2435 PINCTRL_GRP_RESERVED, 2436 PINCTRL_GRP_SDIO0_4BIT_2_1, 2437 PINCTRL_GRP_SDIO0_1BIT_2_7, 2438 PINCTRL_GRP_SDIO1_1BIT_1_3, 2439 END_OF_GROUPS, 2440 }), 2441 }, 2442 [PINCTRL_PIN_75] = { 2443 .groups = &((uint16_t []) { 2444 PINCTRL_GRP_ETHERNET3_0, 2445 PINCTRL_GRP_USB1_0, 2446 PINCTRL_GRP_SDIO0_2_PC, 2447 PINCTRL_GRP_SDIO1_4BIT_1_0, 2448 PINCTRL_GRP_RESERVED, 2449 PINCTRL_GRP_GPIO0_75, 2450 PINCTRL_GRP_CAN0_18, 2451 PINCTRL_GRP_I2C0_18, 2452 PINCTRL_GRP_SWDT0_12_RST, 2453 PINCTRL_GRP_SPI1_5, 2454 PINCTRL_GRP_RESERVED, 2455 PINCTRL_GRP_UART0_18, 2456 PINCTRL_GRP_RESERVED, 2457 PINCTRL_GRP_SDIO1_1BIT_1_0, 2458 PINCTRL_GRP_SDIO1_1BIT_1_1, 2459 PINCTRL_GRP_SDIO1_1BIT_1_2, 2460 PINCTRL_GRP_SDIO1_1BIT_1_3, 2461 END_OF_GROUPS, 2462 }), 2463 }, 2464 [PINCTRL_PIN_76] = { 2465 .groups = &((uint16_t []) { 2466 PINCTRL_GRP_RESERVED, 2467 PINCTRL_GRP_RESERVED, 2468 PINCTRL_GRP_SDIO0_2_WP, 2469 PINCTRL_GRP_SDIO1_4BIT_1_0, 2470 PINCTRL_GRP_RESERVED, 2471 PINCTRL_GRP_GPIO0_76, 2472 PINCTRL_GRP_CAN1_19, 2473 PINCTRL_GRP_I2C1_19, 2474 PINCTRL_GRP_MDIO0_0, 2475 PINCTRL_GRP_MDIO1_1, 2476 PINCTRL_GRP_MDIO2_0, 2477 PINCTRL_GRP_MDIO3_0, 2478 PINCTRL_GRP_RESERVED, 2479 PINCTRL_GRP_SDIO1_1BIT_1_0, 2480 PINCTRL_GRP_SDIO1_1BIT_1_1, 2481 PINCTRL_GRP_SDIO1_1BIT_1_2, 2482 PINCTRL_GRP_SDIO1_1BIT_1_3, 2483 END_OF_GROUPS, 2484 }), 2485 }, 2486 [PINCTRL_PIN_77] = { 2487 .groups = &((uint16_t []) { 2488 PINCTRL_GRP_RESERVED, 2489 PINCTRL_GRP_RESERVED, 2490 PINCTRL_GRP_RESERVED, 2491 PINCTRL_GRP_SDIO1_1_CD, 2492 PINCTRL_GRP_RESERVED, 2493 PINCTRL_GRP_GPIO0_77, 2494 PINCTRL_GRP_CAN1_19, 2495 PINCTRL_GRP_I2C1_19, 2496 PINCTRL_GRP_MDIO0_0, 2497 PINCTRL_GRP_MDIO1_1, 2498 PINCTRL_GRP_MDIO2_0, 2499 PINCTRL_GRP_MDIO3_0, 2500 PINCTRL_GRP_RESERVED, 2501 END_OF_GROUPS, 2502 }), 2503 }, 2504 }; 2505 2506 /** 2507 * pm_api_pinctrl_get_num_pins() - PM call to request number of pins 2508 * @npins Number of pins 2509 * 2510 * This function is used by master to get number of pins 2511 * 2512 * @return Returns success. 2513 */ 2514 enum pm_ret_status pm_api_pinctrl_get_num_pins(unsigned int *npins) 2515 { 2516 *npins = MAX_PIN; 2517 2518 return PM_RET_SUCCESS; 2519 } 2520 2521 /** 2522 * pm_api_pinctrl_get_num_functions() - PM call to request number of functions 2523 * @nfuncs Number of functions 2524 * 2525 * This function is used by master to get number of functions 2526 * 2527 * @return Returns success. 2528 */ 2529 enum pm_ret_status pm_api_pinctrl_get_num_functions(unsigned int *nfuncs) 2530 { 2531 *nfuncs = MAX_FUNCTION; 2532 2533 return PM_RET_SUCCESS; 2534 } 2535 2536 /** 2537 * pm_api_pinctrl_get_num_func_groups() - PM call to request number of 2538 * function groups 2539 * @fid Function Id 2540 * @ngroups Number of function groups 2541 * 2542 * This function is used by master to get number of function groups 2543 * 2544 * @return Returns success. 2545 */ 2546 enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid, 2547 unsigned int *ngroups) 2548 { 2549 int i = 0; 2550 uint16_t *grps; 2551 2552 if (fid >= MAX_FUNCTION) 2553 return PM_RET_ERROR_ARGS; 2554 2555 *ngroups = 0; 2556 2557 grps = *pinctrl_functions[fid].groups; 2558 if (grps == NULL) 2559 return PM_RET_SUCCESS; 2560 2561 while (grps[i++] != (uint16_t)END_OF_GROUPS) 2562 (*ngroups)++; 2563 2564 return PM_RET_SUCCESS; 2565 } 2566 2567 /** 2568 * pm_api_pinctrl_get_function_name() - PM call to request a function name 2569 * @fid Function ID 2570 * @name Name of function (max 16 bytes) 2571 * 2572 * This function is used by master to get name of function specified 2573 * by given function ID. 2574 */ 2575 void pm_api_pinctrl_get_function_name(unsigned int fid, char *name) 2576 { 2577 if (fid >= MAX_FUNCTION) 2578 memcpy(name, END_OF_FUNCTION, FUNCTION_NAME_LEN); 2579 else 2580 memcpy(name, pinctrl_functions[fid].name, FUNCTION_NAME_LEN); 2581 } 2582 2583 /** 2584 * pm_api_pinctrl_get_function_groups() - PM call to request first 6 function 2585 * groups of function Id 2586 * @fid Function ID 2587 * @index Index of next function groups 2588 * @groups Function groups 2589 * 2590 * This function is used by master to get function groups specified 2591 * by given function Id. This API will return 6 function groups with 2592 * a single response. To get other function groups, master should call 2593 * same API in loop with new function groups index till error is returned. 2594 * 2595 * E.g First call should have index 0 which will return function groups 2596 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 2597 * function groups 6, 7, 8, 9, 10 and 11 and so on. 2598 * 2599 * Return: Returns status, either success or error+reason. 2600 */ 2601 enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid, 2602 unsigned int index, 2603 uint16_t *groups) 2604 { 2605 unsigned int i; 2606 uint16_t *grps; 2607 2608 if (fid >= MAX_FUNCTION) 2609 return PM_RET_ERROR_ARGS; 2610 2611 memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN); 2612 2613 grps = *pinctrl_functions[fid].groups; 2614 if (grps == NULL) 2615 return PM_RET_SUCCESS; 2616 2617 /* Skip groups till index */ 2618 for (i = 0; i < index; i++) 2619 if (grps[i] == (uint16_t)END_OF_GROUPS) 2620 return PM_RET_SUCCESS; 2621 2622 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 2623 groups[i] = grps[index + i]; 2624 if (groups[i] == (uint16_t)END_OF_GROUPS) 2625 break; 2626 } 2627 2628 return PM_RET_SUCCESS; 2629 } 2630 2631 /** 2632 * pm_api_pinctrl_get_pin_groups() - PM call to request first 6 pin 2633 * groups of pin 2634 * @pin Pin 2635 * @index Index of next pin groups 2636 * @groups pin groups 2637 * 2638 * This function is used by master to get pin groups specified 2639 * by given pin Id. This API will return 6 pin groups with 2640 * a single response. To get other pin groups, master should call 2641 * same API in loop with new pin groups index till error is returned. 2642 * 2643 * E.g First call should have index 0 which will return pin groups 2644 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 2645 * pin groups 6, 7, 8, 9, 10 and 11 and so on. 2646 * 2647 * Return: Returns status, either success or error+reason. 2648 */ 2649 enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin, 2650 unsigned int index, 2651 uint16_t *groups) 2652 { 2653 unsigned int i; 2654 uint16_t *grps; 2655 2656 if (pin >= MAX_PIN) 2657 return PM_RET_ERROR_ARGS; 2658 2659 memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN); 2660 2661 grps = *zynqmp_pin_groups[pin].groups; 2662 if (!grps) 2663 return PM_RET_SUCCESS; 2664 2665 /* Skip groups till index */ 2666 for (i = 0; i < index; i++) 2667 if (grps[i] == (uint16_t)END_OF_GROUPS) 2668 return PM_RET_SUCCESS; 2669 2670 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 2671 groups[i] = grps[index + i]; 2672 if (groups[i] == (uint16_t)END_OF_GROUPS) 2673 break; 2674 } 2675 2676 return PM_RET_SUCCESS; 2677 } 2678