1# 2# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5 6override ERRATA_A53_855873 := 1 7override PROGRAMMABLE_RESET_ADDRESS := 1 8PSCI_EXTENDED_STATE_ID := 1 9A53_DISABLE_NON_TEMPORAL_HINT := 0 10SEPARATE_CODE_AND_RODATA := 1 11ZYNQMP_WDT_RESTART := 0 12IPI_CRC_CHECK := 0 13override RESET_TO_BL31 := 1 14override GICV2_G0_FOR_EL3 := 1 15override WARMBOOT_ENABLE_DCACHE_EARLY := 1 16 17# Do not enable SVE 18ENABLE_SVE_FOR_NS := 0 19 20WORKAROUND_CVE_2017_5715 := 0 21 22ifdef ZYNQMP_ATF_MEM_BASE 23 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE)) 24 25 ifndef ZYNQMP_ATF_MEM_SIZE 26 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE") 27 endif 28 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE)) 29 30 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE 31 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE)) 32 endif 33endif 34 35ifdef ZYNQMP_BL32_MEM_BASE 36 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE)) 37 38 ifndef ZYNQMP_BL32_MEM_SIZE 39 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE") 40 endif 41 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE)) 42endif 43 44 45ifdef ZYNQMP_WDT_RESTART 46$(eval $(call add_define,ZYNQMP_WDT_RESTART)) 47endif 48 49ifdef ZYNQMP_IPI_CRC_CHECK 50 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.") 51endif 52 53ifdef IPI_CRC_CHECK 54 $(eval $(call add_define,IPI_CRC_CHECK)) 55endif 56 57PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 58 -Iinclude/plat/arm/common/aarch64/ \ 59 -Iplat/xilinx/common/include/ \ 60 -Iplat/xilinx/common/ipi_mailbox_service/ \ 61 -Iplat/xilinx/zynqmp/include/ \ 62 -Iplat/xilinx/zynqmp/pm_service/ \ 63 64# Include GICv2 driver files 65include drivers/arm/gic/v2/gicv2.mk 66 67PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 68 lib/xlat_tables/aarch64/xlat_tables.c \ 69 drivers/arm/dcc/dcc_console.c \ 70 drivers/delay_timer/delay_timer.c \ 71 drivers/delay_timer/generic_delay_timer.c \ 72 ${GICV2_SOURCES} \ 73 drivers/cadence/uart/aarch64/cdns_console.S \ 74 plat/arm/common/arm_cci.c \ 75 plat/arm/common/arm_common.c \ 76 plat/arm/common/arm_gicv2.c \ 77 plat/common/plat_gicv2.c \ 78 plat/xilinx/common/ipi.c \ 79 plat/xilinx/zynqmp/zynqmp_ipi.c \ 80 plat/common/aarch64/crash_console_helpers.S \ 81 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \ 82 plat/xilinx/zynqmp/aarch64/zynqmp_common.c 83 84ZYNQMP_CONSOLE ?= cadence 85ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc)) 86else 87 $(error "Please define ZYNQMP_CONSOLE") 88endif 89$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE})) 90 91BL31_SOURCES += drivers/arm/cci/cci.c \ 92 lib/cpus/aarch64/aem_generic.S \ 93 lib/cpus/aarch64/cortex_a53.S \ 94 plat/common/plat_psci_common.c \ 95 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 96 plat/xilinx/common/pm_service/pm_ipi.c \ 97 plat/xilinx/common/plat_startup.c \ 98 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \ 99 plat/xilinx/zynqmp/plat_psci.c \ 100 plat/xilinx/zynqmp/plat_zynqmp.c \ 101 plat/xilinx/zynqmp/plat_topology.c \ 102 plat/xilinx/zynqmp/sip_svc_setup.c \ 103 plat/xilinx/zynqmp/pm_service/pm_svc_main.c \ 104 plat/xilinx/zynqmp/pm_service/pm_api_sys.c \ 105 plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c \ 106 plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c \ 107 plat/xilinx/zynqmp/pm_service/pm_api_clock.c \ 108 plat/xilinx/zynqmp/pm_service/pm_client.c 109 110BL31_CPPFLAGS += -fno-jump-tables 111 112ifneq (${RESET_TO_BL31},1) 113 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.") 114endif 115