1# 2# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. 3# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. 4# Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. 5# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. 6# 7# SPDX-License-Identifier: BSD-3-Clause 8 9override ERRATA_A53_855873 := 1 10ERRATA_A53_1530924 := 1 11override PROGRAMMABLE_RESET_ADDRESS := 1 12PSCI_EXTENDED_STATE_ID := 1 13A53_DISABLE_NON_TEMPORAL_HINT := 0 14SEPARATE_CODE_AND_RODATA := 1 15ZYNQMP_WDT_RESTART := 0 16IPI_CRC_CHECK := 0 17override RESET_TO_BL31 := 1 18override WARMBOOT_ENABLE_DCACHE_EARLY := 1 19ENABLE_LTO := 1 20 21EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT) 22 23# pncd SPD requires secure SGI to be handled at EL1 24ifeq (${SPD}, $(filter ${SPD},pncd tspd)) 25ifeq (${ZYNQMP_WDT_RESTART},1) 26$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible") 27endif 28override GICV2_G0_FOR_EL3 := 0 29else 30override GICV2_G0_FOR_EL3 := 1 31endif 32 33# Do not enable SVE 34ENABLE_SVE_FOR_NS := 0 35 36WORKAROUND_CVE_2017_5715 := 0 37 38ARM_XLAT_TABLES_LIB_V1 := 1 39$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 40$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 41 42ifdef ZYNQMP_ATF_MEM_BASE 43 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE)) 44 45 ifndef ZYNQMP_ATF_MEM_SIZE 46 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE") 47 endif 48 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE)) 49 50 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE 51 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE)) 52 endif 53 54 # enable assert() when TF-A runs from DDR memory. 55 ENABLE_ASSERTIONS := 1 56 57endif 58 59ifdef ZYNQMP_BL32_MEM_BASE 60 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE)) 61 62 ifndef ZYNQMP_BL32_MEM_SIZE 63 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE") 64 endif 65 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE)) 66endif 67 68 69ifdef ZYNQMP_WDT_RESTART 70 $(eval $(call add_define,ZYNQMP_WDT_RESTART)) 71endif 72 73ifdef ZYNQMP_IPI_CRC_CHECK 74 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.") 75endif 76 77ifdef IPI_CRC_CHECK 78 $(eval $(call add_define,IPI_CRC_CHECK)) 79endif 80 81ifdef ZYNQMP_SECURE_EFUSES 82 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES)) 83endif 84 85ifdef XILINX_OF_BOARD_DTB_ADDR 86$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) 87endif 88 89PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 90 -Iinclude/plat/arm/common/aarch64/ \ 91 -Iplat/xilinx/common/include/ \ 92 -Iplat/xilinx/common/ipi_mailbox_service/ \ 93 -Iplat/xilinx/zynqmp/include/ \ 94 -Iplat/xilinx/zynqmp/pm_service/ \ 95 96include lib/libfdt/libfdt.mk 97# Include GICv2 driver files 98include drivers/arm/gic/v2/gicv2.mk 99 100PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 101 lib/xlat_tables/aarch64/xlat_tables.c \ 102 drivers/arm/dcc/dcc_console.c \ 103 drivers/delay_timer/delay_timer.c \ 104 drivers/delay_timer/generic_delay_timer.c \ 105 ${GICV2_SOURCES} \ 106 drivers/cadence/uart/aarch64/cdns_console.S \ 107 plat/arm/common/arm_cci.c \ 108 plat/arm/common/arm_common.c \ 109 plat/arm/common/arm_gicv2.c \ 110 plat/common/plat_gicv2.c \ 111 plat/xilinx/common/ipi.c \ 112 plat/xilinx/zynqmp/zynqmp_ipi.c \ 113 plat/common/aarch64/crash_console_helpers.S \ 114 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \ 115 plat/xilinx/zynqmp/aarch64/zynqmp_common.c 116 117ZYNQMP_CONSOLE ?= cadence 118ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc)) 119else 120 $(error "Please define ZYNQMP_CONSOLE") 121endif 122$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE})) 123 124# Build PM code as a Library 125include plat/xilinx/zynqmp/libpm.mk 126 127BL31_SOURCES += drivers/arm/cci/cci.c \ 128 lib/cpus/aarch64/aem_generic.S \ 129 lib/cpus/aarch64/cortex_a53.S \ 130 plat/common/plat_psci_common.c \ 131 common/fdt_fixup.c \ 132 common/fdt_wrappers.c \ 133 ${LIBFDT_SRCS} \ 134 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 135 plat/xilinx/common/plat_startup.c \ 136 plat/xilinx/common/plat_console.c \ 137 plat/xilinx/common/plat_fdt.c \ 138 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \ 139 plat/xilinx/zynqmp/plat_psci.c \ 140 plat/xilinx/zynqmp/plat_zynqmp.c \ 141 plat/xilinx/zynqmp/plat_topology.c \ 142 plat/xilinx/zynqmp/sip_svc_setup.c 143 144ifeq (${SDEI_SUPPORT},1) 145BL31_SOURCES += plat/xilinx/zynqmp/zynqmp_ehf.c \ 146 plat/xilinx/zynqmp/zynqmp_sdei.c 147endif 148 149BL31_CPPFLAGS += -fno-jump-tables 150TF_CFLAGS_aarch64 += -mbranch-protection=none 151 152ifdef CUSTOM_PKG_PATH 153include $(CUSTOM_PKG_PATH)/custom_pkg.mk 154else 155BL31_SOURCES += plat/xilinx/zynqmp/custom_sip_svc.c 156endif 157 158ifneq (${RESET_TO_BL31},1) 159 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.") 160endif 161