1# 2# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are met: 6# 7# Redistributions of source code must retain the above copyright notice, this 8# list of conditions and the following disclaimer. 9# 10# Redistributions in binary form must reproduce the above copyright notice, 11# this list of conditions and the following disclaimer in the documentation 12# and/or other materials provided with the distribution. 13# 14# Neither the name of ARM nor the names of its contributors may be used 15# to endorse or promote products derived from this software without specific 16# prior written permission. 17# 18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28# POSSIBILITY OF SUCH DAMAGE. 29 30override ENABLE_PLAT_COMPAT := 0 31override PROGRAMMABLE_RESET_ADDRESS := 1 32PSCI_EXTENDED_STATE_ID := 1 33A53_DISABLE_NON_TEMPORAL_HINT := 0 34SEPARATE_CODE_AND_RODATA := 1 35override RESET_TO_BL31 := 1 36 37ifdef ZYNQMP_ATF_MEM_BASE 38 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE)) 39 40 ifndef ZYNQMP_ATF_MEM_SIZE 41 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE") 42 endif 43 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE)) 44 45 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE 46 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE)) 47 endif 48endif 49 50ifdef ZYNQMP_BL32_MEM_BASE 51 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE)) 52 53 ifndef ZYNQMP_BL32_MEM_SIZE 54 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE") 55 endif 56 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE)) 57endif 58 59ZYNQMP_CONSOLE ?= cadence 60$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE})) 61 62PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 63 -Iinclude/plat/arm/common/aarch64/ \ 64 -Iplat/xilinx/zynqmp/include/ \ 65 -Iplat/xilinx/zynqmp/pm_service/ 66 67PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 68 lib/xlat_tables/aarch64/xlat_tables.c \ 69 drivers/delay_timer/delay_timer.c \ 70 drivers/delay_timer/generic_delay_timer.c \ 71 drivers/arm/gic/common/gic_common.c \ 72 drivers/arm/gic/v2/gicv2_main.c \ 73 drivers/arm/gic/v2/gicv2_helpers.c \ 74 drivers/cadence/uart/aarch64/cdns_console.S \ 75 drivers/console/aarch64/console.S \ 76 plat/arm/common/aarch64/arm_helpers.S \ 77 plat/arm/common/arm_cci.c \ 78 plat/arm/common/arm_common.c \ 79 plat/arm/common/arm_gicv2.c \ 80 plat/common/plat_gicv2.c \ 81 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \ 82 plat/xilinx/zynqmp/aarch64/zynqmp_common.c 83 84BL31_SOURCES += drivers/arm/cci/cci.c \ 85 lib/cpus/aarch64/aem_generic.S \ 86 lib/cpus/aarch64/cortex_a53.S \ 87 plat/common/plat_psci_common.c \ 88 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \ 89 plat/xilinx/zynqmp/plat_psci.c \ 90 plat/xilinx/zynqmp/plat_zynqmp.c \ 91 plat/xilinx/zynqmp/plat_startup.c \ 92 plat/xilinx/zynqmp/plat_topology.c \ 93 plat/xilinx/zynqmp/sip_svc_setup.c \ 94 plat/xilinx/zynqmp/pm_service/pm_svc_main.c \ 95 plat/xilinx/zynqmp/pm_service/pm_api_sys.c \ 96 plat/xilinx/zynqmp/pm_service/pm_ipi.c \ 97 plat/xilinx/zynqmp/pm_service/pm_client.c 98