xref: /rk3399_ARM-atf/plat/xilinx/zynqmp/include/plat_private.h (revision ffa910312c371080f4d0d50eb1354ad05b7be7a8)
131c3842eSJolly Shah /*
24d9f825aSVenkatesh Yadav Abbarapu  * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
331c3842eSJolly Shah  *
431c3842eSJolly Shah  * SPDX-License-Identifier: BSD-3-Clause
531c3842eSJolly Shah  */
631c3842eSJolly Shah 
731c3842eSJolly Shah #ifndef PLAT_PRIVATE_H
831c3842eSJolly Shah #define PLAT_PRIVATE_H
931c3842eSJolly Shah 
1031c3842eSJolly Shah #include <stdint.h>
1131c3842eSJolly Shah 
1231c3842eSJolly Shah #include <bl31/interrupt_mgmt.h>
1331c3842eSJolly Shah #include <common/bl_common.h>
1455a08b35SAmbroise Vincent #include <drivers/cadence/cdns_uart.h>
1531c3842eSJolly Shah 
1631c3842eSJolly Shah void zynqmp_config_setup(void);
1731c3842eSJolly Shah 
18*ffa91031SVenkatesh Yadav Abbarapu uint32_t zynqmp_calc_core_pos(u_register_t mpidr);
1931c3842eSJolly Shah 
2031c3842eSJolly Shah /* ZynqMP specific functions */
21*ffa91031SVenkatesh Yadav Abbarapu uint32_t zynqmp_get_uart_clk(void);
22*ffa91031SVenkatesh Yadav Abbarapu uint32_t zynqmp_get_bootmode(void);
2331c3842eSJolly Shah 
2431c3842eSJolly Shah 
2531c3842eSJolly Shah #if ZYNQMP_WDT_RESTART
2631c3842eSJolly Shah /*
2731c3842eSJolly Shah  * Register handler to specific GIC entrance
2831c3842eSJolly Shah  * for INTR_TYPE_EL3 type of interrupt
2931c3842eSJolly Shah  */
3031c3842eSJolly Shah int request_intr_type_el3(uint32_t, interrupt_type_handler_t);
3131c3842eSJolly Shah #endif
3231c3842eSJolly Shah 
3331c3842eSJolly Shah #endif /* PLAT_PRIVATE_H */
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