1*c8284409SSoren Brinkmann/* 2*c8284409SSoren Brinkmann * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3*c8284409SSoren Brinkmann * 4*c8284409SSoren Brinkmann * Redistribution and use in source and binary forms, with or without 5*c8284409SSoren Brinkmann * modification, are permitted provided that the following conditions are met: 6*c8284409SSoren Brinkmann * 7*c8284409SSoren Brinkmann * Redistributions of source code must retain the above copyright notice, this 8*c8284409SSoren Brinkmann * list of conditions and the following disclaimer. 9*c8284409SSoren Brinkmann * 10*c8284409SSoren Brinkmann * Redistributions in binary form must reproduce the above copyright notice, 11*c8284409SSoren Brinkmann * this list of conditions and the following disclaimer in the documentation 12*c8284409SSoren Brinkmann * and/or other materials provided with the distribution. 13*c8284409SSoren Brinkmann * 14*c8284409SSoren Brinkmann * Neither the name of ARM nor the names of its contributors may be used 15*c8284409SSoren Brinkmann * to endorse or promote products derived from this software without specific 16*c8284409SSoren Brinkmann * prior written permission. 17*c8284409SSoren Brinkmann * 18*c8284409SSoren Brinkmann * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*c8284409SSoren Brinkmann * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*c8284409SSoren Brinkmann * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*c8284409SSoren Brinkmann * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*c8284409SSoren Brinkmann * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*c8284409SSoren Brinkmann * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*c8284409SSoren Brinkmann * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*c8284409SSoren Brinkmann * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*c8284409SSoren Brinkmann * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*c8284409SSoren Brinkmann * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*c8284409SSoren Brinkmann * POSSIBILITY OF SUCH DAMAGE. 29*c8284409SSoren Brinkmann */ 30*c8284409SSoren Brinkmann 31*c8284409SSoren Brinkmann#include <asm_macros.S> 32*c8284409SSoren Brinkmann#include <gicv2.h> 33*c8284409SSoren Brinkmann#include <platform_def.h> 34*c8284409SSoren Brinkmann 35*c8284409SSoren Brinkmann .globl plat_secondary_cold_boot_setup 36*c8284409SSoren Brinkmann .globl plat_is_my_cpu_primary 37*c8284409SSoren Brinkmann 38*c8284409SSoren Brinkmann /* ----------------------------------------------------- 39*c8284409SSoren Brinkmann * void plat_secondary_cold_boot_setup (void); 40*c8284409SSoren Brinkmann * 41*c8284409SSoren Brinkmann * This function performs any platform specific actions 42*c8284409SSoren Brinkmann * needed for a secondary cpu after a cold reset e.g 43*c8284409SSoren Brinkmann * mark the cpu's presence, mechanism to place it in a 44*c8284409SSoren Brinkmann * holding pen etc. 45*c8284409SSoren Brinkmann * TODO: Should we read the PSYS register to make sure 46*c8284409SSoren Brinkmann * that the request has gone through. 47*c8284409SSoren Brinkmann * ----------------------------------------------------- 48*c8284409SSoren Brinkmann */ 49*c8284409SSoren Brinkmannfunc plat_secondary_cold_boot_setup 50*c8284409SSoren Brinkmann mrs x0, mpidr_el1 51*c8284409SSoren Brinkmann 52*c8284409SSoren Brinkmann /* Deactivate the gic cpu interface */ 53*c8284409SSoren Brinkmann ldr x1, =BASE_GICC_BASE 54*c8284409SSoren Brinkmann mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1) 55*c8284409SSoren Brinkmann orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0) 56*c8284409SSoren Brinkmann str w0, [x1, #GICC_CTLR] 57*c8284409SSoren Brinkmann 58*c8284409SSoren Brinkmann /* 59*c8284409SSoren Brinkmann * There is no sane reason to come out of this wfi. This 60*c8284409SSoren Brinkmann * cpu will be powered on and reset by the cpu_on pm api 61*c8284409SSoren Brinkmann */ 62*c8284409SSoren Brinkmann dsb sy 63*c8284409SSoren Brinkmann1: 64*c8284409SSoren Brinkmann bl plat_panic_handler 65*c8284409SSoren Brinkmannendfunc plat_secondary_cold_boot_setup 66*c8284409SSoren Brinkmann 67*c8284409SSoren Brinkmannfunc plat_is_my_cpu_primary 68*c8284409SSoren Brinkmann mov x9, x30 69*c8284409SSoren Brinkmann bl plat_my_core_pos 70*c8284409SSoren Brinkmann cmp x0, #ZYNQMP_PRIMARY_CPU 71*c8284409SSoren Brinkmann cset x0, eq 72*c8284409SSoren Brinkmann ret x9 73*c8284409SSoren Brinkmannendfunc plat_is_my_cpu_primary 74