1c8284409SSoren Brinkmann/* 2c8284409SSoren Brinkmann * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3c8284409SSoren Brinkmann * 4c8284409SSoren Brinkmann * Redistribution and use in source and binary forms, with or without 5c8284409SSoren Brinkmann * modification, are permitted provided that the following conditions are met: 6c8284409SSoren Brinkmann * 7c8284409SSoren Brinkmann * Redistributions of source code must retain the above copyright notice, this 8c8284409SSoren Brinkmann * list of conditions and the following disclaimer. 9c8284409SSoren Brinkmann * 10c8284409SSoren Brinkmann * Redistributions in binary form must reproduce the above copyright notice, 11c8284409SSoren Brinkmann * this list of conditions and the following disclaimer in the documentation 12c8284409SSoren Brinkmann * and/or other materials provided with the distribution. 13c8284409SSoren Brinkmann * 14c8284409SSoren Brinkmann * Neither the name of ARM nor the names of its contributors may be used 15c8284409SSoren Brinkmann * to endorse or promote products derived from this software without specific 16c8284409SSoren Brinkmann * prior written permission. 17c8284409SSoren Brinkmann * 18c8284409SSoren Brinkmann * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19c8284409SSoren Brinkmann * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20c8284409SSoren Brinkmann * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21c8284409SSoren Brinkmann * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22c8284409SSoren Brinkmann * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23c8284409SSoren Brinkmann * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24c8284409SSoren Brinkmann * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25c8284409SSoren Brinkmann * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26c8284409SSoren Brinkmann * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27c8284409SSoren Brinkmann * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28c8284409SSoren Brinkmann * POSSIBILITY OF SUCH DAMAGE. 29c8284409SSoren Brinkmann */ 30c8284409SSoren Brinkmann 31c8284409SSoren Brinkmann#include <asm_macros.S> 32c8284409SSoren Brinkmann#include <gicv2.h> 33c8284409SSoren Brinkmann#include <platform_def.h> 34c8284409SSoren Brinkmann 35c8284409SSoren Brinkmann .globl plat_secondary_cold_boot_setup 36c8284409SSoren Brinkmann .globl plat_is_my_cpu_primary 37c8284409SSoren Brinkmann 38c8284409SSoren Brinkmann /* ----------------------------------------------------- 39c8284409SSoren Brinkmann * void plat_secondary_cold_boot_setup (void); 40c8284409SSoren Brinkmann * 41c8284409SSoren Brinkmann * This function performs any platform specific actions 42c8284409SSoren Brinkmann * needed for a secondary cpu after a cold reset e.g 43c8284409SSoren Brinkmann * mark the cpu's presence, mechanism to place it in a 44c8284409SSoren Brinkmann * holding pen etc. 45c8284409SSoren Brinkmann * TODO: Should we read the PSYS register to make sure 46c8284409SSoren Brinkmann * that the request has gone through. 47c8284409SSoren Brinkmann * ----------------------------------------------------- 48c8284409SSoren Brinkmann */ 49c8284409SSoren Brinkmannfunc plat_secondary_cold_boot_setup 50c8284409SSoren Brinkmann mrs x0, mpidr_el1 51c8284409SSoren Brinkmann 52c8284409SSoren Brinkmann /* Deactivate the gic cpu interface */ 53c8284409SSoren Brinkmann ldr x1, =BASE_GICC_BASE 54c8284409SSoren Brinkmann mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1) 55c8284409SSoren Brinkmann orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0) 56c8284409SSoren Brinkmann str w0, [x1, #GICC_CTLR] 57c8284409SSoren Brinkmann 58c8284409SSoren Brinkmann /* 59c8284409SSoren Brinkmann * There is no sane reason to come out of this wfi. This 60c8284409SSoren Brinkmann * cpu will be powered on and reset by the cpu_on pm api 61c8284409SSoren Brinkmann */ 62c8284409SSoren Brinkmann dsb sy 63c8284409SSoren Brinkmann1: 64*a806dad5SJeenu Viswambharan no_ret plat_panic_handler 65c8284409SSoren Brinkmannendfunc plat_secondary_cold_boot_setup 66c8284409SSoren Brinkmann 67c8284409SSoren Brinkmannfunc plat_is_my_cpu_primary 68c8284409SSoren Brinkmann mov x9, x30 69c8284409SSoren Brinkmann bl plat_my_core_pos 70c8284409SSoren Brinkmann cmp x0, #ZYNQMP_PRIMARY_CPU 71c8284409SSoren Brinkmann cset x0, eq 72c8284409SSoren Brinkmann ret x9 73c8284409SSoren Brinkmannendfunc plat_is_my_cpu_primary 74