1c8284409SSoren Brinkmann/* 2c8284409SSoren Brinkmann * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3c8284409SSoren Brinkmann * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5c8284409SSoren Brinkmann */ 6c8284409SSoren Brinkmann 7c8284409SSoren Brinkmann#include <asm_macros.S> 8c8284409SSoren Brinkmann#include <gicv2.h> 9c8284409SSoren Brinkmann#include <platform_def.h> 10c8284409SSoren Brinkmann 11c8284409SSoren Brinkmann .globl plat_secondary_cold_boot_setup 12c8284409SSoren Brinkmann .globl plat_is_my_cpu_primary 13c8284409SSoren Brinkmann 14c8284409SSoren Brinkmann /* ----------------------------------------------------- 15c8284409SSoren Brinkmann * void plat_secondary_cold_boot_setup (void); 16c8284409SSoren Brinkmann * 17c8284409SSoren Brinkmann * This function performs any platform specific actions 18c8284409SSoren Brinkmann * needed for a secondary cpu after a cold reset e.g 19c8284409SSoren Brinkmann * mark the cpu's presence, mechanism to place it in a 20c8284409SSoren Brinkmann * holding pen etc. 21c8284409SSoren Brinkmann * TODO: Should we read the PSYS register to make sure 22c8284409SSoren Brinkmann * that the request has gone through. 23c8284409SSoren Brinkmann * ----------------------------------------------------- 24c8284409SSoren Brinkmann */ 25c8284409SSoren Brinkmannfunc plat_secondary_cold_boot_setup 26c8284409SSoren Brinkmann mrs x0, mpidr_el1 27c8284409SSoren Brinkmann 28c8284409SSoren Brinkmann /* Deactivate the gic cpu interface */ 29c8284409SSoren Brinkmann ldr x1, =BASE_GICC_BASE 30c8284409SSoren Brinkmann mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1) 31c8284409SSoren Brinkmann orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0) 32c8284409SSoren Brinkmann str w0, [x1, #GICC_CTLR] 33c8284409SSoren Brinkmann 34c8284409SSoren Brinkmann /* 35c8284409SSoren Brinkmann * There is no sane reason to come out of this wfi. This 36c8284409SSoren Brinkmann * cpu will be powered on and reset by the cpu_on pm api 37c8284409SSoren Brinkmann */ 38c8284409SSoren Brinkmann dsb sy 39c8284409SSoren Brinkmann1: 40a806dad5SJeenu Viswambharan no_ret plat_panic_handler 41c8284409SSoren Brinkmannendfunc plat_secondary_cold_boot_setup 42c8284409SSoren Brinkmann 43c8284409SSoren Brinkmannfunc plat_is_my_cpu_primary 44c8284409SSoren Brinkmann mov x9, x30 45c8284409SSoren Brinkmann bl plat_my_core_pos 46c8284409SSoren Brinkmann cmp x0, #ZYNQMP_PRIMARY_CPU 47c8284409SSoren Brinkmann cset x0, eq 48c8284409SSoren Brinkmann ret x9 49c8284409SSoren Brinkmannendfunc plat_is_my_cpu_primary 50