1# Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. 2# Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. 3# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4# 5# SPDX-License-Identifier: BSD-3-Clause 6 7PLAT_PATH := plat/xilinx/versal_net 8 9# A78 Erratum for SoC 10ERRATA_A78_AE_1941500 := 1 11ERRATA_A78_AE_1951502 := 1 12ERRATA_A78_AE_2376748 := 1 13ERRATA_A78_AE_2395408 := 1 14 15override PROGRAMMABLE_RESET_ADDRESS := 1 16PSCI_EXTENDED_STATE_ID := 1 17SEPARATE_CODE_AND_RODATA := 1 18override RESET_TO_BL31 := 1 19PL011_GENERIC_UART := 1 20IPI_CRC_CHECK := 0 21GIC_ENABLE_V4_EXTN := 0 22GICV3_SUPPORT_GIC600 := 1 23TFA_NO_PM := 0 24 25override CTX_INCLUDE_AARCH32_REGS := 0 26 27ifdef TFA_NO_PM 28 $(eval $(call add_define,TFA_NO_PM)) 29endif 30 31ifdef VERSAL_NET_ATF_MEM_BASE 32 $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE)) 33 34 ifndef VERSAL_NET_ATF_MEM_SIZE 35 $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE") 36 endif 37 $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE)) 38 39 ifdef VERSAL_NET_ATF_MEM_PROGBITS_SIZE 40 $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE)) 41 endif 42endif 43 44ifdef VERSAL_NET_BL32_MEM_BASE 45 $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE)) 46 47 ifndef VERSAL_NET_BL32_MEM_SIZE 48 $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE") 49 endif 50 $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE)) 51endif 52 53ifdef IPI_CRC_CHECK 54 $(eval $(call add_define,IPI_CRC_CHECK)) 55endif 56 57USE_COHERENT_MEM := 0 58HW_ASSISTED_COHERENCY := 1 59 60VERSAL_NET_CONSOLE ?= pl011 61ifeq (${VERSAL_NET_CONSOLE}, $(filter ${VERSAL_NET_CONSOLE},pl011 pl011_0 pl011_1 dcc)) 62else 63 $(error Please define VERSAL_NET_CONSOLE) 64endif 65 66$(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE})) 67 68PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 69 -Iplat/xilinx/common/include/ \ 70 -Iplat/xilinx/common/ipi_mailbox_service/ \ 71 -I${PLAT_PATH}/include/ \ 72 -Iplat/xilinx/versal/pm_service/ 73 74# Include GICv3 driver files 75include drivers/arm/gic/v3/gicv3.mk 76include lib/xlat_tables_v2/xlat_tables.mk 77include lib/libfdt/libfdt.mk 78 79PLAT_BL_COMMON_SOURCES := \ 80 drivers/arm/dcc/dcc_console.c \ 81 drivers/delay_timer/delay_timer.c \ 82 drivers/delay_timer/generic_delay_timer.c \ 83 ${GICV3_SOURCES} \ 84 drivers/arm/pl011/aarch64/pl011_console.S \ 85 plat/arm/common/arm_common.c \ 86 plat/common/plat_gicv3.c \ 87 ${PLAT_PATH}/aarch64/versal_net_helpers.S \ 88 ${PLAT_PATH}/aarch64/versal_net_common.c 89 90BL31_SOURCES += drivers/arm/cci/cci.c \ 91 lib/cpus/aarch64/cortex_a78_ae.S \ 92 lib/cpus/aarch64/cortex_a78.S \ 93 plat/common/plat_psci_common.c 94ifeq ($(TFA_NO_PM), 0) 95BL31_SOURCES += plat/xilinx/common/pm_service/pm_api_sys.c \ 96 plat/xilinx/common/pm_service/pm_ipi.c \ 97 ${PLAT_PATH}/plat_psci_pm.c \ 98 plat/xilinx/common/pm_service/pm_svc_main.c \ 99 ${PLAT_PATH}/pm_service/pm_client.c \ 100 ${PLAT_PATH}/versal_net_ipi.c 101else 102BL31_SOURCES += ${PLAT_PATH}/plat_psci.c 103endif 104BL31_SOURCES += plat/xilinx/common/plat_startup.c \ 105 plat/xilinx/common/ipi.c \ 106 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 107 plat/xilinx/common/versal.c \ 108 ${PLAT_PATH}/bl31_versal_net_setup.c \ 109 ${PLAT_PATH}/plat_topology.c \ 110 common/fdt_fixup.c \ 111 ${LIBFDT_SRCS} \ 112 ${PLAT_PATH}/sip_svc_setup.c \ 113 ${PLAT_PATH}/versal_net_gicv3.c \ 114 ${XLAT_TABLES_LIB_SRCS} 115